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2017-11-06spear: fix STMicroelectronics copyrightPatrice Chotard
Uniformize STMicroelectronics copyrights headers for SPEAR related code. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2017-11-06stv0991: fix STMicroelectronics copyrightPatrice Chotard
Uniformize STMicroelectronics copyrights headers for STV0991 related code. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2017-11-06stm32: fix STMicroelectronics copyrightPatrice Chotard
Uniformize STMicroelectronics copyrights headers for STM32 related code. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2017-11-06sti: fix STMicroelectronics copyrightPatrice Chotard
Uniformize all STMicroelectronics copyrights headers for STi related code. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2017-10-31wandboard: Add support for the MX6QP variantFabio Estevam
Add support for the latest MX6QP wandboard variant. Based on Richard Hu's work from Technexion's U-Boot tree. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2017-10-29Merge git://git.denx.de/u-boot-videoTom Rini
2017-10-27Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini
2017-10-27armv8: sec_firmware: Add support for loadables in FITSumit Garg
Enable support for loadables in SEC firmware FIT image. Currently support is added for single loadable image. Brief description of implementation: Add two more address pointers (loadable_h, loadable_l) as arguments to sec_firmware_init() api. Create new api: sec_firmware_checks_copy_loadable() to check if loadables node is present in SEC firmware FIT image. If present, verify loadable image and copies it to secure DDR memory. Populate address pointers with secure DDR memory addresses where loadable is copied. Example use-case could be trusted OS (tee.bin) as loadables node in SEC firmware FIT image. Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-10-27armv8: layerscape: Allocate 66 MB DDR for secure memorySumit Garg
Change DDR allocated for secure memory from 2 MB to 66 MB. This additional 64 MB secure memory is required for trusted OS running in Trusted Execution Environment using ARMv8 TrustZone. Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-10-27sunxi: video: split out PLL configuration codeVasily Khoruzhick
It will be reused in new DM LCD driver. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
2017-10-25sunxi: clk: fix N formula for CPUX clocksQuentin Schulz
As explained in arch/arm/mach-sunxi/clock_sun8i_a83t.c, clk for CPU clusters is computed as clk = 24*n. However, the current formula is clk = 24*(n-1). This results in a clock set to a frequency that isn't specified as possible for CPUs. Let's use the correct formula. Fixes: f542948b1e8c ("sunxi: clk: add basic clocks for A83T") Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2017-10-12Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini
2017-10-12mx6: sys_proto: Add prototypes for imx6_pcie_toggle() functionsDiego Dorta
When compiling with W=1 errors are observed: drivers/pci/pcie_imx.c:517:12: warning: no previous prototype for ‘imx6_pcie_toggle_power’ [-Wmissing-prototypes] __weak int imx6_pcie_toggle_power(void) drivers/pci/pcie_imx.c:528:12: warning: no previous prototype for ‘imx6_pcie_toggle_reset’ [-Wmissing-prototypes] __weak int imx6_pcie_toggle_reset(void) Remove these warnings by adding the functions prototypes on arch-mx6/sys_proto. Signed-off-by: Diego Dorta <diego.dorta@nxp.com>
2017-10-12mx6: clock: Add a prototype for do_mx6_showclocks()Diego Dorta
When compiling with W=1 the following warning is observed: arch/arm/mach-imx/mx6/clock.c:1268:5: warning: no previous prototype for ‘do_mx6_showclocks’ [-Wmissing-prototypes] int do_mx6_showclocks(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) Remove this warning by adding the function prototype into arch-mx6/clock.h file. Signed-off-by: Diego Dorta <diego.dorta@nxp.com>
2017-10-12imx: mx7: SPL support for i.MX7Uri Mashiach
Add configuration file and spl_boot_device function for the i.MX7 SPL. Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>
2017-10-12imx: mx7: DDR controller configuration for the i.MX7 architectureUri Mashiach
The configuration files imximage.cfg are used for the DDR controller configuration. Add DDR configuration function to replace the DDR controller configuration in the imximage.cfg file. The function can be used for DDR size detection. Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>
2017-10-12imx: mx7: fix the CCM_ macrosUri Mashiach
The CCM_ macros use the CCM_BASE_ADDRESS macro, which doesn't exist. Replace the CCM_BASE_ADDRESS macros with CCM_BASE_ADDR. Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il> Acked-by: Igor Grinberg <grinberg@compulab.co.il>
2017-10-12imx: sys_proto: Add a prototype for board_mmc_get_env_dev()Diego Dorta
When compiling with W=1 the following warning is observed: board/freescale/mx6sabresd/mx6sabresd.c:266:5: warning: no previous prototype for ‘board_mmc_get_env_dev’ [-Wmissing-prototypes] int board_mmc_get_env_dev(int devno) Remove this warning by adding the function prototype into sys_proto.h file. Signed-off-by: Diego Dorta <diego.dorta@nxp.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Stefano Babic <sbabic@denx.de>
2017-10-09armv8: layerscape: Enable falcon bootYork Sun
Add jump_to_image_linux() for arm64. Add "noreturn" flag to armv8_switch_to_el2(). Add hooks to fsl-layerscape to enable falcon boot. Signed-off-by: York Sun <york.sun@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Łukasz Majewski <lukma@denx.de> Tested-by: Łukasz Majewski <lukma@denx.de>
2017-10-08ARMv8: make master CPU checking logic more clearzijun_hu
macro branch_if_master checks master CPU via (Aff3 & (Aff2:Aff1:Aff0)) it is simple but a little obscure. fix by checking Affx fields within MPIDR_EL1 directly. Signed-off-by: zijun_hu <zijun_hu@htc.com>
2017-10-03arm: sunxi: Move spl_boot_device in a separate functionMaxime Ripard
U-Boot itself might need to identify the boot device, for example to be able to tell where to load the kernel from when several options are possible. Move the logic of spl_boot_device to a function that is compiled both for the SPL and the main binary. Tested-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-10-03musb: sunxi: switch to the device modelMaxime Ripard
The device model was implemented so far using a hook that needed to be called from the board support, without DT support and only for the host. Switch to probing both in peripheral and host mode through the DT. Reviewed-by: Łukasz Majewski <lukma@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-10-02arm: Use asm-generic/io.hPaul Burton
Convert the arm architecture to make use of the new asm-generic/io.h to provide address mapping functions. As the generic implementations are suitable for arm this is primarily a matter of removing code. This has only been build-tested, feedback from architecture maintainers is welcome. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-10-01rockchip: bootrom: add definitions to retrieve BROM boot-sourcePhilipp Tomsich
The Rockchip BROM allows reading where it booted from from SRAM. This adds the necessary definitions (as received from Kever) for the location of this information in the RK3399's SRAM and naming for the constants used. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-10-01armv7: rk3288: Move configure_l2ctlr to commonJagan Teki
configure_l2ctlr will be shared between SPL and TPL so move them into asm/arch/sys_proto.h Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-10-01armv7: Move L2CTLR read/write to commonJagan Teki
L2CTLR read/write functions are common to armv7 so, move them in to include/asm/armv7.h and use them where ever it need. Cc: Tom Warren <twarren@nvidia.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> [Backed out the change to arch/arm/mach-tegra/cache.c:] Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-10-01rockchip: rk3036: fix grf macro defineKever Yang
Some of macros definition are not correct, fix them according to TRM. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-10-01rockchip: rk322x: add sdram driverKever Yang
Add driver for rk322x to support sdram initialize in SPL. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-10-01rockchip: clk: Add rk3368 SARADC clock supportDavid Wu
The clk_saradc is dividing from the 24M, clk_saradc=24MHz/(saradc_div_con+1). SARADC integer divider control register is 8-bits width. Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-10-01rockchip: clk: Add rv1108 SARADC clock supportDavid Wu
The clk_saradc is dividing from the 24M, clk_saradc=24MHz/(saradc_div_con+1). SARADC integer divider control register is 10-bits width. Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-09-22armv8: fsl: ifc: Put IFC related code under CONFIG_FSL_IFCSriram Dash
IFC code is put under CONFIG_FSL_IFC Signed-off-by: Sriram Dash <sriram.dash@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-09-22board: Add stm32h7 SoC, discovery and evaluation boards supportPatrice Chotard
This patch adds support for stm32h7 soc family, stm32h743 discovery and evaluation boards. For more information about STM32H7 series, please visit: http://www.st.com/en/microcontrollers/stm32h7-series.html Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-09-22usb: dwc3: Add dwc3 glue driver support for STiPatrice Chotard
This patch adds the ST glue logic to manage the DWC3 HC on STiH407 SoC family. It configures the internal glue logic and syscfg registers. Part of this code been extracted from kernel.org driver (drivers/usb/dwc3/dwc3-st.c) Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-09-20Merge git://www.denx.de/git/u-boot-imxTom Rini
2017-09-18rockchip: rk322x: Disable integrated macphy for saving power consumingDavid Wu
Unfortunately, the integrated macphy default is enabled, which will increase power consuming, if we do not use this PHY. So let's disable it at first, which will save power consuming. If we really use it, then enable it in driver level. Signed-off-by: David Wu <david.wu@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-09-18imx: imx7d: remove CamelCase from ENET_xMHz macrosEric Nelson
Update these macros to use all upper-case to avoid checkpatch warnings: ENET_25MHz, ENET_50MHz, ENET_125MHz, Signed-off-by: Eric Nelson <eric@nelint.com> Reviewed-by: Stefano Babic <sbabic@denx.de>
2017-09-18imx: add macro to detect whether USB PHY is activeStefan Agner
This macro allows to detect whether the USB PHY is active. This is helpful to detect if the boot ROM has previously started the USB serial downloader. The idea is taken from the mfgtool support in the NXP U-Boot: http://git.freescale.com/git/cgit.cgi/imx/uboot-imx.git/commit/?h=imx_v2016.03_4.1.15_2.0.0_ga&id=a352ed3c5184b95c4c9f7468f5fbb5f43de5e412 Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Eric Nelson <eric@nelint.com>
2017-09-14ARM: DRA7: Cleanup old pinctrl macrosSuman Anna
Commit 6ae4c3efbd62 ("ARM: DRA7: Add pinctrl register definitions") has added new macros for pinmux configuration in line with the kernel definitions. Cleanup the old pinctrl macros from the common header file so that they are not used by any new boards. Signed-off-by: Suman Anna <s-anna@ti.com>
2017-09-12ARM: DRA72x: Add support for detection of DRA71x SR 2.1Vishal Mahaveer
DRA71x processors are reduced pin and software compatible derivative of DRA72 processors. Add support for detection of SR2.1 version of DRA71x family of processors. Signed-off-by: Vishal Mahaveer <vishalm@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2017-09-12dma: import linux/dma-direction.h to consolidate enum dma_data_directionMasahiro Yamada
Import include/linux/dma-direction.h from Linux 4.13-rc7 and delete duplicated definitions of enum dma_data_direction. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2017-09-12armv8: mmu: add space around operatorAndy Yan
Add space around operator "+", make it match the coding style. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-09-12armv8: mmu: remove unused macro definitionAndy Yan
Macro VA_BITS and PTE_BLOCK_BITS are not used in the code, so remove them. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-09-12Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini
2017-09-11board: ti: am571x: Add 666MHz support for AM571x IDKSteve Kipisz
AM571x supports DDR running at 666MHz. Right now it is clocked at 532MHz which is lower than what is supported. In order to have maximum performance on AM571-IDK, switch DDR to 666MHz. Signed-off-by: Steve Kipisz <s-kipisz2@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2017-09-11board: ti: dra76-evm: Add the pmic dataKeerthy
dra76-evm uses lp8736 and tps65917 pmic for powering on various peripherals. Add data for these pmics and register for dra76-evm. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2017-09-11arm: dra76: Add support for ES1.0 detectionPraneeth Bajjuri
dra76 family is a high-performance, infotainment application device, based on OMAP architecture on a 28-nm technology. This contains most of the subsystems, peripherals that are available on dra74, dra72 family. This SoC mainly features Subsystems: - 2 x Cortex-A15 with max speed of 1.8GHz - 2 X DSP - 2 X Cortex-M4 IPU - ISS - CAL - DSS - VPE - VIP Connectivity peripherals: - 1 USB3.0 and 3 USB2.0 subsystems - 1 x SATA - 2 x PCI Express Gen2 - 3-port Gigabit ethernet switch - 2 x CAN - MCAN Adding CPU detection support for the dra76 ES1.0 soc and update prcm, control module, dplls data. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Praneeth Bajjuri <praneeth@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2017-09-11arm: omap5+: Add board specific ldo poweringLokesh Vutla
It is not necessary all omap5+ based uses the same PMIC to poweron mmc. So add support for enabling mmc based on board. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2017-09-11armv8: ls1088a: fix the MMU table for pcie config spaceHou Zhiqiang
The pcie config space of ls1088a is different from ls2080a. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-09-11armv7: Add workaround for USB erratum A-009007Ran Wang
Rx Compliance tests may fail intermittently at high jitter frequencies using default register values Program register USB_PHY_RX_OVRD_IN_HI in certain sequence to make the Rx compliance test pass. Signed-off-by: Sriram Dash <sriram.dash@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Signed-off-by: Suresh Gupta <suresh.bhagat@nxp.com> Signed-off-by: Ran Wang <ran.wang_1@nxp.com> [YS: Reordered Kconfig options] Reviewed-by: York Sun <york.sun@nxp.com>
2017-09-11armv7: Add workaround for USB erratum A-008997Ran Wang
Low Frequency Periodic Singaling (LFPS) Peak-to-Peak Differential Output Voltage Test Compliance fails using default transmitter settings Change config of transmitter signal swings by setting register PCSTXSWINGFULL to 0x47 to pass compliance tests. Signed-off-by: Sriram Dash <sriram.dash@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com> Signed-off-by: Ran Wang <ran.wang_1@nxp.com> [YS: Reordered Kconfig options] Reviewed-by: York Sun <york.sun@nxp.com>
generated by cgit (git 2.34.1) at 2024-12-28 06:57:24 +0000