summaryrefslogtreecommitdiff
path: root/arch/arm/include
AgeCommit message (Collapse)Author
2015-02-24arm: ls102xa: Define default values for some CCSR macrosAlison Wang
This patch is to define default values for some CCSR macros to make header files cleaner. Signed-off-by: Alison Wang <alison.wang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-02-24armv8/fsl-lsch3: Enable erratum workround for A008514York Sun
Erratum A008514 appleis to ls2085a. Signed-off-by: York Sun <yorksun@freescale.com>
2015-02-24armv8/fsl-lsch3: Enable workaround for A008336York Sun
Erratum A008336 applied to LS2085A. Signed-off-by: York Sun <yorksun@freescale.com>
2015-02-24armv8/fsl-lsch3: Add support for second DDR clockYork Sun
FSL-LSCH3 platforms can have multiple DDR clocks. LS2085A has one clock for general DDR controlers, and another clock for DP-DDR. DDR driver needs to change to support multiple clocks. Signed-off-by: York Sun <yorksun@freescale.com>
2015-02-24driver/ddr/fsl: Add workaround for A008336York Sun
Erratum A008336 requires setting EDDRTQCR1[2] in DDRC DCSR space for 64-bit DDR controllers. Signed-off-by: York Sun <yorksun@freescale.com>
2015-02-24armv8/fsl-lsch3: Convert flushing L3 to assembly to avoid using stackYork Sun
Flushing L3 cache in CCN-504 requries d-cache to be disabled. Using assembly function to guarantee stack is not used before flushing is completed. Timeout is needed for simualtor on which CCN-504 is not implemented. Return value can be checked for timeout situation. Change bootm.c to disable dcache instead of simply flushing, required by flushing L3. Signed-off-by: York Sun <yorksun@freescale.com>
2015-02-24armv8/fsl-lsch3: Change normal memory shareabilityYork Sun
According to hardware implementation, a single outer shareable global coherence group is defined. Inner shareable has not bee enabled. Signed-off-by: York Sun <yorksun@freescale.com>
2015-02-24fsl-ch3/lowlevel: TZPC and TZASC programming to configure non-secure accessesBhupesh Sharma
This patch ensures that the TZPC (BP147) and TZASC-400 programming happens for LS2085A SoC only when the desired config flags are enabled and ensures that the TZPC programming is done to allow Non-secure (NS) + secure (S) transactions only for DCGF registers. The TZASC component is not present on LS2085A-Rev1, so the TZASC-400 config flag is turned OFF for now. Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-02-24Merge remote-tracking branch 'u-boot/master' into 'u-boot-arm/master'Albert ARIBAUD
2015-02-23imx: mx6sl: Extend USDHC SD2 pins to support 8-wire useOtavio Salvador
This adds the DATA[4-7] and RST pin definitions. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2015-02-23imx:mx6sl add I2c pad settingsPeng Fan
A few pad settings are I2C1 Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
2015-02-21Merge git://git.denx.de/u-boot-sunxiTom Rini
2015-02-21sunxi: Fix sun5i mbus speed when booting old kernelsHans de Goede
Older linux-sunxi-3.4 kernels override our PLL6 setting with 300 MHz, halving the mbus frequency, so set it to 300 MHz ourselves and base the mbus divider on that. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-02-21rpi: add support for Raspberry Pi 2 model BStephen Warren
USB doesn't seem to work yet; the controller detects the on-board Hub/ Ethernet device but can't read the descriptors from it. I haven't investigated yet. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
2015-02-21bcm2836 SoC support (used in Raspberry Pi 2 model B)Stephen Warren
The bcm2835 and bcm2836 are essentially identical, except: - The CPU is an ARM1176 v.s. a quad-core Cortex-A7. - The physical address of many IO controllers has moved. Rather than introducing a whole new bcm2836 value for $(SOC) or $(ARCH), update the existing bcm2835 code to handle the minor differences, and plumb it into the ARMv7 CPU architecture. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
2015-02-21bcm2835/rpi: add SPDX license tags for some filesStephen Warren
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
2015-02-21ARM: keystone: move SoC headers to mach-keystone/include/machMasahiro Yamada
Move arch/arm/include/asm/arch-keystone/* -> arch/arm/mach-keystone/include/mach/* Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Tom Rini <trini@ti.com>
2015-02-21ARM: orion5x: move SoC headers to mach-orion5x/include/machMasahiro Yamada
Move arch/arm/include/asm/arch-orion5x/* -> arch/arm/mach-orion5x/include/mach/* Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
2015-02-21ARM: nomadik: move SoC headers to mach-nomadik/include/machMasahiro Yamada
Move arch/arm/include/asm/arch-nomadik/* -> arch/arm/mach-nomadik/include/mach/* Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Nomadik Linux Team <STN_WMM_nomadik_linux@list.st.com> Cc: Alessandro Rubini <rubini@unipv.it>
2015-02-21ARM: kirkwood: move SoC headers to mach-kirkwood/include/machMasahiro Yamada
Move arch/arm/include/asm/arch-kirkwood/* -> arch/arm/mach-kirkwood/include/mach/* Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Stefan Roese <sr@denx.de> Cc: Prafulla Wadaskar <prafulla@marvell.com> Cc: Luka Perkov <luka.perkov@sartura.hr>
2015-02-21ARM: davinci: move SoC headers to mach-davinci/include/machMasahiro Yamada
Move arch/arm/include/asm/arch-davinci/* -> arch/arm/mach-davinci/include/mach/* Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Tom Rini <trini@ti.com>
2015-02-21ARM: at91: move SoC headers to mach-at91/include/machMasahiro Yamada
Move arch/arm/include/asm/arch-at91/* -> arch/arm/mach-at91/include/mach/* Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>
2015-02-17Merge branch 'master' of http://git.denx.de/u-boot-sunxiTom Rini
2015-02-17ARM: i.MX: provide access to reset cause through get_imx_reset_cause()Eric Nelson
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
2015-02-17ARM: imx6: disable bandgap self-bias after bootPeng Fan
The self-bias circuit is used by the bandgap during startup. Once the bandgap has stabilized, the self-bias circuit should be disabled for best noise performance of analog blocks. Also this bit should be disabled before the chip enters STOP mode or when ever the regular bandgap is disabled. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@freescale.com>
2015-02-16ARM: lpc3250: config: add generic board supportVladimir Zapolskiy
The only LPC3250 board works fine with enabled generic board support, add CONFIG_SYS_GENERIC_BOARD right into the arch config header. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
2015-02-16sunxi: Normalise FEL supportSimon Glass
Make sunxi's FEL code fit with the normal U-Boot boot sequence instead of creating its own. There are some #ifdefs required in start.S. Future work will hopefully remove these. This series is available at u-boot-dm, branch sunxi-working. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-02-16arm: spl: Provide for a board-specific loaderSimon Glass
Some boards have a special way of loading U-Boot that does not fit with the existing SPL code. For example sunxi uses an 'FEL' mode where U-Boot is loaded over USB. Add a CONFIG option and boot mode for this. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-02-16arm: Allow lr to be saved by board codeSimon Glass
The link register value can be required on some boards (e.g. FEL mode on sunxi) so use a branch instruction to jump to save_boot_params() instead of a branch link. This requires a branch back to save_boot_params_ret so adjust the users to deal with this. For exynos just drop the function since it doesn't do anything. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-02-16sunxi: dram: Un-inline dram helper functionsHans de Goede
Move the dram helper functions to a separate C file, rather then having them as inline helpers in dram.h. This saves 144 bytes in the .text segment for sun6i builds. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2015-02-16keystone2: ddr3: eliminate using global ddr3_size variableVitaly Andrianov
KS2 ddr3 initialization uses ddr3_size global variable before u-boot relocation. Even if the variable is not being used after relocation, writing to it corrupts relocation table. This patch removes the global ddr3_size variable and uses local one instead. Signed-off-by: Vitaly Andrianov <vitalya@ti.com> Tested-by: Nishanth Menon <nm@ti.com>
2015-02-16clock_am43xx:Set the MAC clock to /5 for OPP100Steve Kipisz
When EMAC is in the boot order, the boot ROM sets OPP50 and the MAC clock is set to /2. SPL needs to change it to /5 for Ethernet to generate the correct txclk. This patch sets it correctly. Signed-off-by: Steve Kipisz <s-kipisz2@ti.com>
2015-02-16ARM: DRA7: EMIF: Update SDRAM_REF_CTRL register valueLokesh Vutla
The value in SDRAM_REF_CTRL controls the delay time between the initial rising edge of DDR_RESETn to rising edge of DDR_CKE (JEDEC specs this as 500us). In order to achieve this, SDRAM_REF_CTRL should be written with a value corresponding to 500us delay before starting DDR initialization sequence, and configure proper value at the end of sequence. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2015-02-13Merge git://git.denx.de/u-boot-samsungTom Rini
2015-02-13Exynos542x: Add and enable get_periph_rate supportAkshay Saraswat
We planned to fetch peripheral rate through one generic API per peripheral. These generic peripheral functions are in turn expected to fetch apt values from a function refactored as per SoC versions. This patch adds support for fetching peripheral rates for Exynos5420 and Exynos5800. Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2015-02-12dm: at91: Drop use of ATMEL_PIO_PORTS in the header fileSimon Glass
With driver model the number of PIO ports is defined by platform data, so remove it from the header file. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>
2015-02-10Merge branch 'master' of git://git.denx.de/u-boot-atmelTom Rini
2015-02-10Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini
2015-02-10arm: mxs: Add 'Wait for JTAG user' if booted in JTAG modeGraeme Russ
When booting in JTAG mode, there is no way to use soft break-points, and no way of knowing when SPL has finished executing (so the user can issue a 'halt' command to load u-boot.bin for example) Add a debug output and simple loop to stop execution at the completion of the SPL initialisation as a pseudo break-point when booting in JTAG mode Signed-off-by: Graeme Russ <gruss@tss-engineering.com>
2015-02-10imx: mx6: Fixed AIPS3 base address issueYe.Li
Should use AIPS3 configuration address 0x0227C000 to set AIPS3, not the AIPS3 base address. Additional, replace AIPS1_BASE_ADDR to AIPS3_ARB_BASE_ADDR to align with AIPS1 and AIPS2, and resolve the AIPS3_ARB_BASE_ADDR undefine problem. Signed-off-by: Ye.Li <B37916@freescale.com>
2015-02-10imx:mx6 update fuse_bank0_regsPeng Fan
Update fuse_bank0_regs structure according reference mannual. Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
2015-02-09Merge branch 'microblaze' of git://git.denx.de/u-boot-microblazeTom Rini
2015-02-09common: Move dram_init() declaration to common locationMichal Simek
Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2015-02-07arm, at91: add reset controller status registerHeiko Schocher
add reset controller status register Signed-off-by: Heiko Schocher <hs@denx.de> Acked-by: Bo Shen <voice.shen@atmel.com>
2015-02-07ARM: atmel: cleanup: remove at91cap9 related codeBo Shen
As the at91cap9adk board is removed by commit: b5508344 (ARM: remove broken "at91cap9adk" board), so the at91cap9 code is not used anymore, and also the document for at91cap9 can not be found on www.atmel.com, so remove the at91cap9 related code. Signed-off-by: Bo Shen <voice.shen@atmel.com> Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>
2015-02-07ARM: atmel: sama5d4: add matrix1 base addr definitionBo Shen
Signed-off-by: Bo Shen <voice.shen@atmel.com>
2015-02-07ARM: atmel: spl: add saic to aic redirect functionBo Shen
Some SoC need to redirect the saic to aic to make the interrupt to work, here add a weak function to be replaced by real function. Signed-off-by: Bo Shen <voice.shen@atmel.com>
2015-02-07ARM: atmel: sama5: add sfr register header fileBo Shen
The SFR (special function registers) can be shared bwteen sama5d3 and sama5d4 soc. Signed-off-by: Bo Shen <voice.shen@atmel.com> [whitespace adoptions for 80 char compliance] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2015-02-07ARM: atmel: sama5: add bus matrix header fileBo Shen
This matrix header file can be shared between sama5d3 and sama5d4 soc. Signed-off-by: Bo Shen <voice.shen@atmel.com> [whitespace adaptions for 80 char compliance] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2015-02-06Merge git://git.denx.de/u-boot-marvellTom Rini
generated by cgit (git 2.34.1) at 2024-12-27 06:42:55 +0000