summaryrefslogtreecommitdiff
path: root/arch/arm/lib/crt0_64.S
AgeCommit message (Collapse)Author
2017-08-13armv8: TPL_STACK will always be defined, so test CONFIG_TPL_NEEDS_SEPARATE_STACKPhilipp Tomsich
Now that TPL_STACK has been moved off the whitelist (ok, I'm lying: the 'moving off the whitelist' part comes in once moveconfig runs... which will be a few commits down the line) and added to Kconfig, we need to test CONFIG_TPL_NEEDS_SEPARATE_STACK to see whether the value from TPL_STACK should be used or whether we try to inherit whatever SPL uses. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13armv8: spl: Support separate stack for TPLPhilipp Tomsich
To allow a TPL and SPL to run from different addresses/memories, we need to split setup of the TPL and SPL stacks. To do so, we introduce CONFIG_TPL_STACK (not listed in Kconfig) which can be used to override the initial stack pointer for TPL. To provide backward compatibility for existing boards, this is added as an optional configuration item and the normal search order (i.e. SPL_STACK, then SYS_STACK) apply if not defined. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2017-03-01armv8: spl: Call spl_relocate_stack_gd for ARMv8Philipp Tomsich
As part of the startup process for boards using the SPL, we need to call spl_relocate_stack_gd. This is needed to set up malloc with its DRAM buffer. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-02-08arm64: use store with auto-incrementMasahiro Yamada
Save one instruction. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-02-08arm64: use xzr to zero-out the bss sectionMasahiro Yamada
AArch64 has a zero register (xzr). Use it instead of x2. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-07-22armv8: spl: Call board_init_r from crt0_64 in SPLJeremy Hunt
As part of the startup process for boards using the SPL, the meaning of board_init_f changed such that it should return normally rather than calling board_init_r directly. (see db910353a126d84fe8dff7a694ea792f50fcfb6a ) This was fixed in 32-bit arm, but broke when SPL was added to 64 bit arm. This fixes crt0_64 so that it calls board_init_r during the SPL and removes the direct call from board_init_f from the arm SPL example. Signed-off-by: Jeremy Hunt <Jeremy.Hunt@DEShawResearch.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-01-14arm: initialize gd for AArch64Stephen Warren
Commit adc421e4cee8 "arm: move gd handling outside of C code" removed the call to arch_setup_gd() on ARM and replaced it with assembly code in crt0.S. However, AArch64 uses a different startup file, and the same change was not made to it. This leaves gd uninitialized on AArch64, which typically leads to hangs or crashes. This change fixes that. Fixes: adc421e4cee8 ("arm: move gd handling outside of C code") Signed-off-by: Stephen Warren <swarren@nvidia.com>
2016-01-13Fix board init code to respect the C runtime environmentAlbert ARIBAUD
board_init_f_mem() alters the C runtime environment's stack it is actually already using. This is not a valid behaviour within a C runtime environment. Split board_init_f_mem into C functions which do not alter their own stack and always behave properly with respect to their C runtime environment. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Acked-by: Thomas Chou <thomas@wytron.com.tw>
2015-10-24arm: Switch aarch64 to using generic global_data setupSimon Glass
There is quite a bit of assembler code that can be removed if we use the generic global_data setup. Less arch-specific code makes it easier to add new features and maintain the start-up code. Drop the unneeded code and adjust the hooks in board_f.c to cope. Tested on LS2085ARDB and LS2085AQDS (armv8 SoC). Tested-by: York Sun <yorksun@freescale.com> Signed-off-by: Simon Glass <sjg@chromium.org>
2015-09-12arm: Correct comments in crt0.S for the recent SPL improvementsSimon Glass
The current comments need a bit of tweaking since we now support stack and global_data relocation in SPL. Also add a reference to the README. For AArch64 this is not implemented, so leave a TODO for this. Signed-off-by: Simon Glass <sjg@chromium.org> Reported-by: Tim Harvey <tharvey@gateworks.com>
2015-07-27arm64: Handle arbitrary CONFIG_SYS_MALLOC_F_LEN valuesThierry Reding
The encoding of the sub instruction used to handle CONFIG_SYS_MALLOC_F_LEN can only accept certain values, and the set of acceptable values differs between the AArch32 and AArch64 instructions sets. The default value of CONFIG_SYS_MALLOC_F_LEN works with either ISA. Tegra uses a non-default value that can only be encoded in the AArch32 ISA. Fix the AArch64 crt0 assembly so it can handle completely arbitrary values. Signed-off-by: Thierry Reding <treding@nvidia.com> [twarren: trimmed Thierry's patch to remove changes already present] Signed-off-by: Tom Warren <twarren@nvidia.com> [swarren, cleaned up patch, wrote description, re-wrote subject] Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2015-04-23armv8/ls2085aqds: NAND boot supportScott Wood
This adds NAND boot support for LS2085AQDS, using SPL framework. Details of forming NAND image can be found in README. Signed-off-by: Scott Wood <scottwood@freescale.com> [York Sun: Remove +S from defconfig after commit 252ed872] Signed-off-by: York Sun <yorksun@freescale.com>
2015-03-27ARMv8: enable pre-allocation mallocDavid Feng
Allocate memory space for pre-allocation malloc and zero global data. This code is partly from crt0.S. Signed-off-by: David Feng <fenghua@phytium.com.cn>
2014-01-09arm64: core supportDavid Feng
Relocation code based on a patch by Scott Wood, which is: Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: David Feng <fenghua@phytium.com.cn>