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2017-04-13pinctrl: at91: add pinctrl driverWenyou Yang
AT91 PIO controller is a combined gpio-controller, pin-mux and pin-config module. The peripheral's pins are assigned through per-pin based muxing logic. Each SoC will have to describe the its limitation and pin configuration via device tree. This will allow to do not need to touch the C code when adding new SoC if the IP version is supported. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-04-13gpio: at91_gpio: remove CPU_HAS_PIO3 macroWenyou Yang
The intention of the removal is the preparation to introduce the new AT91 PIO pinctrl driver. Use the union to make the PIO3 and PIO2's registers be together and make their offset aligned. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-04-13ARM: at91: gpio: fix at91_set_gpio_value() defineWenyou Yang
When the CONFIG_ATMEL_LEGACY is undefined, according to the following defines, at91_set_gpio_value() references to at91_set_pio_value(x, y) with two parameters. #define at91_set_gpio_value(x, y) at91_set_pio_value(x, y) #define at91_get_gpio_value(x) at91_get_pio_value(x) But there isn't the implementation of at91_set_pio_value(x, y) with two parameters in U-Boot. This is an error. Same as at91_get_gpio_value(x) define. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-03-18arm: Migrate SYS_THUMB_BUILD to Kconfig, introduce SPL_SYS_THUMB_BUILDTom Rini
Today, we have cases where we wish to build all of U-Boot in Thumb2 mode for various reasons. We also have cases where we only build SPL in Thumb2 mode due to size constraints and wish to build the rest of the system in ARM mode. So in this migration we introduce a new symbol as well, SPL_SYS_THUMB_BUILD to control if we build everything or just SPL (or in theory, just U-Boot) in Thumb2 mode. Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
2017-01-25Convert CONFIG_BOARD_EARLY_INIT_F to KconfigSimon Glass
This converts the following to Kconfig: CONFIG_BOARD_EARLY_INIT_F Signed-off-by: Simon Glass <sjg@chromium.org>
2017-01-24Kconfig: Migrate BOARD_LATE_INIT to a selectTom Rini
This option should not really be user selectable. Note that on PowerPC we currently only need BOARD_LATE_INIT when CHAIN_OF_TRUST is enabled so be conditional on that. Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> (for UniPhier)
2016-10-28arm, at91: add icache supportHeiko Schocher
add at least icache support for at91 based boards. This speeds up NOR flash access on an at91sam9g15 based board from 15.2 seconds reading 8 MiB from a SPI NOR flash to 5.7 seconds. Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
2016-10-28ARM: at91: clock: correct PRES offset for at91sam9x5Heiko Schocher
on at91sam9x5 PRES offset is 4 in the PMC master clock register. Signed-off-by: Heiko Schocher <hs@denx.de> Acked-by: Wenyou Yang <wenyou.yang@atmel.com> Acked-by: Andreas Bießmann <andreas@biessmann.org>
2016-10-28arm: at91: mpddrc: add missing MPDDRC_MD definesHeiko Schocher
add missing MPDDRC_MD defines Signed-off-by: Heiko Schocher <hs@denx.de> Acked-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
2016-09-23treewide: replace #include <asm/errno.h> with <linux/errno.h>Masahiro Yamada
Now, arch/${ARCH}/include/asm/errno.h and include/linux/errno.h have the same content. (both just wrap <asm-generic/errno.h>) Replace all include directives for <asm/errno.h> with <linux/errno.h>. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> [trini: Fixup include/clk.] Signed-off-by: Tom Rini <trini@konsulko.com>
2016-08-15gpio: atmel_pio4: Move PIO4 definitions to head fileWenyou Yang
In order to make these PIO4 definitions shared with AT91 PIO4 pinctrl driver, move them from the existing gpio driver to the head file, and rephrase them. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-08-15clk: at91: Add clock driverWenyou Yang
The patch is referred to at91 clock driver of Linux, to make the clock node descriptions in DT aligned with the Linux's. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-06-26arm: at91: taurus/axm: add DM and DTS supportHeiko Schocher
add DM and DTS support for the at91 based siemens boards. Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Andreas Bießmann <andreas@biessmann.org> [rebased on current ToT] Signed-off-by: Andreas Bießmann <andreas@biessmann.org>
2016-06-26arm: at91: smartweb: add DM and DTS supportHeiko Schocher
Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Andreas Bießmann <andreas@biessmann.org> [rebased on current ToT] Signed-off-by: Andreas Bießmann <andreas@biessmann.org>
2016-06-26corvus DTS / DM supportHeiko Schocher
Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Andreas Bießmann <andreas@biessmann.org> [rebase on current ToT, don't delete gurnard DTB creation] Signed-off-by: Andreas Bießmann <andreas@biessmann.org>
2016-06-26arm: at91: add CONFIG_AT91SAM9M10G45Heiko Schocher
add support for CONFIG_AT91SAM9M10G45. Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
2016-06-26ARM: at91: Don't invoke spl_boot_device() twiceMarek Vasut
Since the spl_boot_mode() is now passed the boot device to boot from, make use of it instead of inquiring for the boot device again. This allows board_boot_order() to function correctly. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
2016-06-26common: Pass the boot device into spl_boot_mode()Marek Vasut
The SPL code already knows which boot device it calls the spl_boot_mode() on, so pass that information into the function. This allows the code of spl_boot_mode() avoid invoking spl_boot_device() again, but it also lets board_boot_order() correctly alter the behavior of the boot process. The later one is important, since in certain cases, it is desired that spl_boot_device() return value be overriden using board_boot_order(). Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Andreas Bießmann <andreas@biessmann.org> [add newly introduced zynq variant] Signed-aff-by: Andreas Bießmann <andreas@biessmann.org>
2016-06-12ARM: at91: Fix PMC bit definitionsMarek Vasut
Add missing parenthesis around the variable into the macro. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andreas Bießmann <andreas.devel@googlemail.com>
2016-06-12ARM: at91: sama5: Extend boot device autodetectionMarek Vasut
Extend the boot device autodetection from SAMA5D2 only to the entire SAMA5Dx family of microcontrollers. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Andreas Bießmann <andreas@biessmann.org> [minor compile fix for SAMA5D2] Signed-off-by: Andreas Bießmann <andreas@biessmann.org>
2016-06-12arm: at91: Add support for gurnardAndre Renaud
This board is based on Snapper 9G45 which has an Atmel AT91SAM9G45 chip and 128MB of SDRAM. It includes a small LCD, 2xUSB host, SD card, Ethernet and two UARTs. Signed-off-by: Andre Renaud <andre@designa-electronics.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andreas Bießmann <andreas@biessmann.org> [apply CONFIG_BOOTDELAY transition] Signed-off-by: Andreas Bießmann <andreas@biessmann.org>
2016-06-12at91: Add driver-model GPIO devices for AT91SAM9G45Simon Glass
Add these definitions so that GPIOs can be used with driver model. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de> Tested-on: smartweb, corvus, taurus, axm Tested-by: Heiko Schocher <hs@denx.de> Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
2016-06-12arm: at91: Add a header file for the real-time clockAndre Renaud
Add register definitions for the AT91 RTC so that this can potentially be used in U-Boot. Signed-off-by: Andre Renaud <andre@designa-electronics.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
2016-06-12at91: Add support for the AT91 slow clock controllerAndre Renaud
This is available on AT91SAM9G45. Add the peripheral address and flag definitions. Signed-off-by: Andre Renaud <andre@designa-electronics.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
2016-05-24ARM: sama5d2: Implement boot device autodetectionMarek Vasut
Implement support for saving ARM register R4 early during boot using save_boot_params . Implement support for decoding the stored register R4 value in spl_boot_device() to obtain boot device from which the SoC booted. This way, the SPL will always load U-Boot from the same device from which the SPL itself booted instead of using hard-coded boot device. This functionality is useful for example when booting sama5d2-xplained from SD card, where by default the SPL would try loading the U-Boot from eMMC and fail. This is because eMMC is on SDHCI0 (BOOT_DEVICE_MMC1), while SD slot is on SDHCI1 (BOOT_DEVICE_MMC2) and the SPL was hard-wired to always boot from BOOT_DEVICE_MMC1. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
2016-05-24ARM: at91: clock: complete the GCK's clock sourcesWenyou Yang
Add the UPLL clock and master clock as a clock source for getting the generated clock frequency to complete its clock sources support. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
2016-05-24ARM: at91: clock: fix the GCK's clock sourceWenyou Yang
Before enabling a generated clock whose source is from the UPLL clock, check and enable the UPLL clock. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
2016-05-24board: atmel: add SAMA5D2 PTC Engineering boardWenyou Yang
The board supports following features: - Boot media support: NAND Flash/SPI Flash - Support ethernet - Support USB mass storage Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
2016-05-24ARM: at91: sama5d2: add macro & field definitionsWenyou Yang
They will be used on SAMA5D2 PTC board. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
2016-05-02Change my mailaddressAndreas Bießmann
I'll switch my mails to my own server, so drop all gmail references. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2016-03-16spl: arm: Make sure to include all of the u_boot_list entriesTom Rini
Starting with 96e5b03 we use a linker list for partition table information. However since we use this in SPL we need to make sure that the SPL linker scripts include these as well. While doing this, it's best to simply include all linker lists to future proof ourselves. Cc: Andreas Bießmann <andreas.devel@googlemail.com> Acked-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reported-by: Nishanth Menon <nm@ti.com> Tested-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2016-02-19ARM: Add Support for the VInCo platformGregory CLEMENT
The Versatile Industrial Communication platform is a community oriented board from Landis + Gyr. It comes with: - an RS-485 port - 2 Ethernet ports - a wireless M-BUS - a 4G modem - a 4MB SPI flash - a 4GB eMMC Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> [rebase on current TOT] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2016-02-18ARM: at91: sama5d2: configure the L2 cache memorySamuel Mescoff
The SAMA5D2 has a second internal SRAM that can be reassigned as a L2 cache memory. Make sure it is configured as a L2 cache memory when booting from a SPL image. Based on the commit b5ea95ef2b5b from the at91bootstrap repository. Signed-off-by: Samuel Mescoff <samuel.mescoff@mobile-devices.fr> Reviewed-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
2016-02-18arm: at91: Add support for DENX MA5D4 SoM and EVKMarek Vasut
Add support for DENX MA5D4 SoM and MA5D4EVK board, based on the Atmel SAMA5D4 SoC. The SoM contains the SoC, eMMC, SPI NOR, SPI CAN controllers and DRAM, the baseboard contains UART connectors, ethernet port, microSD slot, LCD header, 2x CAN connector and a lot of expansion headers. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
2016-02-18ARM: at91: clean up the PMC_PLLICPR init codeWenyou Yang
Due to introducing the PMC_PLLICPR init function, use this function to clean up the code. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Tested-by: Heiko Schocher <hs@denx.de> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
2016-02-18ARM: at91: clock: add PMC_PLLICPR init functionWenyou Yang
To avoid the duplicated code, add the PMC_PLLICPR init function. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Tested-by: Heiko Schocher <hs@denx.de> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
2016-02-18ARM: at91: clock: add PLLB enable/disable functionsWenyou Yang
To avoid the duplicated code, add the PLLB handle functions. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com> Tested-by: Heiko Schocher <hs@denx.de> [add enable/disable functions to arm920t] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2016-02-18ARM: at91: armv7: clean up UTMI PLL handle codeWenyou Yang
Due to introducing the UTMI PLL enable function, use this function to reduce the duplicated code. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Tested-by: Heiko Schocher <hs@denx.de> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
2016-02-18ARM: at91: clock: add UTMI PLL enable/disable functionWenyou Yang
To avoid the duplicated code, add the UTMI PLL handle functions, and add PMC_USB init function too. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Tested-by: Heiko Schocher <hs@denx.de> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
2016-02-18ARM: cpu: at91: clean up peripheral clock codeWenyou Yang
Due to introducing the new peripheral clock handle functions, use these functions to clean up the duplicated code. Meanwhile, remove unneeded header file include, at91_pmc.h. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Tested-by: Heiko Schocher <hs@denx.de> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com> [fixup for arm920t code] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2016-02-18ARM: at91: clock: add a new file to handle clockWenyou Yang
To reduce the duplicated code, add a new file to accommodate the peripheral's and system's clock handle code, shared with the SoCs with different ARM core. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Tested-by: Heiko Schocher <hs@denx.de> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
2016-02-18ARM: at91: asm/at91_pmc.h: fix trival register offsetWenyou Yang
Remove unnecessary #ifdef CPU_HAS_PCR. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Tested-by: Heiko Schocher <hs@denx.de> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
2016-02-02board: atmel: sama5d2_xplained: add SPL supportWenyou Yang
The sama5d2 Xplained SPL supports the boot medias: spi flash and SD Card. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
2016-02-02arm: at91/spl: mpddrc: use IP version to check configurationWenyou Yang
To remove the unnecessary #ifdef-endif, use the mpddrc IP version to check whether or not the interleaved decoding type is supported. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
2016-02-02arm: at91/spl: mpddrc: add mpddrc DDR3-SDRAM initializationWenyou Yang
The DDR3-SDRAM initialization sequence is implemented in accordance with the DDR3-SRAM/DDR3L-SDRAM initialization section described in the SAMA5D2 datasheet. Add registers and definitions of mpddrc controller, which is used to support DDR3 devices. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
2016-02-02arm: at91/spl: mpddrc: add struct atmel_mpddrc_configWenyou Yang
Add struct atmel_mpddrc_config to accommodate the mpddrc register configurations, not using the mpddrc register map structure, struct atmel_mpddrc, in order to increase readability and reduce run-time memory use. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
2015-11-30arm: at91/spl: atmel_sfr: move saic redirect to separate fileWenyou Yang
To make saic redirect code sharing with other SoCs, move the saic redirect code from SAMA5D4 particular file, mach-at91/armv7/sama5d4_devices.c to a separate file, mach-at91/atmel_sfr.c Move ATMEL_SFR_AICREDIR_KEY definition to sama5d4.h, because each SoC has its own value. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
2015-11-30arm: at91/spl: matrix: use matrix slave id macrosWenyou Yang
To make matrix initialization code sharing with others, use the matrix slave id macros, instead of hard-coding. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
2015-11-30arm: at91/spl: matrix: remove security peripheral select codeWenyou Yang
Remove the security peripheral select code, keep the default value in these registers, that is, the peripheral address space is configured as "Secured" access, it is suitable for SPL. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
2015-11-30arm: at91/spl: matrix: remove matrix write protection codeWenyou Yang
On processor reset, the matrix write protection is disabled, so no need to disable/enable write protection when writing the matrix registers. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
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