summaryrefslogtreecommitdiff
path: root/arch/arm/mach-imx/imx8m/soc.c
AgeCommit message (Collapse)Author
2020-05-18common: Drop linux/bitops.h from common headerSimon Glass
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18common: Drop log.h from common headerSimon Glass
Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18common: Drop init.h from common headerSimon Glass
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-10imx8mp: Set default SNSR25C for TMU probe1Ye Li
So far u-boot only load SNSR25C for TMU main probe (probe 0). However, kernel enables two probes. So it also needs to set default SNSR25C of TCALIV1 for blank samples. Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10imx: load calibration parameters from fuse for i.MX8MPYe Li
i.MX8MP thermal which has two probes and supports temperature range from -40 to 125. The driver still uses default 1p HW calibration at 25C and loads calibration parameters from fuse. Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10imx: i.MX8MN: Enable loading TASR and TCALIV from fuseYe Li
Like iMX8MM, iMX8MN also needs SW to load TMU TASR and TCALIV registers value from fuse before enabling TMU calibration. Otherwise the calibration is not exact. Reviewed-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10imx8mm: Load fuse for TMU TCALIV and TASRYe Li
On iMX8MM, the default value of TMU registers TCALIV and TASR need be loaded from fuse. HW won't do this, it expect SW loads them before using TMU. Reviewed-by: Bai Ping <ping.bai@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-01ARM: imx8m: Don't use the addr parameter of reset_cpu()Claudius Heine
imx8m has the only implementation of reset_cpu() which does not ignore the addr parameter and instead gives it some meaning as the base address of watchdog registers. This breaks convention with the rest of U-Boot where the parameter is ignored and callers are passing in 0. Fixes: d2041725e84b ("imx8m: restrict reset_cpu") Co-developed-by: Harald Seiler <hws@denx.de> Signed-off-by: Harald Seiler <hws@denx.de> Signed-off-by: Claudius Heine <ch@denx.de>
2020-05-01ARM: imx8m: Fix indentation of reset_cpu() functionHarald Seiler
Use proper code-style, tabs instead of spaces for indentation. Signed-off-by: Harald Seiler <hws@denx.de>
2020-05-01ARM: imx8m: Do not define do_reset() if sysreset is enabledMarek Vasut
The SPL can also be compiled with sysreset drivers just fine, so update the condition to cater for that option. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: Flavio Suligoi <f.suligoi@asem.it> Cc: Harald Seiler <hws@denx.de> Cc: Igor Opaniuk <igor.opaniuk@toradex.com> Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com> Cc: Oleksandr Suvorov <oleksandr.suvorov@toradex.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
2020-05-01ARM: imx: imx8m: Do not warn about cpu-idle-states if missingMarek Vasut
If the cpu-idle-states is missing from the DT in the first place, do not fail on removing in. Just move on and do not even print an error, since not being able to remove something which is not there in the first place is not an error and surely does not justify failing to boot. Turn the surrounding prints into debugs to reduce the useless noise. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Frieder Schrempf <frieder.schrempf@kontron.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2020-05-01imx: imx8m: Don't use the addr parameter of reset_cpuClaudius Heine
imx8m has the only implementation of `reset_cpu` which does not ignore the addr parameter and instead gives it some meaning as the base address of watchdog registers. This breaks convention with the rest of U-Boot where the parameter is ignored and callers are passing in 0. Fixes: d2041725e84b ("imx8m: restrict reset_cpu") Co-Authored-by: Harald Seiler <hws@denx.de> Signed-off-by: Claudius Heine <ch@denx.de> Signed-off-by: Harald Seiler <hws@denx.de> Reviewed-by: Marek Vasut <marex@denx.de>
2020-05-01imx8m: Enable WDOG_B for timeoutYe Li
When doing reset_cpu, in normal case the WDOG_B outputs immediately after we clean WDA bit. But on mscale, the WDOG_B may be later than internal reset, and cause PMIC not reset. As we enabled the SD3.0 support, the PMIC must be reset to reset SD card. Change the reset_cpu to enable the WDOG_B for timeout as well, and set WDOG timeout to 1s. Reviewed-by: Fabio Estevam <festevam@gmail.com> Acked-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-01imx8m: acquire ATF commit hashPeng Fan
Acquire ATF commit hash when booting U-Boot to make user easy to know the ATF version. Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-01imx: imx8m: add i.MX8MN variants supportPeng Fan
Add i.MX8MN variants support Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-01imx: imx8m: add i.MX8MQ Dual and QuadLite supportPeng Fan
Add i.MX8MQ Dual and QuadLite variants. Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08imx8mp: set BYPASS ID SWAP to avoid AXI bus errorsPeng Fan
Set the BYPASS ID SWAP bit (GPR10 bit 1) in order for GPU not to generated AXI bus errors with TZC380 enabled. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08imx: get cpu id/type of i.MX8MPPeng Fan
Support get i.MX8MP cpu id and cpu type Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-12-09imx8m: fix rom version check to unbreak some B0 chipsPatrick Wildt
Recently the version check was improved to be able to determine that we're running on SoC revision 2.1. A check for B0 was tightened so that it now must equal 0x20 instead of being bigger than 0x20. On some B0 chips the value returned is 0x1020 instead of 0x20. This means even though it's B0, the check will fail and code relying on the correct chip revision will make wrong decisions. There is no documentation of those bits, but it seems that NXP always uses a byte to encode the revision. Thus remove the upper bits to fix the regression. Signed-off-by: Patrick Wildt <patrick@blueri.se>
2019-12-02common: Move some cache and MMU functions out of common.hSimon Glass
These functions belong in cpu_func.h. Another option would be cache.h but that code uses driver model and we have not moved these cache functions to use driver model. Since they are CPU-related it seems reasonable to put them here. Move them over. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-11-05imx: imx8m: fix boot when CONFIG_$(SPL_)CLK not definedPeng Fan
When CONFIG_$(SPL_)CLK not defined, the clock controller device not exist, so to avoid boot failure for platform not have CONFIG_$(SPL_)CLK, add a check. Reviewed-by: Patrick Wildt <patrick@blueri.se> Tested-by: Patrick Wildt <patrick@blueri.se> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-05imx8mn: add get_boot_devicePeng Fan
No ROM INFO structure on iMX8MN, use new ROM API to get boot device from ROM. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-05imx8mn: set BYPASS ID SWAP to avoid AXI bus errorsPeng Fan
Set the BYPASS ID SWAP bit (GPR10 bit 1) in order for GPU not to generated AXI bus errors with TZC380 enabled. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-05imx8mn: support get_cpu_revPeng Fan
Add a dummy cpu type and support get_cpu_rev for i.MX8MN Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-03imx8m: imx8mq: get chip rev for B1 revisionPeng Fan
The i.MX8MQ B1 uses OCOTP_HW_OCOTP_READ_FUSE_DATA register for chip id. It returns a magic number 0xff0055aa. update get_cpu_rev to support it, and enable ocotp clock to access ocotp. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08imx: replace CONFIG_SECURE_BOOT with CONFIG_IMX_HABStefano Babic
CONFIG_SECURE_BOOT is too generic and forbids to use it for cross architecture purposes. If Secure Boot is required for imx, this means to enable and use the HAB processor in the soc. Signed-off-by: Stefano Babic <sbabic@denx.de>
2019-10-08imx8m: soc: probe clock device in arch_cpu_init_dmPeng Fan
Because we need to get cpu freq in print_cpuinfo at very early stage, so we need to make sure the ccm be probed. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08imx8m: restrict reset_cpuPeng Fan
Make reset_cpu only visible when CONFIG_SYSRESET not defined or CONFIG_SPL_BUILD. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08imx8m: soc: enable SCTR clock before timer initPeng Fan
To i.MX8MM SCTR clock is disabled by ROM, so before timer init need to enable it. To i.MX8MQ, it does not hurt the clock is enabled again. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08imx8m: Configure trustzone region 0 for non-secure accessYe Li
Set trustzone region 0 to allow both non-secure and secure access when trust zone is enabled. We found USB controller fails to access DDR if the default region 0 is secure access only. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08imx8m: set BYPASS ID SWAP to avoid AXI bus errorsPeng Fan
set the BYPASS ID SWAP bit (GPR10 bit 1) in order for GPU not to generated AXI bus errors with TZC380 enabled. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08imx8m: Fix MMU table issue for OPTEE memoryPeng Fan
When running with OPTEE, the MMU table in u-boot does not remove the OPTEE memory from its settings. So ARM speculative prefetch in u-boot may access that OPTEE memory. Due to trust zone is enabled by OPTEE and that memory is set to secure access, then the speculative prefetch will fail and cause various memory issue in u-boot. The fail address register and int_status register in trustzone has logged that speculative access from u-boot. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08imx: add get_cpu_rev support for i.MX8MMPeng Fan
There are several variants based on i.MX8MM, add the support in get_cpu_rev Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-04-25imx: i.MX8MQ: clear ocotp error bitPeng Fan
In case ocotp error bit is set, clear it. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-01-01imx: rename mx8m,MX8M to imx8m,IMX8MPeng Fan
Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>