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path: root/arch/arm/mach-imx/mx6
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2019-10-08DM: SPI: Convert display5 to use SPI with DM/DTS (but no in SPL)Lukasz Majewski
The DM/DTS support for SPI is disabled on purpose for SPL, as it is not supported as of time of this conversion. Signed-off-by: Lukasz Majewski <lukma@denx.de>
2019-10-08DM: eth: Switch display5 board to use DM_ETHLukasz Majewski
After this commit the display5 device would use FEC driver supporting driver model (DM_ETH). Signed-off-by: Lukasz Majewski <lukma@denx.de>
2019-10-08DM: mmc: Switch display5 board to use DM_MMC and BLK (USDHC)Lukasz Majewski
After this commit the display5 device would use eMMC driver supporting driver model (DM_MMC and BLK). Signed-off-by: Lukasz Majewski <lukma@denx.de>
2019-10-08DM: I2C: Switch display5 board to use DM_I2CLukasz Majewski
After this commit the display5 device would use I2C driver supporting driver model (DM_I2C). The 'i2c' and 'eeprom' commands now use DM I2C drivers and initialize on-bus devices according to device tree description. Signed-off-by: Lukasz Majewski <lukma@denx.de>
2019-10-08pico-imx6: Add initial supportFabio Estevam
Add the initial support for the pico-imx6 variants. DDR initialization is based on the TechNexion's U-Boot code. Signed-off-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Fabio Berton <fabio.berton@ossystems.com.br> Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2019-10-08mx6: clock: Allow enable_ipu_clock() to be built for SPL codeFabio Estevam
Allow enable_ipu_clock() to be built for SPL code. This is done in preparation for configuring the NoC registers on i.MX6QP in SPL. Signed-off-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2019-10-08ARM: imx: Support larger SPL size on IMX6DQRobert Hancock
Previously the SPL size on all iMX6 platforms was restricted to 68KB because the OCRAM size on iMX6SL/DL parts is only 128KB. However, the other iMX6 variants have 256KB of OCRAM. Add an option CONFIG_MX6_OCRAM_256KB which allows using the full size on boards which don't need to support the SL/DL variants. This allows for an SPL size of 196KB, which makes it much easier to use configurations such as SPL with driver model and FDT control. Signed-off-by: Robert Hancock <hancock@sedsystems.ca> Tested-by: Adam Ford <aford173@gmail.com> #imx6q_logic
2019-10-08imx: apalis_imx6: select MX6Q via KconfigRicardo Salveti
Toradex Apalis iMX6 modules are available in the iMX6D and iMX6Q variants, which are quite similar and already managed via only one dtb in u-boot (imx6-apalis.dtb). Select MX6Q via Kconfig by default in order to automatically enable the HAS_CAAM and MX6_SMP features. Signed-off-by: Ricardo Salveti <ricardo@foundries.io> Reviewed-by: Peng Fan <peng.fan@nxp.com> Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
2019-10-08imx: add i.MX6ULZ cpu typePeng Fan
Add i.MX6ULZ cpu type and helper. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2019-08-11env: Drop environment.h header file where not neededSimon Glass
This header file is now only used by files that access internal environment features. Drop it from various places where it is not needed. Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Simon Glass <sjg@chromium.org>
2019-08-11env: Move get/set_default_env() to env.hSimon Glass
Move these functions to the new header file and rename set_default_env() to env_set_default() so that it has a consistent env_ prefix. Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Simon Glass <sjg@chromium.org>
2019-08-11env: Move env_set() to env.hSimon Glass
Move env_set() over to the new header file. Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Simon Glass <sjg@chromium.org>
2019-07-29colibri-imx6ull: support building with DM_VIDEO=yIgor Opaniuk
1. This fixes linking issues when building with DM_VIDEO enabled mxsfb driver. 2. Provide proper defines for both VIDEO=y and DM_VIDEO=y. Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2019-07-19imx6dq: Fix chip version issue for rev1.3Ye Li
According to iMX6DQ RM, the minor field (low 8 bits) in DIGPROG is not aligned on silicon revision 1.3. So update get_cpu_rev to correct the revision. 0x00630002 Silicon revision 1.2 0x00630005 Silicon revision 1.3 0x00630006 Silicon revision 1.6 Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-06-23Convert to use fsl_esdhc_imx for i.MX platformsYangbo Lu
Converted to use fsl_esdhc_imx for i.MX platforms. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Tested-by: Steffen Dirkwinkel <s.dirkwinkel@beckhoff.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Martyn Welch <martyn.welch@collabora.com> Acked-by: Jason Liu <Jason.hui.liu@nxp.com>
2019-06-11ARM: imx: Rename VINING|2000Marek Vasut
The company Samtec was merged into Softing, migrate the board over to the new name and update copyright headers. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Silvio Fricke <silvio.fricke@softing.com> Cc: Stefano Babic <sbabic@denx.de>
2019-06-11imx: Extend PCL063 support for phyCORE-i.MX6ULL SOMParthiban Nallathambi
Extend PHYTEC phyBOARD-i.MX6UL for phyCORE-i.MX6UL SoM (PCL063) with eMMC on SoM. CPU: Freescale i.MX6ULL rev1.0 792 MHz (running at 396 MHz) CPU: Industrial temperature grade (-40C to 105C) at 38C Reset cause: POR Model: Phytec phyBOARD-i.MX6ULL-Segin SBC Board: PHYTEC phyCORE-i.MX6ULL DRAM: 256 MiB MMC: FSL_SDHC: 0, FSL_SDHC: 1 In: serial@02020000 Out: serial@02020000 Err: serial@02020000 Net: FEC0 Working: - Eth0 - i2C - MMC/SD - eMMC - UART (1 & 5) - USB (host & otg) Signed-off-by: Parthiban Nallathambi <parthitce@gmail.com>
2019-06-11opos6ul: set REFSEL and REFR fieldsSébastien Szymanski
Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
2019-04-25imx: Add variscite DART-6UL Evaluation KitParthiban Nallathambi
Port for the DART-6UL Evaluation Kit SBC. Based on the variscite DART-6UL iMX6ULL SoM. CPU: Freescale i.MX6ULL rev1.1 900 MHz (running at 396 MHz) CPU: Commercial temperature grade (0C to 95C) at 43C Reset cause: POR Model: Variscite DART-6UL Evaluation Kit Board: Variscite DART-6UL Evaluation Kit DRAM: 512 MiB MMC: FSL_SDHC: 0, FSL_SDHC: 1 In: serial@02020000 Out: serial@02020000 Err: serial@02020000 Net: FEC0 Working: - Eth0 - i2c - MMC/SD - eMMC - USB host - UART 1 Note: LCDIF porting needs DM_VIDEO https://lists.denx.de/pipermail/u-boot/2019-April/365506.html Signed-off-by: Parthiban Nallathambi <parthitce@gmail.com>
2019-03-13pico-imx6ul: Convert to DM MMCFabio Estevam
Select CONFIG_DM_MMC=y in order to support MMC driver model. This allows the MMC board related code to be removed. Signed-off-by: Fabio Estevam <festevam@gmail.com> Acked-by: Otavio Salvador <otavio@ossystems.com.br>
2019-01-28imx: Add PHYTEC phyBOARD-i.MX6UL-SeginMartyn Welch
Port for the PHYTEC phyBOARD-i.MX6UL-Segin single board computer. Based on the PHYTEC phyCORE-i.MX6UL SOM (PCL063). CPU: Freescale i.MX6UL rev1.2 528 MHz (running at 396 MHz) CPU: Industrial temperature grade (-40C to 105C) at 44C Reset cause: POR Board: PHYTEC phyCORE-i.MX6UL I2C: ready DRAM: 256 MiB NAND: 512 MiB MMC: FSL_SDHC: 0 In: serial Out: serial Err: serial Net: FEC0 Working: - Eth0 - i2C - MMC/SD - NAND - UART (1 & 5) - USB (host & otg) Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
2019-01-10Kconfig: rename CONFIG_SPL_USB_GADGET_SUPPORT as CONFIG_SPL_USB_GADGETJean-Jacques Hiblot
The SPL option for USB gadget should be named after the option for u-boot (CONFIG_USB_GADGET) Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2019-01-01embestmx6boards: Add SPL supportFabien Lahoudere
In order to boot faster with falcon mode, we need to add SPL support to riotboard. Signed-off-by: Fabien Lahoudere <fabien.lahoudere@collabora.com>
2018-11-08imx: imx6: perform gpr_init only on suitable cpu typesChristoph Niedermaier
If the function gpr_init is used in a common MX6 spl implementation we have to ensure that it is only called for suitable cpu types, otherwise it breaks hardware parts like enet1, can1, can2, etc. Signed-off-by: Christoph Niedermaier <cniedermaier@dh-electronics.de>
2018-09-14pico-imx6ul: Convert to SPLFabio Estevam
There are two versions of imx6ul pico SOMs: one with 256MB and another one with 512MB of RAM. Convert to SPL so that both versions can be supported. This patch doesn't rework the clock initialization to avoid changing the behavior in this same patch, so it will be cleaned up in future. Currently only the 256MB is tested/supported. Signed-off-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Fabio Berton <fabio.berton@ossystems.com.br> Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2018-07-30dm: Change CMD_DM enablingMichal Simek
CMD_DM is used for debug purpose and it shouldn't be enabled by default via Kconfig. Unfortunately this is in the tree for quite a long time that's why solution is to use imply DM for all targets which are enabling DM. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
2018-07-30Kconfig: Sort bool, default, select and imply optionsMichal Simek
Fix Kconfig bool, default, select and imply options to be alphabetically sorted. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2018-07-30Kconfig: Replace spaces with tabs and missing newlineMichal Simek
Trivial Kconfig cleanup. Use tabs instead of spaces and every Kconfig entry should be separated by newline. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
2018-07-23imx: i.mx6q: imx6q_logic: Migrate to SPL and enable SDPAdam Ford
Since the vast majority of i.MX6 boards are migrating to SPL, this patch converts im6q_logic to SPL and enables the SDP for loading SPL and u-boot.img over USB. The Falcon mode only supports NAND flash as of now due to limited space/RAM, but all i.MX6D/Q SOM's from Logic PD have internal NAND from which to boot. Signed-off-by: Adam Ford <aford173@gmail.com>
2018-07-23imx: imx6: Add comment to gpr_init functionMichael Trimarchi
This function can be used only for some of the nxp SoC. Make it explicit in the comment. This adjust a bit commit 3aa4b703b483f165dd ("imx: imx6: Move gpr_init() function to soc.c") Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2018-07-23imx: mx6: Fix implementantion reset_miscMichael Trimarchi
lcdif_power_down should not be included in spl build to avoid build failure introduced by commit eb111bb31d882877e75e6b8083808dcaf6493b92 Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2018-07-23board: toradex: add Colibri iMX6ULL supportStefan Agner
Add support for the Colibri iMX6ULL module which comes with on-board raw NAND. Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2018-07-19env: common: accept flags on reset to default envYaniv Levinsky
The function set_default_env() sets the hashtable flags for import_r(). Formally set_default_env() doesn't accept flags from its callers. In practice the caller can (un)set the H_INTERACTIVE flag, but it has to be done using the first character of the function's string argument. Other flags like H_FORCE can't be set by the caller. Change the function to accept flags argument. The benefits are: 1. The caller will have to explicitly set the H_INTERACTIVE flag, instead of un-setting it using a special char in a string. 2. Add the ability to propagate flags from the caller to himport(), especially the H_FORCE flag from do_env_default() in nvedit.c that currently gets ignored for "env default -a -f" commands. 3. Flags and messages will not be coupled together. A caller will be able to set flags without passing a string and vice versa. Please note: The propagation of H_FORCE from do_env_default() does not introduce any functional changes, because currently himport_r() is set to destroy the old environment regardless if H_FORCE flag is set or not. More changes are needed to utilize the propagation of H_FORCE. Signed-off-by: Yaniv Levinsky <yaniv.levinsky@compulab.co.il> Acked-by: Igor Grinberg <grinberg@compulab.co.il>
2018-06-19common: Fix cpu nr type which is always unsigned typeMichal Simek
cpu_cmd() is reading cpu number via simple_strtoul() which is always unsigned type. Platform code implementations are not expecting that nr can be negative and there is not checking in the code for that too. This patch is using u32 type for cpu number to make sure that platform code get proper value range. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-18i.MX6DL: mamoj: Add PFUZE100 supportJagan Teki
MX6DL Mamoj boards has Freescale PFUZE100 PMIC, add support for it through DM_PMIC dt definition. pmic log: Reviewed-by: Stefano Babic <sbabic@denx.de> ======== => pmic list | Name | Parent name | Parent uclass @ seq | pfuze100@08 | i2c@021f8000 | i2c @ 3 => pmic dev pfuze100@08 dev: 0 @ pfuze100@08 => pmic dump Dump pmic: pfuze100@08 registers 0x00: 10 00 00 21 00 01 3f 01 00 7f 00 00 00 00 00 81 0x10: 00 00 3f 00 00 00 00 00 00 00 00 10 00 00 00 00 0x20: 2b 2b 2b 08 c4 00 00 00 00 00 00 00 00 00 2b 2b 0x30: 2b 08 c4 00 00 72 72 72 08 d4 00 00 2c 2c 2c 08 0x40: e4 00 00 2c 2c 2c 08 e4 00 00 6f 6f 6f 08 f4 00 0x50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0x60: 00 00 00 00 00 00 48 00 00 00 10 06 1e 1e 17 10 0x70: 1a 1f 00 00 00 00 00 00 00 00 00 00 00 00 00 Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Simone CIANNI <simone.cianni@bticino.it> Signed-off-by: Raffaele RECALCATI <raffaele.recalcati@bticino.it>
2018-05-18i.MX6DL: mamoj: Add I2C supportJagan Teki
i.MX6DL Mamoj has i2c3 and i2c4 buses, add support through DM_I2C with dt definition. i2c log: Reviewed-by: Stefano Babic <sbabic@denx.de> ======= => i2c bus Bus 2: i2c@021a8000 Bus 3: i2c@021f8000 => i2c dev 2 Setting bus to 2 => i2c speed 400000 Setting bus speed to 400000 Hz => i2c probe Valid chip addresses: 20 51 53 => i2c md 53 0xff 00ff: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ => i2c md 51 0xff 00ff: a8 08 40 50 09 43 46 52 42 18 80 8e ae a9 d0 53 ..@P.CFRB......S => i2c dev 3 Setting bus to 3 => i2c speed 100000 Setting bus speed to 100000 Hz => i2c probe Valid chip addresses: 08 40 48 4B => i2c md 08 0xff 00ff: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Simone CIANNI <simone.cianni@bticino.it> Signed-off-by: Raffaele RECALCATI <raffaele.recalcati@bticino.it>
2018-05-18i.MX6: board: Add BTicino i.MX6DL Mamoj initial supportJagan Teki
Add initial support for i.MX6DL BTicino Mamoj board. Mamoh board added: - SPL - SPL_DM - SPL_OF_CONTROL - DM for U-Boot proper - OF_CONTROL for U-Boot proper - eMMC - FEC - Boot from eMMC - Boot from USB SDP Signed-off-by: Simone CIANNI <simone.cianni@bticino.it> Signed-off-by: Raffaele RECALCATI <raffaele.recalcati@bticino.it> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-05-17mx6: Select CONFIG_MP with MX6_SMPPeter Robinson
It makes sense to select the MP multi processor option at the same time we select the other SMP options needed for SMP capable i.MX6 SoCs. Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
2018-05-17board: ge: bx50v3: remove redundant targetsIan Ray
This replaces TARGET_GE_B{4,6,8}50V3 with common TARGET_GE_BX50V3. The boards are identified automatically at runtime. Signed-off-by: Ian Ray <ian.ray@ge.com> Signed-off-by: Nandor Han <nandor.han@ge.com> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
2018-05-07SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-26imx6ul: opos6ul: in Serial Downloader boot mode use ymodemSébastien Szymanski
When booting in Serial Downloader mode load the U-Boot image using ymodem. Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
2018-04-26imx6ul: opos6ul: add SPL_DM supportSébastien Szymanski
Since commit commit 152038ea1886 ("i.MX6UL: icore: Add SPL_OF_CONTROL support") the OPOS6UL board doesn't boot anymore. Adding SPL_DM support makes the board boot again. Fixes: commit 152038ea1886 ("i.MX6UL: icore: Add SPL_OF_CONTROL support") Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
2018-04-15imx: board: Add support for the K+P's kp_imx6q_tpc boardLukasz Majewski
This commit provides support for Kieback & Peter GmbH IMX6Q based TPC board. U-boot console output: U-Boot SPL 2018.05-rc1-00005-g631e2d01fd (Apr 04 2018 - 21:16:24 +0200) Trying to boot from MMC1 U-Boot 2018.05-rc1-00005-g631e2d01fd (Apr 04 2018 - 21:16:24 +0200) CPU: Freescale i.MX6Q rev1.5 996 MHz (running at 792 MHz) CPU: Extended Commercial temperature grade (-20C to 105C) at 37C Reset cause: POR Board: K+P KP_IMX6Q_TPC i.MX6Q Watchdog enabled I2C: ready DRAM: 2 GiB MMC: FSL_SDHC: 0, FSL_SDHC: 1 Loading Environment from MMC... OK In: serial Out: serial Err: serial Net: FEC [PRIME] Autoboot in 3 seconds
2018-04-15ARM: mx6: ddr: Add write leveling correction codeMarek Vasut
When the DDR calibration is enabled, a situation may happen that it will fail on a few select boards out of a whole production lot. In particular, after the first write leveling stage, the MPWLDECTRLx registers will contain a value 0x1nn , for nn usually being 0x7f or slightly lower. What this means is that the HW write leveling detected that the DQS rising edge on one or more bundles arrives slightly _after_ CLK and therefore when the DDR DRAM samples CLK on the DQS rising edge, the CLK signal is already high (cfr. AN4467 rev2 Figure 7 on page 18). The HW write leveling then ends up adding almost an entire cycle (thus the 0x17f) to the DQS delay, which indeed aligns it, but also triggers subsequent calibration failure in DQS gating due to this massive offset. There are two observations here: - If the MPWLDECTRLx value is corrected from 0x17f to 0x0 , then the DQS gating passes, the entire calibration passes as well and the DRAM is perfectly stable even under massive load. - When using the NXP DRAM calibrator for iMX6/7, the value 0x17f or so in MPWLDECTRx register is not there, but it is replaced by 0x0 as one would expect. Someone from NXP finally explains why, quoting [1]: " Having said all that, the DDR Stress Test does something that we do not advertise to the users. The Stress Test iself looks at the values of the MPWLDECTRL0/1 fields before reporting results, and if it sees any filed with a value greater than 200/256 delay (reported as half-cycle = 0x1 and ABS_OFFSET > 0x48), the DDR Stress test will reset the Write Leveling delay for this lane to 0x000 and not report it in the log. The reason that the DDR Stress test does this is because a delay of more than 78% a clock cycle means that the DQS edge is arriving within the JEDEC tolerence of 25% of the clock edge. In most cases, DQS is arriving < 5% tCK of the SDCLK edge in the early case, and it does not make sense to delay the DQS strobe almost a full clock cycle and add extra latency to each Write burst just to make the two edges align exactly. In this case, we are guilty of making a decision for the customer without telling them we are doing it so that we don't have to provide the above explanation to every customer. They don't need to know it. " This patch adds the correction described above, that is if the MPWLDECTRx value is over 0x148, the value is corrected back to 0x0. [1] https://community.nxp.com/thread/456246 Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Eric Nelson <eric@nelint.com> Reviewed-by: Stefano Babic <sbabic@denx.de>
2018-03-05libfdt: move headers to <linux/libfdt.h> and <linux/libfdt_env.h>Masahiro Yamada
Thomas reported U-Boot failed to build host tools if libfdt-devel package is installed because tools include libfdt headers from /usr/include/ instead of using internal ones. This commit moves the header code: include/libfdt.h -> include/linux/libfdt.h include/libfdt_env.h -> include/linux/libfdt_env.h and replaces include directives: #include <libfdt.h> -> #include <linux/libfdt.h> #include <libfdt_env.h> -> #include <linux/libfdt_env.h> Reported-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-02-22imx6q: engicam: Use SPL_LOAD_FIT for MMC boardsJagan Teki
Currently SPL_LOAD_FIT is unable to boot from nand on i.MX6QDL platform, so enable only for MMC boards. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-02-04imx: cleanup bootauxPeng Fan
Move i.MX6/7 bootaux code to imx_bootaux.c. The i.MX6/7 has different src layout, so define M4 reg offset to ease the cleanup. Redefine the M4 related BIT for share common code. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com>
2018-02-04imx: refactor imx_get_mac_from_fusePeng Fan
Move imx_get_mac_from_fuse to a new mac.c for i.MX6/7. Since fuse regs structure are different for i.MX6/7, use mac address offset in code and define a new local struture imx_mac_fuse. Also sort the config order. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Stefano Babic <sbabic@denx.de>
2018-01-26Merge git://git.denx.de/u-boot-spiTom Rini
2018-01-24wait_bit: use wait_for_bit_le32 and remove wait_for_bitÁlvaro Fernández Rojas
wait_for_bit callers use the 32 bit LE version Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
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