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path: root/arch/arm/mach-k3/common.h
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2020-01-03arm: mach-k3: Enable WA for R5F deadlockLokesh Vutla
On K3 devices there are 2 conditions where R5F can deadlock: 1.When software is performing series of store operations to cacheable write back/write allocate memory region and later on software execute barrier operation (DSB or DMB). R5F may hang at the barrier instruction. 2.When software is performing a mix of load and store operations within a tight loop and store operations are all writing to cacheable write back/write allocates memory regions, R5F may hang at one of the load instruction. To avoid the above two conditions disable linefill optimization inside Cortex R5F which will make R5F to only issue up to 2 cache line fills at any point of time. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-10-11arm: k3: Add support for printing CPUINFOLokesh Vutla
Add support for printing CPU info for all K3 devices. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-10-11arm: K3: common: Allow for early console functionalityAndreas Dannenberg
Implement an early console functionality in SPL that can be used before the main console is being brought up. This helps in situations where the main console is dependent on System Firmware (SYSFW) being up and running, which is usually not the case during the very early stages of boot. Using this early console functionality will allow for an alternate serial port to be used to support things like UART-based boot and early diagnostic messages until the main console is ready to get activated. Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
2018-11-16armv7R: K3: am654: Enable MPU regionsLokesh Vutla
Enable MPU regions for AM654 evm: - Region0: 0x00000000 - 0xFFFFFFFF: Device memory, not executable - Region1: 0x41c00000 - 0x42400000: Normal, executable, WB, Write alloc - Region2: 0x80000000 - 0xFFFFFFFF: Normal, executable, WB, Write alloc - region3-15: Disabled With this dcache can be enabled either in SPL or U-Boot. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>