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path: root/arch/arm/mach-rockchip/rk3288/sdram_rk3288.c
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2016-03-14dm: Use uclass_first_device_err() where it is usefulSimon Glass
Use this new function in places where it simplifies the code. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-03-10rockchip: rk3288: correct sdram settingChris Zhong
The DMC driver in v3.14 kernel[0] get the ddr setting from PMU_SYS_REG2, and it expects uboot to store the value using a same protocol. But now the ddr setting value is different with DMC, so if you enable the DMC, system would crash in kernel. Correct the sdram setting here, according to the requirements of kernel. [0] https://chromium.googlesource.com/chromiumos/third_party/kernel/+/ chromeos-3.14/drivers/clk/rockchip/clk-rk3288-dmc.c Signed-off-by: Chris Zhong <zyw@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-01-21rockchip: spl: Support full-speed CPU in SPLSimon Glass
Add a feature which speeds up the CPU to full speed in SPL to minimise boot time. This is only supported for certain boards (at present only jerry). Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21rockchip: sdram: Use syscon_get_first_range() where possibleSimon Glass
This is a shortcut to obtaining a register address. Use it where possible, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21rockchip: sdram: Tidy up a few commentsSimon Glass
Fix spaces in two comments in this file. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21rockchip: sdram: Use the rk_clr/setreg() interfaceSimon Glass
Use this function in preference to the macro. Signed-off-by: Simon Glass <sjg@chromium.org>
2015-09-02rockchip: rk3288: Add SDRAM initSimon Glass
Add code to set up the SDRAM in SPL, ready for loading U-Boot. This uses device tree for configuration so should be able to support other RAM configurations. It may be possible to generalise the code to support other SoCs at some point. Signed-off-by: Simon Glass <sjg@chromium.org>