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2019-01-26linker: Modify linker scripts to be more genericTom Rini
Make use of "IMAGE_MAX_SIZE" and "IMAGE_TEXT_BASE" rather than CONFIG_SPL_MAX_SIZE and CONFIG_SPL_TEXT_BASE. This lets us re-use the same script for both SPL and TPL. Add logic to scripts/Makefile.spl to pass in the right value when preprocessing the script. Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Jagan Teki <jagan@openedev.com> Cc: Maxime Ripard <maxime.ripard@bootlin.com> Cc: Andreas Bießmann <andreas@biessmann.org> Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Cc: Michal Simek <monstr@monstr.eu> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: York Sun <york.sun@nxp.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Heiko Schocher <hs@denx.de> Cc: Adam Ford <aford173@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Tested-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Tested-by: Adam Ford <aford173@gmail.com> #da850evm & omap3_logic_somlv Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-01-26rockchip: Add TPL_MAX_SIZE for RK3288Tom Rini
Per Kever Yang, 32768 is a reasonable max size for TPL on RK3288. Cc: Kever Yang <kever.yang@rock-chips.com> Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-01-02rockchip: rk3036: ram: update licenseKever Yang
All the source code of sdram_rk3036.c are from Rockchip, update the copyright to owned by Rockchip. Because rockchip may use this copy of code both for open source project and internal project, update the license to use both GPL2.0+ and BSD-3 Clause. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-01-02rockchip: sdram-common: fix wrong size for 4GB in 32bit SoCKever Yang
This is workaround for issue we can't get correct size for 4GB ram in 32bit system and available before we really need ram space out of 4GB, eg.enable ARM LAPE(rk3288 supports 8GB ram). The size of 4GB is '0x1 00000000', and this value will be truncated to 0 in 32bit system, and system can not get correct ram size. Rockchip SoCs reserve a blob of space for peripheral near 4GB, and we are now setting SDRAM_MAX_SIZE as max available space for ram in 4GB, so we can use this directly to workaround the issue. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-By: Vagrant Cascadian <vagrant@debian.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
2018-12-16ARM: rockchip: Add rv1108-elgin-r1 board supportOtavio Salvador
Add the initial support for Elgin R1 board, which is based on the RV1108 SoC and has the following features currently supported in U-Boot: - UART - eMMC - USB Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-12-06rockchip: rk3399: Add common Rock960 family from VamrsManivannan Sadhasivam
Rock960 is a family of boards based on Rockchip RK3399 SoC from Vamrs. It consists of Rock960 (Consumer Edition) and Ficus (Enterprise Edition) 96Boards. Below are some of the key differences between both Rock960 and Ficus boards: 1. Different host enable GPIO for USB 2. Different power and reset GPIO for PCI-E 3. No Ethernet port on Rock960 The common board support will be utilized by both boards. The device tree has been organized in such a way that only the properties which differ between both boards are placed in the board specific dts and the reset of the nodes are placed in common dtsi file. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> [Added instructions for SD card boot] Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Peter Robinson <pbrobinson@gmail.com>
2018-11-30rockchip: rk3188: use board_debug_uart_init() for UART io initKever Yang
Sync with other rockchip SoCs, use board_debug_uart_init() to init default UART iomux. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-11-30ARM: rockchip: rv1108: Add a board_usb_init for USB OTGOtavio Salvador
Like it is done for other Rockchip SoCs, introduce a board_usb_init() function so that USB OTG can be functional on rv1108 too. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-11-30rockchip: rk3399: spl: always report errors triggering a hard stopPhilipp Tomsich
The RK3399 SPL has two cases that may end in a hard-stop: if either the pinctrl can not be initialised or if the DRAM fails to initialise. Both have previously not triggered an error message unless DEBUG was defined (i.e. both used debug() to print the error). This converts both error messages to be printed using pr_err() to ensure that some output points to the cause of the hard-stop. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-11-30rockchip: rk3188: fix early uart setupHeiko Stuebner
Commit 7a6d7d3e1279 ("rockchip: pinctrl: rk3188: Move the iomux definitions into pinctrl-driver") moved the iomux settings out of the grf header to prevent conflicts with the iomux definitions of other rockchip socs. This also breaks the early uart setup, as the iomux for uart2 are needed. To fix that just put the tiny amount of needed iomux definitions next to the early uart code. Fixes: 7a6d7d3e1279 ("rockchip: pinctrl: rk3188: Move the iomux definitions into pinctrl-driver") Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-11-30rockchip: rk3188: add support for usb-uart functionalityHeiko Stuebner
Rockchip socs can route the debug uart pins through the d+ and d- pins of one specific usbphy per soc. Add a config option and implement the setting on the rk3188. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> [Fixed up to mark grf as maybe unused:] Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-10-04rockchip: make_fit_atf: make python3 compatibleMian Yousaf Kaukab
Make script python3 compatible. No functional changes intended. Signed-off-by: Mian Yousaf Kaukab <yousaf.kaukab@suse.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-10-04rockchip: make_fit_atf: use elf entry pointMian Yousaf Kaukab
make_fit_atf.py uses physical address of first segment as the entry point to bl31. It is incorrect and causes following abort when bl31_entry() is called: U-Boot SPL board initTrying to boot from MMC1 "Synchronous Abort" handler, esr 0x02000000 elr: 0000000000000000 lr : 00000000ff8c7e8c x 0: 00000000ff8e0000 x 1: 0000000000000000 x 2: 0000000000000000 x 3: 00000000ff8e0180 x 4: 0000000000000000 x 5: 0000000000000000 x 6: 0000000000000030 x 7: 00000000ff8e0188 x 8: 00000000000001e0 x 9: 0000000000000000 x10: 000000000007fcdc x11: 00000000002881b8 x12: 00000000000001a2 x13: 0000000000000198 x14: 000000000007fdcc x15: 00000000002881b8 x16: 00000000003c0724 x17: 00000000003c0718 x18: 000000000007fe80 x19: 00000000ff8e0000 x20: 0000000000200000 x21: 00000000ff8e0000 x22: 0000000000000000 x23: 000000000007fe30 x24: 00000000ff8d1c3c x25: 00000000ff8d5000 x26: 00000000deadbeef x27: 00000000000004a0 x28: 000000000000009c x29: 000000000007fd90 Fix it by using the entry point from the elf header. Signed-off-by: Mian Yousaf Kaukab <yousaf.kaukab@suse.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-10-04rockchip: add fit source file for pack itb with op-teeKever Yang
We package U-Boot and OP-TEE into one itb file for SPL, so that we can support OP-TEE in SPL. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-10-04rockchip: make_fit_atf: fix warning unit_address_vs_regKever Yang
Patch fix warning: /builddir/BUILD/u-boot-2018.05-rc2/"arch/arm/mach-rockchip/make_fit_atf.py" \ arch/arm/dts/rk3399-firefly.dtb > u-boot.its ./tools/mkimage -f u-boot.its -E u-boot.itb >/dev/null && cat /dev/null u-boot.itb.tmp: Warning (unit_address_vs_reg): Node /images/uboot@1 has a unit name, but no reg property u-boot.itb.tmp: Warning (unit_address_vs_reg): Node /images/atf@1 has a unit name, but no reg property u-boot.itb.tmp: Warning (unit_address_vs_reg): Node /images/atf@2 has a unit name, but no reg property u-boot.itb.tmp: Warning (unit_address_vs_reg): Node /images/atf@3 has a unit name, but no reg property u-boot.itb.tmp: Warning (unit_address_vs_reg): Node /images/fdt@1 has a unit name, but no reg property u-boot.itb.tmp: Warning (unit_address_vs_reg): Node /configurations/config@1 has a unit name, but no reg property make[1]: Leaving directory '/builddir/BUILD/u-boot-2018.05-rc2/builds/firefly-rk3399' Reported-by: Peter Robinson <pbrobinson@gmail.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Peter Robinson <pbrobinson@gmail.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-08-21dm: convert device_get_global_by_of_offset() to device_get_global_by_ofnode()Jean-Jacques Hiblot
Also add device_find_global_by_ofnode() that also find a device based on the OF node, but doesn't probe the device. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-07-30Kconfig: Sort bool, default, select and imply optionsMichal Simek
Another round of sorting Kconfig entries aplhabetically. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Alexey Brodkin <abrodkin@synopsys.com> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
2018-07-21rockchip: veyron: Set vcc33_sd regulator valueCarlo Caione
On the veyron board the vcc33_sd regulator is used as vmmc-supply for the SD card. This regulator is powered in the MMC core during power on but its value is never actually set. In the veyron platform the reset value for the LDO output is 1.8V while the standard (min and max) value for this regulator defined in the DTS is 3.3V. When the MMC core enable the regulator without setting its value, the output is automatically set to 1.8V instead of 3.3V. With this patch we preemptively set the value to 3.3V. Signed-off-by: Carlo Caione <carlo@endlessm.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-07-21rk3288: Disable JTAG function from sdmmc0 IOCarlo Caione
The GRF_SOC_CON0.grf_force_jtag bit is automatically set at boot and it is preventing the SDMMC to work correctly. Disable the JTAG function on the assumption that a working SD has higher priority over JTAG. Signed-off-by: Carlo Caione <carlo@endlessm.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-07-21rk3288: veyron: Init boot-on regulatorsCarlo Caione
Use regulators_enable_boot_on() to init all the regulators with regulator-boot-on property. Signed-off-by: Carlo Caione <carlo@endlessm.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-07-21rockchip: rk3399: spl: add missing \n to outputHeinrich Schuchardt
Without the patch SPL (in case of an error) creates an output like: U-Boot SPL board initMissing DTB The patch adds the missing line feed. So now we get: U-Boot SPL board init Missing DTB Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-07-21rockchip: rk3399: inject 'u-boot, spl-boot-device' for next-stagePhilipp Tomsich
This implements the new 'spl_perform_fixups' hook for RK3399-based boards and injects the /chosen/u-boot,spl-boot-device with an ofpath corresponding to the boot device used. The intended usage is for the full U-Boot stage to evaluate this in scripts and then adapt its boot-order when using distro-boot. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
2018-07-21rockchip: rk3188: add rk_board_late_init() hookAlexander Kochetkov
All other rockchip boards have rk_board_late_init() hook, so add it to rk3188 boards also. Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-05-30fastboot: Rename fb_set_reboot_flag to fastboot_set_reboot_flagAlex Kiernan
Rename fb_set_reboot_flag to fastboot_set_reboot_flag so it matches all other fastboot code in the global name space. Fix the guards around them so that they're dependent on FASTBOOT, not just USB_FUNCTION_FASTBOOT. Move the weak implementation of fastboot_set_reboot_flag to fb_common.c so we can call it from non-USB fastboot code. Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-05-07arm: v7: Kconfig: Rename CPU_V7 as CPU_V7ALokesh Vutla
Currently CPU_V7 kconfig symbol supports only ARMv7A architectures under armv7 folder. This led to a misconception of creating separate folders for armv7m and armv7r. There is no reason to create separate folder for other armv7 based architectures when it can co-exist with few Kconfig symbols. As a first step towards a common folder, rename CPU_V7 as CPUV7A. Later separate Kconfig symbols can be added for CPU_V7R and CPU_V7M and can co exist in the same folder. Reviewed-by: Tom Rini <trini@konsulko.com> Tested-by: Michal Simek <michal.simek@xilinx.com> Suggested-by: Alexander Graf <agraf@suse.de> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-05-07SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-27Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTRTom Rini
We have a large number of places where while we historically referenced gd in the code we no longer do, as well as cases where the code added that line "just in case" during development and never dropped it. Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-25rockchip: enable SYS_NS16550 for all SoCs by defaultKever Yang
All rockchip SoCs can use ns16550 driver, enable it for all and set SYS_NS16550_MEM32 for all SoCs. Version-changes: 2 - use imply instead of select Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-04-25rockchip: rk322x: update MACRO for back-to-bromKever Yang
The MACRO has been update after: ee14d29 rockchip: back-to-bootrom: split BACK_TO_BOOTROM for TPL/SPL We need to update the C code for it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-04-25arm: rockchip: make_fit_atf: remove unneeded importsPatrick Uiterwijk
These imports are entirely unused in the entire script. Signed-off-by: Patrick Uiterwijk <patrick@puiterwijk.org> Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-04-25rockchip: rk3188: use DM timer instead of rk_timerKever Yang
Disable rk_timer as SYS timer and use DM timer instead, so that we can get a better timer framework, the rk_timer is going to be clean after we conver to use DM timer or ARM arch/generic timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-02-24rockchip: rk3288: Fix wrong TPL_TEXT_BASEJagan Teki
TPL offset 0xff704004 is unaligned address which is adding nearest 8-bytes for next instruction, So 0xff704004 is adding 0x20 for proper alignment which is causing the next instruction data 0xefffffff is moved. Hexdump with overlaped bytes: ----------------------------- 0000000 0000 0000 0000 0000 0000 0000 0000 0000 0000010 0000 0000 0000 0000 0000 0000 ffff eaff So, Fix the TEXT_BASE for proper aligned address 0xff704000 Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-02-24rockchip: rk3288: Add TPL_LDSCRIPTJagan Teki
Due to size limitations in SPL by adding falcon mode, rk3288 support TPL. In order to not overlap SPL_TEXT_BASE add TPL_TEXT_BASE with u-boot-tpl.lds that intern call u-boot-spl.lds with proper TEXT_BASE values. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-02-07spl: eMMC/SD: Provide one __weak spl_boot_mode() functionLukasz Majewski
The goal of this patch is to clean up the code related to choosing SPL MMC boot mode. The spl_boot_mode() now is called only in spl_mmc_load_image() function, which is only compiled in if CONFIG_SPL_MMC_SUPPORT is enabled. To achieve the goal, all per mach/arch implementations eligible for unification has been replaced with one __weak implementation. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Stefano Babic <sbabic@denx.de> Acked-by: Michal Simek <michal.simek@xilinx.com> (For ZynqMP) Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-28rockchip: rk3036: enable rockusb support on rk3036 based deviceEddie Cai
Rockchip Rockusb driver already merged. So we enable rockusb support on rk3036 based device. Signed-off-by: Eddie Cai <eddie.cai.linux@gmail.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28rockchip: pinctrl: rk322x: Move the iomux definitions into pinctrl-driverDavid Wu
Clean the iomux definitions at grf_rk322x.h, and move them into pinctrl-driver for resolving the compiling error of redefinition. After that, define the uart2 iomux at rk322x-board file. Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-10rockchip: rk3288: enable rockusb support on rk3288 based deviceEddie Cai
this patch enable rockusb support on rk3288 based device. Signed-off-by: Eddie Cai <eddie.cai.linux@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-12-18rockchip: add a common script for generate fit itsKever Yang
Rockchip release bl31.elf file for armv8 SoCs like rk3399, rk3328, the elf have more than one section, we need to decode it first and packed them into u-boot.itb with its file. This script is to generate the its script. Need default bl31.elf in root directory of U-Boot source and dtb as parameter. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-12-18rockchip: update ROCKCHIP_SPL_RESERVE_IRAM to 0Kever Yang
Only rk3399 atf need ROCKCHIP_SPL_RESERVE_IRAM. This commit updates its default setting to 0 so that other SoCs do not need to define it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-30rockchip: rk3036: sdram: correct setting for pll integer modeKever Yang
According to rk3036 TRM, should be set to '1' for the pll integer mode, while the '0' means the frac mode. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-30rockchip: rk3036: update clock driver for ddrKever Yang
After the MASK MACRO update, we need to update the driver at the same time. This is a fix to: 37943aa rockchip: rk3036: clean mask definition for cru reg Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-30rockchip: rk3036: fix pll config for correct frequencyKever Yang
There is a fixed div-2 between PLL and clk_ddr/clk_ddrphy, so we need to double to pll output and then ddr can work in correct frequency. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-30rockchip: rk3128: add evb-rk3128 supportKever Yang
evb-rk3128 is an evb from Rockchip based on rk3128 SoC: - 2 USB2.0 Host port; - 1 HDMI port; - 2 10/100M eth port; - 2GB ddr; - 16GB eMMC; - UART to USB debug port; Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-30rockchip: rk3128: add clock driverKever Yang
Add rk3128 clock driver and cru structure definition. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-30rockchip: rk3128: add soc basic supportKever Yang
RK3128 is a SoC from Rockchip with quad-core Cortex-A7 CPU and mali400 GPU. Support Nand flash, eMMC, SD card, USB 2.0 host and device, HDMI/LVDS/MIPI display. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-26rockchip: fix turning off boot-mode via KconfigPhilipp Tomsich
The ROCKCHIP_BOOT_MODE_REG option defaults to a hex value, so 0 will show as 0x0 if a default is provided and changed via Kconfig. However, it still will show as 0, if no default is given. Consequently, the "is set to something other than 0" test in a Makefile is cumbersome. Instead this check can easily be performed in the C-code. This removes the ifeq-check from mach-rockchip/Makefile, adds a matching #if-check to boot_mode.c and fixes resulting link issues (if boot_mode.o was not included due to the Makefile check) by defining a stub function (in case the functionality is not built in) for setup_boot_mode in boot_mode.c. Fixes: e306779 (rockchip: make boot_mode related codes reused across all platforms) Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-21rockchip: check download key before bootupAndy Yan
Enter download mode if the download key pressed. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> [Converted printfs in boot_mode.c to debug/pr_err:] Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-21rockchip: add support for enter to bootrom download modeAndy Yan
Rockchip bootrom will enter download mode if it returns from spl/tpl with a non-zero value and couldn't find a valid image in the backup partition. This patch provide a method to instruct the system to back to bootrom download mode by checking the BROM_DOWNLOAD_FLAG register. As the bootrom download function relys on some modules such as interrupts, so we need to back to bootrom as early as possbile before the tpl/spl code override the interrupt configurations. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-21rockchip: make boot_mode related codes reused across all platformsAndy Yan
setup_boot_mode function use the same logic but different mode register address across all the rockchip platforms, so it's better to make this function reused across all the platforms, and let the mode register address setting from the config file. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-21rockchip: rk3188: move CONFIG_SPL_* entries from rk3188_common.h to KconfigPhilipp Tomsich
There still are a few CONFIG_SPL_* options selected using defines from rk3188_common.h instead of via Kconfig. This migrates those over to Kconfig. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
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