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2017-10-01rockchip: rk3399: make spl_board_init board-specificPhilipp Tomsich
The later-stage spl_board_init (as opposed to board_init_f) should set up board-specific details: these differ between the EVB-RK3399 and the RK3399-Q7 (Puma). This moves spl_board_init back into the individual boards and removes the unneeded functionality from Puma. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-10-01rockchip: rk322x: update the sysreg number for boot modeKever Yang
The boot mode for rk322x is stored in sysreg 0, update it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-10-01rk3288: vyasa: Add TPL supportJagan Teki
Since the size of SPL can't be exceeded 0x8000 bytes in RK3288, it is not possible add new SPL features like Falcon mode or etc. So add TPL stage so-that adding new features to SPL is possible. - TPL: DRAM init, clocks - SPL: MMC, falcon, etc Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-10-01armv7: rk3288: Move configure_l2ctlr to commonJagan Teki
configure_l2ctlr will be shared between SPL and TPL so move them into asm/arch/sys_proto.h Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-10-01armv7: Move L2CTLR read/write to commonJagan Teki
L2CTLR read/write functions are common to armv7 so, move them in to include/asm/armv7.h and use them where ever it need. Cc: Tom Warren <twarren@nvidia.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> [Backed out the change to arch/arm/mach-tegra/cache.c:] Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-10-01rockchip: rk3399: spl: convert to using BOOT_DEVICE_BOOTROMPhilipp Tomsich
Instead of directly calling into the back-to-bootrom code, the RK3399 common SPL implementation now uses BOOT_DEVICE_BOOTROM to trigger a transfer back into the bootrom. With this factored out, the spl_board_init function can not be customised for each RK3399 board. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-10-01rockchip: rk3328: move sdram driver to driver/ramKever Yang
Since we have CONFIG_RAM framwork and its driver folder, move the driver into it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-10-01rockchip: rk3288: move sdram driver to driver/ramKever Yang
Since we have CONFIG_RAM framwork and its driver folder, move the driver into it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-10-01rockchip: rk3188: move sdram driver to driver/ramKever Yang
Since we have CONFIG_RAM framwork and its driver folder, move the driver into it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-10-01rockchip: rk3399: move sdram driver to driver/ramKever Yang
Since we have CONFIG_RAM framwork and its driver folder, move the driver into it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-09-18rockchip: ram: rk3399: update reg map for of-platdataKever Yang
After Simon's patch, the dtoc can work with 64bit address, so we need to fix reg number for it. Depend on Simon's patch set: https://patchwork.ozlabs.org/cover/807266/ Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-09-18rk3288: Add Vyasa initial board supportJagan Teki
This patch adds support for Vyasa RK3288 initial board from Amarula Solutions. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-09-18rockchip: rk3399: spl: remove hard-coded addresses for GRF and SGRFPhilipp Tomsich
On the RK3399, we will have either OF_PLATDATA or full OF_CONTROL enabled: this allows the use of syscon to retrieve the addresses of GRF and SGRF (except for the early debug UART setup, which runs so early that the device-model is not initialised). This removes the hard-coded addresses and goes through syscon to retrieve the base-addresses of GRF and SGRF. After that, we use the structure definitions to locate the respective registers. In addition to this, the inclusion of header files is also cleaned up: - all headers are included at the beginning (there was a spurious inclusion of the grf header from within a function) - all #include statements for unused headers are removed - the remaining #include statements are sorted (while keeping common.h included in front) Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-09-18rockchip: rk322x: Disable integrated macphy for saving power consumingDavid Wu
Unfortunately, the integrated macphy default is enabled, which will increase power consuming, if we do not use this PHY. So let's disable it at first, which will save power consuming. If we really use it, then enable it in driver level. Signed-off-by: David Wu <david.wu@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-09-18rockchip: rk322x: enable fastboot to set boot mode tagKever Yang
To support fastboot "fastboot reboot-bootloader" cmd. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-09-08rockchip: rk3328: fix syscon id tableKever Yang
syscon id table need a dummy member as NULL ending, or else system will panic while try to match a compatible in this table as a list. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-09-05rockchip: rk3288: Add reset reason detectionWadim Egorov
Sometimes it's helpful to know the reset reason caused in the SoC. Add reset reason detection for the RK3288 SoC. This will set an environment variable which represents the reset reason. Signed-off-by: Wadim Egorov <w.egorov@phytec.de> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-08-18rockchip: rk322x: update dram bank sizeKever Yang
The DRAM start address is not 0, so need to update the last bank size as: DRAM start addr + DRAM_SIZE - last bank start addr Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-18rockchip: rk3399: spl: remove unused header inclusionPhilipp Tomsich
fdtdec.h is included, but not used in rk3399-board-spl.c: remove the '#include'-statement. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-08-16env: Rename setenv() to env_set()Simon Glass
We are now using an env_ prefix for environment functions. Rename setenv() for consistency. Also add function comments in common.h. Suggested-by: Wolfgang Denk <wd@denx.de> Signed-off-by: Simon Glass <sjg@chromium.org>
2017-08-13rockchip: rk322x: set the DDR region as non-secure in SPLKever Yang
Disable the ddr secure region setting in SPL and the ddr memory becomes non-secure, every one can access it. the trust firmware like OPTEE should have the correct setting for it after SPL if there is one. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-08-13rockchip: rk3368: spl: move SPL_LDSCRIPT to KconfigPhilipp Tomsich
With the new way of doing things (i.e. the hierarchical selection of SPL_LDSCRIPT via Kconfig) in place, this moves the SPL_LDSCRIPT setting for the RK3368 from defconfig back into Kconfig. With this done, there should be no lingering cases of SPL_LDSCRIPT outside of Kconfig files. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13rockchip: rk3188: rock: adjust for SPL/TPL splitPhilipp Tomsich
With the changes to split SPL/TPL for the RK3368, I apparently missed some needed adjustments to the RK3188 Kconfig and rock_defconfig. This fixes build-issues for the rock board after applying the RK3368 enablement (and SPL/TPL) set that resulted from TPL_SERIAL_SUPPORT, TPL_ROCKCHIP_BACK_TO_BROM and TPL_TINY_MEMSET being separate symbols now. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13rockchip: rk3368: remove setup of secure timer from TPL/SPLPhilipp Tomsich
When using DM timers w/ the timer0 block within the RK3368, we no longer depend on the ARMv8 generic timer counting. This allows us to drop the secure timer initialisation from the TPL and SPL stages. The secure timer will later be set up by ATF, which starts the ARMv8 generic timer. Thus, there will be a dependency from Linux to the ATF through the ARMv8 generic timer... this seems reasonable, as Linux will require the ATF (and PSCI) to start up the secondary cores anyway (in other words: we don't add any new dependencies). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13moveconfig: migrate TPL_STACK, TPL_TEXT_BASE and TPL_MAX_SIZEPhilipp Tomsich
We can finally drop TPL_STACK, TPL_TEXT_BASE and TPL_MAX_SIZE off the whitelist (this time it's really happening!) and migrate the setting (only used on the RK3368-uQ7 so far) into Kconfig. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13rockchip: rk3368: mark TPL as not inheriting its stack, text-base and size ↵Philipp Tomsich
from SPL The RK3368 needs to have a different base-address and stack-pointer for its TPL stage. Now that we want to do this via Kconfig, we need to tick the appropriate 'TPL_NEEDS_...' boxes. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13rockchip: Kconfig: preset TPL_LDSCRIPT via Kconfig for the RK3368Philipp Tomsich
Set TPL_LDSCRIPT in Kconfig, so we don't have to pollute our header file. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-08-13rockchip: board: lion-rk3368: add support for the RK3368-uQ7Philipp Tomsich
The RK3368-uQ7 (codenamed 'Lion') is a micro-Qseven (40mm x 70mm, MXM-230 edge connector compatible with the Qseven specification) form-factor system-on-module based on the octo-core Rockchip RK3368. It is designed, supported and manufactured by Theobroma Systems. It provides the following features: - 8x Cortex-A53 (in 2 clusters of 4 cores each) - (on-module) up to 4GB of DDR3 memory - (on-module) SPI-NOR flash - (on-module) eMMC - Gigabit Ethernet (with an on-module KSZ9031 PHY) - USB - HDMI - MIPI-DSI/single-channel LVDS (muxed on the 'LVDS-A' pin-group) - various 'slow' interfaces (e.g. UART, SPI, I2C, I2S, ...) Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13rockchip: rk3368: spl: mark SPL and TPL as supported for ROCKCHIP_RK3368Philipp Tomsich
With SPL and TPL support for the RK3368 in place, mark SPL and TPL as supported from Kconfig for the RK3368. As this is primarily tested on the RK3368-uQ7, we'll leave it to board's individual defconfig to enable. Also enable DEBUG_UART_BOARD_INIT for the RK3368, so we get output during the early boot-up, as we turn on TPL and SPL. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13rockchip: rk3368: spl: add SPL supportPhilipp Tomsich
Adds SPL support for the RK3368 (assuming that our TPL stage has initialised DRAM and set up the memory firewall). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13rockchip: spl: make spl-boot-order code reusable (split from rk3399)Philipp Tomsich
In order to reuse the support for the u-boot,spl-boot-order property from the rk3399, we split it into a reusable module that can be included by the SPL code for any of our boards. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13rockchip: rk3368: spl: add TPL supportPhilipp Tomsich
This adds the TPL support for the RK3368, including the u-boot-tpl.lds. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13rockchip: rk3368: add DRAM controller driver with DRAM initialisationPhilipp Tomsich
This adds a DRAM controller driver for the RK3368 and places it in drivers/ram/rockchip (where the other DM-enabled DRAM controller drivers for rockchip devices should also be moved eventually). At this stage, only the following feature-set is supported: - DDR3 - 32-bit configuration (i.e. fully populated) - dual-rank (i.e. no auto-detection of ranks) - DDR3-1600K speed-bin This driver expects to run from a TPL stage that will later return to the RK3368 BROM. It communicates with later stages through the os_reg2 in the pmugrf (i.e. using the same mechanism as Rockchip's DDR init code). Unlike other DMC drivers for RK32xx and RK33xx parts, the required timings are calculated within the driver based on a target frequency and a DDR3 speed-bin (only the DDR3-1600K speed-bin is support at this time). The RK3368 also has the DDRC0_CON0 (DDR ch. 0, control-register 0) register for controlling the operation of its (single-channel) DRAM controller in the GRF block. This provides for selecting DDR3, mobile DDR modes, and control low-power operation. As part of this change, DDRC0_CON0 is also added to the GRF structure definition (at offset 0x600). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13rockchip: Makefile: streamline SPL/TPL configurationPhilipp Tomsich
Handling TPL and SPL in the Makefile for mach-rockchip was based on nested if checks and/or if-else-if paths. This can be simplified and made more readable by using $(SPL_TPL_) and by introducing intermediate variables for the aggregation of SPL and TPL features. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13rockchip: rk3368: syscon: SGRF support for OF_PLATDATAPhilipp Tomsich
In TPL we will need to configure security in the SGRF of the RK3368. This change adds support for the SGRF as a syscon device, so we can retrieve its address range through the syscon API in TPL (and can avoid having to hard-code the address). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13rockchip: rk3368: syscon: MSCH/PMUGRF/GRF support for OF_PLATDATAPhilipp Tomsich
The RK3368 has both a limited TPL size (just 0x7000 bytes) and the added challenge of booting in AArch64, which increases the code size for TPL (particularily when using the LP64 programming model). For this reason we expect the RK3368 to always use OF_PLATDATA for its TPL stage. This change adds support for the MSCH, PMUGRF and GRF register regions in syscon, which are necessary for initialising the RK3368's DRAM controller. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13rockchip: rk3368: improve Kconfig text for the RK3368Philipp Tomsich
The RK3368 option in Kconfig referred to the RK3328 (copy-and-paste) and had a few typos and unnecessarily used UTF-8 characters. While fixing this, I also reformatted and further clarified the text (e.g. made the grouping into a a big and little cluster of 4 cores each explicit). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13rockchip: Makefile: allow selective inclusion of sdram_common.o from ↵Philipp Tomsich
TPL/SPL/U-Boot The utility functions in sdram_common.c will be useful both for some SPL implementations (and if unused, the linked will discard these anyway) and for the full U-Boot stage. This changes selects sdram_common.o through the $(SPL_TPL_) macro to allow better control of its inclusion through the CONFIG_ROM, CONFIG_SPL_RAM or CONFIG_TPL_RAM options. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13rockchip: back-to-bootrom: simplify the #ifdef-check for LIBCOMMON in TPL/SPLPhilipp Tomsich
With the finer-grained control over LIBCOMMON_SUPPORT for TPL/SPL (i.e. with the newly introduced distinction between TPL_LIBCOMMON_SUPPORT and SPL_LIBCOMMON_SUPPORT), we can simplify the #ifdef-check to simply use CONFIG_IS_ENABELD. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> [fixed up to use 'puts' and LIBCOMMON:] Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2017-08-13rockchip: back-to-bootrom: split BACK_TO_BOOTROM for TPL/SPLPhilipp Tomsich
The back-to-bootrom option is rather unfortunately named CONFIG_ROCKCHIP_SPL_BACK_TO_BOOTROM instead of CONFIG_SPL_ROCKCHIP_BACK_TO_BOOTROM To make is selectable through CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BOOTROM), we need to rename it. At the same time, we introduce a TPL_ variant of the option to give us finer-grained control over when it should be used. This change is motivated by our RK3368 boot process, which returns to the boot ROM only from the TPL stage, but not from the SPL stage. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> [added fix-up for evb-rk3229_defconfig and phycore-rk3288_defconfig:] [fixed inverted CONFIG_IS_ENABLED test for rk3288:] Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> include/configs/rock.h: undef
2017-08-13rockchip: back-to-bootrom: add 'back-to-bootrom' support for AArch64Philipp Tomsich
The back-to-bootrom support for Rockchip is equivalent to an (assembly) implementation of setjmp/longjmp (i.e. it saves the stack-pointer, link-register and callee-saved registers). Up until now, this had only been implemented for AArch32 (i.e. ARMv7 or older), which puts the new ARMv8 devices (which boot in AArch64 mode) at a slight disadvantage. To allow use of the 'back-to-bootrom' feature on new devices (e.g. the RK3368), this commit adds an implementation for AArch64. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2017-07-27rockchip: use puts instead of printf when back to bootromAndy Yan
printf will increase the code size more than 1kb, but platform like rk3036 has no enough space for it. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-27rockchip: enable SPL_LIBGENERIC for rk3036 based boardsAndy Yan
function board_init_f_init_reserve will call memset, which is implemented in lib, and enabled by CONFIG_SPL_LIBGENERIC_SUPPORT in spl stage. To reduce the code size, also enable SPL_TINY_MEMSET. As rk3036 will return to bootrom immediately after dram initialization, there is no need to run DM, so disable SPL_DM_SERIAL. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-27rockchip: rk3399: enable SPL_SERIAL_SUPPORT and SPL_DRIVERS_MISC_SUPPORT via ↵Philipp Tomsich
Kconfig SPL_SERIAL_SUPPORT and SPL_DRIVERS_MISC_SUPPORT were previously enabled through rk3399_common.h. This change implies these options through Kconfig. These need to always be active for the RK3399, as follows: - SPL_SERIAL_SUPPORT is needed to pass the SPL build - SPL_DRIVERS_MISC_SUPPORT is needed to pass the SPL build Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-27rockchip: timer: make register sizes explicitPhilipp Tomsich
We are about to reuse the rockchip timer (header file) for 64bit ARMv8 chips, so it seems a good time to make the register sizes explicit by changing from 'unsigned int' to 'u32'. Reorders the header-includes in rk_timer.c to ensure that 'u32' is definded before it is used by 'asm/arch/timer.h'. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11rockchip: Add basic support for phyCORE-RK3288 SoM based carrier boardWadim Egorov
The phyCORE-RK3288 is a SoM (System on Module) containing a RK3288 SoC. The module can be connected to different carrier boards. It can be also equipped with different RAM, SPI flash and eMMC variants. The Rapid Development Kit option is using the following setup: - 1 GB DDR3 RAM (2 Banks) - 1x 4 KB EEPROM - DP83867 Gigabit Ethernet PHY - 16 MB SPI Flash - 4 GB eMMC Flash Add basic support for the PCM-947 carrier board, a RK3288 based development board made by PHYTEC. This board works in a combination with the phyCORE-RK3288 System on Module. Signed-off-by: Wadim Egorov <w.egorov@phytec.de> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11rockchip: rk3036: sync os_reg2 define with other socKever Yang
Rockchip using the same bit definition for dram info and write to os_reg, the col and bw info is not correct and let's fix it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11rockchip: add evb_rk3229 boardKever Yang
evb_rk3229 is a RK3229 based board, with: - 8GB eMMC; - 1GB DDR SDRAM; - 2 USB2.0 HOST port; - 1 MAC port; - 1 HDMI port; - IR; - WiFi; Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11rockchip: rk322x: add basic soc supportKever Yang
Enable soc support for SPL and U-boot skeleton. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11rockchip: correct the bank0 ram sizeKever Yang
The bank0 ram size should be the DRAM size minus reserved size, the DRAM size may be 1GB, 2GB, 4GB, we can not hard code it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Added DECLARE_GLOBAL_DATA_PTR for RK3328, RK3368 and RK3399: Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
generated by cgit (git 2.34.1) at 2024-12-26 17:35:31 +0000