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2020-01-07arm: socfpga: Convert reset manager from struct to definesLey Foon Tan
Convert reset manager for Gen5, Arria 10 and Stratix 10 from struct to defines. Change to get reset manager base address from DT node instead of using #define. spl_early_init() initializes the DT setup. So, move spl_early_init() to beginning of function and before get base address from DT. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-11-20socfpga: fix include guard in misc.h (arch vs. global)Simon Goldschmidt
The file arch/arm/mach-socfpga/include/mach/misc.h used the same include guard as the global include/misc.h. Fix this by giving the arch file an arch prefix. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
2019-05-24ARM: socfpga: Pull PL310 clearing into common codeMarek Vasut
Pull the PL310 clearing code into common code, so it can be reused by Arria10. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dalon Westergreen <dwesterg@gmail.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Tien Fong Chee <tien.fong.chee@intel.com>
2019-04-29ARM: socfpga: Add support for selecting bridges in bridge commandMarek Vasut
Add optional "mask" argument to the SoCFPGA bridge command, to select which bridges should be enabled/disabled. This allows the user to avoid enabling bridges which are not connected into the FPGA fabric. Default behavior is to enable/disable all bridges. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Tien Fong Chee <tien.fong.chee@intel.com>
2018-12-20arm: socfpga: stratix10: Add Stratix10 FPGA into FPGA device tableAng, Chee Hong
Enable 'fpga' command in u-boot. User will be able to use the FPGA command to program the FPGA on Stratix10 SoC. Signed-off-by: Ang, Chee Hong <chee.hong.ang@intel.com>
2018-11-29arm: socfpga: fix SPL booting from fpga OnChip RAMSimon Goldschmidt
This patch prevents disabling the FPGA bridges when SPL or U-Boot is executed from FPGA onchip RAM. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2018-08-24ARM: socfpga: Reorder Arria10 SPLMarek Vasut
The Arria10 SPL is a complete mess of calls to functions which are called in the wrong context and it is surprise it works at all. This patch tries to clean that mess up by shuffling the function calls around and moving the calls into the correct context. Due to the delicate nature of the reordering, this is done in one huge patch. The following changes happen in this patch: - Security policy init and NIC301 happens first in board_init_f() - The clock init happens very early in board_init_f() in SPL only - arch_early_init_r() only registers the FPGA, just like on Gen5 - arch_early_init_r() is never called from any _f() function - Dedicated FPGA pins are inited in board_init_f() as on Gen5 Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-13ARM: socfpga: Zap all the UART handling complexityMarek Vasut
The UART reset handling is now done via reset framework using the SoCFPGA reset driver. The UART console assignment is done using the DM and console framework. Nuke all this comlexity, since it is just duplicating the same functionality, badly. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org>
2018-08-13arm: socfpga: gen5: combine some init code for SPL and U-BootSimon Goldschmidt
Some of the code for low level system initialization in SPL's board_init_f() and U-Boot's arch_early_init_r() is the same, so let's combine it into a single function called from both. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2018-07-12arm: socfpga: misc: Move bridge command to misc commonLey Foon Tan
Move bridge command to misc common driver, in preparation to used by other platforms. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2018-05-07SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
2017-05-18arm: socfpga: Add misc support for Arria 10Ley Foon Tan
Add misc support for Arria 10. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2017-05-18arm: socfpga: Restructure misc driverLey Foon Tan
Restructure misc driver in the preparation to support A10. Move the Gen5 specific code to gen5 file. Change all uint32_t_to u32. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>