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Manage power supply configuration for board using stpmic1
with LPDDR2 or with LPDDR3:
+ VDD_DDR1 = 1.8V with BUCK3 (bypass if possible)
+ VDD_DDR2 = 1.2V with BUCK2
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
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Activate bootcount and use TAMP register to store the count value.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
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Update bsec driver to use the device tree provided by Kernel.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
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Add SYSCON driver for syscfg and etpzc and reorder in alphabetics order
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
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The boot mode can be forced by key press
or by TAMP register, requested in kernel by syscon-reboot-mode
tamp: tamp@5c00a000 {
compatible = "simple-bus", "syscon", "simple-mfd";
reg = <0x5c00a000 0x400>;
reboot-mode {
compatible = "syscon-reboot-mode";
offset = <0x150>; /* reg20 */
mask = <0xff>;
mode-normal = <0>;
mode-fastboot = <0x1>;
mode-recovery = <0x2>;
mode-stm32cubeprogrammer = <0x3>;
mode-ums_mmc0 = <0x10>;
mode-ums_mmc1 = <0x11>;
mode-ums_mmc2 = <0x12>;
};
};
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
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Display CPU part number and package information.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
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- export the function get_bootmode() and reused it in spl code
- manage uart instance by alias (prepare v4.19 binding)
- solve issue on nand instance
- restore console for uart boot
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
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Implement checkboard() function to display
- the boot chain used: basic or trusted
- the board compatible in device tree
- the board identifier and revision, saved in OTP59 for ST boards
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
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As BSEC is secure aware, all register access need to be done
by TF-A for TRUSTED boot chain, when U-Boot is executed in
normal world.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
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To allow access to this define by other driver, move
it into gpio.h
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
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In some STM32 SoC packages, GPIO bank has not always 16 gpios.
Several cases can occur, gpio hole can be located at the beginning,
middle or end of the gpio bank or a combination of these 3
configurations.
For that, gpio bindings offer the gpio-ranges DT property which
described the gpio bank mapping.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
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Add a MISC driver with read and write access to BSEC IP
(Boot and Security and OTP control)
- offset 0: shadowed values
- offset 0x80000000: OTP fuse box values (SAFMEM)
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
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Add the needed information to enable the debug uart
to have printf before the serial driver probe
(so before probe for clock, pincontrol and reset drivers)
To enable the debug on uart 4 (default console):
+ CONFIG_DEBUG_UART=y
+ CONFIG_DEBUG_UART_STM32=y
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
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This driver binds and manages the following regulator of
SoC's PWR block :
- reg11
- reg18
- usb33
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
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Add PSCI v1.0 support for Linux and manage PSCI state
for each CPU (affinity 0 level) with all mandatory functions:
- PSCI_VERSION
- CPU_SUSPEND
- CPU_OFF
- CPU_ON
- AFFINITY_INFO
- SYSTEM_OFF
- SYSTEM_RESET
- PSCI_FEATURES
and 1 optional to avoid Linux warning
- MIGRATE_INFO_TYPE
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: CITOOLS <smet-aci-reviews@lists.codex.cro.st.com>
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When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from. So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry. Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.
In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.
This commit changes all instances where we have multiple licenses (in
these cases, dual license) declared in the SPDX-License-Identifier tag.
In this case we change from listing "LICENSE-A LICENSE-B" or "LICENSE-A
or LICENSE-B" or "(LICENSE-A OR LICENSE-B)" to "LICENSE-A OR LICENSE-B"
as per the Linux Kernel style document. Note that parenthesis are
allowed so when they were used before we continue to use them.
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
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When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from. So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry. Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.
In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.
This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents. There's also a few places where I found we did not have a tag
and have introduced one.
Signed-off-by: Tom Rini <trini@konsulko.com>
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Add STGEN as SYSCON device: allow access to device address
defined in device tree
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
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SPL copy BootRom boot mode information
in TAMP register 21.
This TAMP register information is used
after relocation to set 2 env variables
- boot_device
- boot_instance
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
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Add support of DBGMCU_IDC for cpu identifier
and revision
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
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Add driver and binding for stm32mp1 ddr controller and phy
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
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- add new arch stm32mp for STM32 MPU/Soc based on Cortex A
- support for stm32mp157 SOC
- SPL is used as first boot stage loader
- using driver model for all the drivers, even in SPL
- all security feature are deactivated (ETZC and TZC)
- reused STM32 MCU drivers when it is possible
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
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