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2018-07-31sunxi: add support for Allwinner H6 SoCIcenowy Zheng
Allwinner H6 is a new SoC from Allwinner features USB3 and PCIe interfaces. This patch adds support for it. The corresponding DTSI file, from Linux next-20180720, is also introduced. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2018-07-31sunxi: add DRAM support to H6Icenowy Zheng
The Allwinner H6 SoC comes with a set of new DRAM controller+PHY combo. Both the controller and the PHY seem to be originate from DesignWare, and are similar to the ones in ZynqMP SoCs. This commit introduces an initial DRAM driver for H6, which contains only LPDDR3 support. The currently known SBCs with H6 all come with LPDDR3 memory, including Pine H64 and several Orange Pi's. The BSP DRAM initialization code is closed source and violates GPL. Code in this commit is written by experimenting, referring the code/document of other users of the IPs (mainly the ZynqMP, as it's the only found PHY reference) and disassebling the BSP blob. Thanks for Jernej Skrabec for review and fix some issues in this driver (including the most critical one which made it to work), and rewrite some code from register dump! Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Acked-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2018-07-31sunxi: add UART0 setup for H6Icenowy Zheng
The UART0 on H6 is available at PH bank (and PF bank, but the PF one is muxed with SD card). Add pinmux configuration. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2018-07-31sunxi: use sun6i-style watchdog for H6Icenowy Zheng
The H6 SoC has a sun6i-style watchdog in its timer part. Enable the usage of it. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2018-07-31sunxi: add clock code for H6Icenowy Zheng
The new Allwinner H6 SoC has a brand new CCU layout. Add clock code for it. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2018-07-31sunxi: change RMR64's RVBAR address for H6Icenowy Zheng
Allwinner H6 has a different RVBAR address with A64/H5. Add conditional RVBAR configuration into the code which does RMR switch. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2018-07-31sunxi: change SUNXI_HIGH_SRAM option to SUNXI_SRAM_ADDRESSIcenowy Zheng
The new Allwinner H6 SoC has its SRAM A1 at neither 0x0 nor 0x10000, but it's at 0x20000. Thus the SUNXI_HIGH_SRAM option needs to be refactored to support this new configuration. Change it to SUNXI_SRAM_ADDRESS, which holds the real address of SRAM A1 in the memory map. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2018-07-16dm: sunxi: Use DM for MMC and SATA on all A10 boardsAdam Sampson
Use the driver model for MMC and SATA, in preparation for CONFIG_BLK defaulting to y. Tested on A10 Cubieboard. Signed-off-by: Adam Sampson <ats@offog.org> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
2018-07-03Merge branch 'master' of git://git.denx.de/u-boot-sunxiTom Rini
2018-07-03arm: timer: sunxi: add Allwinner timer erratum workaroundAndre Przywara
The Allwinner A64 SoCs suffers from an arch timer implementation erratum, where sometimes the lower 11 bits of the counter value erroneously become all 0's or all 1's [1]. This leads to sudden jumps, both forwards and backwards, with the latter one often showing weird behaviour. Port the workaround proposed for Linux to U-Boot and activate it for all A64 boards. This fixes crashes when accessing MMC devices (SD cards), caused by a recent change to actually use the counter value for timeout checks. Fixes: 5ff8e54888e4d26a352453564f7f599d29696dc9 ("sunxi: improve throughput in the sunxi_mmc driver") [1] http://lists.infradead.org/pipermail/linux-arm-kernel/2018-May/576886.html Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Andreas Färber <afaerber@suse.de> Tested-by: Guillaume Gardet <guillaume.gardet@free.fr>
2018-06-18ARM: sunxi: remove empty #ifdef/endif blockChris Packham
Whatever code this was guarding has been removed so remove the guards too. Signed-off-by: Chris Packham <judge.packham@gmail.com>
2018-05-28sunxi: Drop legacy usb_phy.cJagan Teki
Allwinner PHY USB code is now part of generic-phy framework, so drop existing legacy handling like arch/arm/mach-sunxi.c and related code areas. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jun Nie <jun.nie@linaro.org>
2018-05-28usb: sunxi: Switch to use generic-phyJagan Teki
Allwinner USB PHY handling can be done through driver-model generic-phy so add the generic-phy ops to relevant places on host and musb sunxi driver and enable them in respective SOC's. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jun Nie <jun.nie@linaro.org>
2018-05-07arm: v7: Kconfig: Rename CPU_V7 as CPU_V7ALokesh Vutla
Currently CPU_V7 kconfig symbol supports only ARMv7A architectures under armv7 folder. This led to a misconception of creating separate folders for armv7m and armv7r. There is no reason to create separate folder for other armv7 based architectures when it can co-exist with few Kconfig symbols. As a first step towards a common folder, rename CPU_V7 as CPUV7A. Later separate Kconfig symbols can be added for CPU_V7R and CPU_V7M and can co exist in the same folder. Reviewed-by: Tom Rini <trini@konsulko.com> Tested-by: Michal Simek <michal.simek@xilinx.com> Suggested-by: Alexander Graf <agraf@suse.de> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-05-07SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-27Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTRTom Rini
We have a large number of places where while we historically referenced gd in the code we no longer do, as well as cases where the code added that line "just in case" during development and never dropped it. Signed-off-by: Tom Rini <trini@konsulko.com>
2018-03-19sunxi: Add DRAM_SUN8I_A83T kconfig entryJagan Teki
Add proper and simple kconfig option for dram_sun8i_a83t.c instead of using MACH type on Makefile. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-03-19sunxi: Add DRAM_SUN8I_A33 kconfig entryJagan Teki
Add proper and simple kconfig option for dram_sun8i_a33.c instead of using MACH type on Makefile. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-03-19sunxi: Add DRAM_SUN8I_A23 kconfig entryJagan Teki
Add proper and simple kconfig option for dram_sun8i_a23.c instead of using MACH type on Makefile. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-03-19sunxi: Add DRAM_SUN9I kconfig entryJagan Teki
Add proper and simple kconfig option for dram_sun9i.c instead of using MACH type on Makefile. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-03-19sunxi: Add DRAM_SUN4I kconfig entryJagan Teki
Add proper and simple kconfig option for dram_sun4i.c instead of using MACH type on Makefile. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-03-19sunxi: add DRAM_SUN6I kconfigJagan Teki
Add proper and simple kconfig option for dram_sun6i.c instead of using MACH type on Makefile. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-03-19sunxi: Add AXP_PMIC_BUS kconfig entryJagan Teki
Add simple and meaningful kconfig option for pmic_bus.c instead of using MACH type on Makefile. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-03-19sunxi: Add SUN8I_RSB kconfig entryJagan Teki
Add simple and meaningful kconfig option for rsb.c instead of using MACH type on Makefile. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-03-19sunxi: Use SUN6I_PRCM if usedJagan Teki
SUN6I_PRCM is also used for SUN8I and SUN9I, so select the same on respective MACH types. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-03-19sunxi: Add SUN6I_P2WI kconfig entryJagan Teki
Add simple and meaningful kconfig option for p2wi.c instead of using MACH type on Makefile. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-03-19sunxi: Add SUN6I_PRCM kconfig entryJagan Teki
Add simple and meaningful kconfig option for prcm.c instead of using MACH type on Makefile. PRCM (Power/Reset/Clock Management) is considered as a Multi-Functional Device, so used the same on Kconfig definition. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-03-16Convert all of CONFIG_CONS_INDEX to KconfigTom Rini
This converts the following to Kconfig: CONFIG_CONS_INDEX We have existing entries for this option in a number of places, with different guards on them. They're also sometimes used for things not directly inside of the serial driver. First, introduce a new symbol to guard the use of CONFIG_CONS_INDEX, so that in the case where we don't need this for the serial driver, but for some other use, we can still do it. Next, consolidate all of these into the single entry in drivers/serial/Kconfig. Finally, introduce CONS_INDEX_[023456] so that we can imply a correct value here to make the defconfig side of this smaller. Signed-off-by: Adam Ford <aford173@gmail.com> [trini: Rework a lot of the logic here, such that I took authorship from Adam, but kept his S-o-B line] Signed-off-by: Tom Rini <trini@konsulko.com>
2018-03-13arm: sunxi: Move spl spi sunxi code to mach-sunxiJagan Teki
This SUNXI variant SPL SPI code doesn't use either SPI or SPL_FLASG subsystems due to size constraints and also placing this code in drivers/mtd/spi will unnecessary build SPI_FLASH code(if defined) which never required, hence moved to arch area. And also renamed the file according to kconfig which resembles proper name. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-02-07spl: eMMC/SD: Provide one __weak spl_boot_mode() functionLukasz Majewski
The goal of this patch is to clean up the code related to choosing SPL MMC boot mode. The spl_boot_mode() now is called only in spl_mmc_load_image() function, which is only compiled in if CONFIG_SPL_MMC_SUPPORT is enabled. To achieve the goal, all per mach/arch implementations eligible for unification has been replaced with one __weak implementation. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Stefano Babic <sbabic@denx.de> Acked-by: Michal Simek <michal.simek@xilinx.com> (For ZynqMP) Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2017-12-02sunxi: set the default CPUx frequency of H5 to 816MHzIcenowy Zheng
Some H5 boards are designed to start at 1.1V CPUx voltage (e.g. Nano Pi NEO2), which may not work properly at 1008MHz if the chip's quality is not so good. Lower the default CPUx frequency of H5 to 816MHz. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Jagan Teki <jagan@openedev.com>
2017-10-27sunxi: video: add LCD support to DE2 driverVasily Khoruzhick
Extend DE2 driver with LCD support. Tested on Pinebook which is based on A64 and has ANX6345 eDP bridge with eDP panel connected to it. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> [agust: rebased v5 on u-boot-video/master] Signed-off-by: Anatolij Gustschin <agust@denx.de>
2017-10-26sunxi: setup simplefb for Allwinner DE2Icenowy Zheng
As the support of EFI boot on Allwinner H3 is broken, we still need to use simplefb to pass the framebuffer to Linux. Add code to setup simplefb for Allwinner DE2 driver. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-10-26video: add an option for video simplefb via DTIcenowy Zheng
Add an option to indicate that the video driver should setup a SimpleFB node that passes the video framebuffer initialized by U-Boot to the operating system kernel. Currently only the Allwinner DE driver uses this option, and the definition of this option in the sunxi-common.h config header is converted to an imply of this option from CONFIG_VIDEO_SUNXI. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-10-26sunxi: change the DE1 video option to CONFIG_VIDEO_SUNXIIcenowy Zheng
The sunxi DE1 video option used to be CONFIG_VIDEO, which has the same name as the "Enable legacy video support" option in drivers/video/Kconfig. Change the option name to CONFIG_VIDEO_SUNXI, which is really used by Makefile under drivers/video/sunxi/, and defined in sunxi-common.h when CONFIG_VIDEO is selected before this change. Now CONFIG_VIDEO_SUNXI selects CONFIG_VIDEO and the usages of CONFIG_VIDEO in sunxi Kconfig and config headers are all converted to use CONFIG_VIDEO_SUNXI. Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
2017-10-03sunxi: usb_phy: invert the USB phy_ctl conditionMaxime Ripard
All the new SoCs from Allwinner since the A33 have had the phy_ctl offset at 0x410 instead of 0x404 that was used on the previous SoCs. Instead of adding more and more special cases as the number of SoCs grow, let's invert the test to have 0x410 by default, and the (hopefully) fixed number of old SoCs being the exception. Suggested-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Suggested-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2017-10-03arm: sunxi: Move spl_boot_device in a separate functionMaxime Ripard
U-Boot itself might need to identify the boot device, for example to be able to tell where to load the kernel from when several options are possible. Move the logic of spl_boot_device to a function that is compiled both for the SPL and the main binary. Tested-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-08-28sunxi: Enable MMC new mode for A83TMaxime Ripard
The eMMC controller for the A83T uses the new operating mode. Enable it. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2017-08-16Merge git://git.denx.de/u-boot-sunxiTom Rini
Update A20-OLinuXino-Lime2-eMMC_defconfig to include CONFIG_SCSI Signed-off-by: Tom Rini <trini@konsulko.com>
2017-08-15env: Convert CONFIG_ENV_IS_IN... to a choiceSimon Glass
At present we support multiple environment drivers but there is not way to select between them at run time. Also settings related to the position and size of the environment area are global (i.e. apply to all locations). Until these limitations are removed we cannot really support more than one environment location. Adjust the location to be a choice so that only one can be selected. By default the environment is 'nowhere', meaning that the environment exists only in memory and cannot be saved. Also expand the help for the 'nowhere' option and move it to the top since it is the default. Signed-off-by: Simon Glass <sjg@chromium.org> [trini: Move all of the imply logic to default X if Y so it works again] Signed-off-by: Tom Rini <trini@konsulko.com>
2017-08-13spl: add hierarchical defaults for SPL_LDSCRIPTPhilipp Tomsich
With SPL_LDSCRIPT moved to Kconfig (and this being a 'string' config node), all the lingering definitions in header files will cause warnings/errors due to the redefinition of the configuration item. As we don't want to pollute the defconfig files (and values should usually be identical for entire architectures), the defaults are moved into Kconfig. Kconfig will always pick the first default that matches, so please keep these values at the end of each file (to allow any board-specific Kconfig, which will be included earlier) to override with an unconditional default setting. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-11sunxi: switch PRCM to non-secure on H3/H5 SoCsIcenowy Zheng
The PRCM of H3/H5 SoCs have a secure/non-secure switch, which controls the access to some clock/power related registers in PRCM. Current Linux kernel will access the CPUS (AR100) clock in the PRCM block, so the PRCM should be switched to non-secure. Add code to switch the PRCM to non-secure. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Tested-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Jagan Teki <jagan@openedev.com>
2017-07-25Convert CONFIG_ENV_IS_IN_MMC/NAND/UBI and NOWHERE to KconfigSimon Glass
This converts the following to Kconfig: CONFIG_ENV_IS_IN_MMC CONFIG_ENV_IS_IN_NAND CONFIG_ENV_IS_IN_UBI CONFIG_ENV_IS_NOWHERE In fact this already exists for sunxi as a 'choice' config. However not all the choices are available in Kconfig yet so we cannot use that. It would lead to more than one option being set. In addition, one purpose of this series is to allow the environment to be stored in more than one place. So the existing choice is converted to a normal config allowing each option to be set independently. There are not many opportunities for Kconfig updates to reduce the size of this patch. This was tested with ./tools/moveconfig.py -i CONFIG_ENV_IS_IN_MMC And then manual updates. This is because for CHAIN_OF_TRUST boards they can only have ENV_IS_NOWHERE set, so we enforce that via Kconfig logic now. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
2017-06-08sunxi: add LPDDR3 timing from stock boot0Icenowy Zheng
As we added LPDDR3 support in the former patch, we need a set of timing info to really enable it. Add the timing info used by stock boot0. Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Acked-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2017-06-08sunxi: add LPDDR3 DRAM type support for DesignWare-like DRAM controllerIcenowy Zheng
Some A64 boards (SoPine and Pinebook production batch) use LPDDR3 DRAM chips. Add support for LPDDR3 DRAM in the DesignWare-like DRAM controller code. Real LPDDR3 chips' support is not added yet in this commit. Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2017-06-08sunxi: enable DRAM initialization and SPL for V3s SoCIcenowy Zheng
As we have already support for the DesignWare DRAM controller and the integrated DDR2 chip of V3s, let's enable the SPL support for V3s. This patch also contains the default DRAM configuration for V3s. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2017-06-08sunxi: add support for V3s DRAM controllerIcenowy Zheng
Allwinner V3s features a DRAM controller like the on in H3, but with a DDR2 DRAM. Add support for it. Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2017-06-08sunxi: add support for the DDR2 in V3s SoCIcenowy Zheng
Allwinner V3s SoC features a co-packaged DDR2 DRAM chip, which needs its timing param. Add support for it. Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Acked-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2017-06-08sunxi: enable dual rank detection in DesignWare-like DRAM codeIcenowy Zheng
The DesignWare-like DRAM code used to set the controller defaultly to single rank mode, which makes it not able to detect the second rank. Set the default value to dual rank, thus the rank detection code can work and finally the rank setting will be the correct value. Currently we know little about the dual-rank on R40, and the usage of A15 address line seems to be breaking dual-rank support. The only R40 board currently available (Sinovoip Banana Pi M2 Ultra) uses A15 rather than dual-rank, thus we cannot do research for it. So dual rank detection is temporarily disabled on R40. This change is tested on a Orange Pi One (H3, single rank), a Pine64+ 2GiB version (A64, single rank) , a Pinebook early prototype with DDR3 (A64, dual rank) and a SoPine with some LPDDR3 patch (A64, dual CS pins on one chip). Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2017-06-08sunxi: Add selective DRAM type and timingIcenowy Zheng
DRAM chip varies, and one code cannot satisfy all DRAMs. Add options to select a timing set. Currently only DDR3-1333 (the original set) is added into it. Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>