uboot-2021-rebase.git - uboot 2021 rebase, to fix booting on modern SD cards, from https://github.com/fifteenhex/u-boot/tree/am335x_som

Age	Commit message (Collapse)	Author
2017-08-30	ARM: uniphier: move PLLCTRL register macros to each SoC .c file	Masahiro Yamada
	The new SoC PXs3 changed the address of PLL, but still uses the same PLL name. We can not define SC_*PLLCTRL in the common header. Move them to per-SoC .c file. Also, fix some PLL comments. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-08-30	ARM: uniphier: replace <common.h> with <linux/delay.h> in pll settings	Masahiro Yamada
	The #include <common.h> was added for mdelay(). Later, the declaration of mdelay was moved to <linux/delay.h> by commit 5bc516ed661a ("delay: collect {m, n, u}delay declarations to include/linux/delay.h"). There is no need to include <common.h> now. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-02-23	ARM: uniphier: set up charge pump current for MPLL of LD11 SoC	Masahiro Yamada
	Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-10-10	ARM: uniphier: enable SSC for DPLL (DRAM PLL) on LD11 SoC	Masahiro Yamada
	For Electro-Magnetic Compatibility test. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-23	ARM: uniphier: add PLL init code for LD11 SoC	Masahiro Yamada
	- Initialize PLLs (SPL initializes only DPLL to save the precious SPL memory footprint) - Adjust CPLL/MPLL to the final tape-out frequency - Set the Cortex-A53 clock to the maximum frequency since it is running at 500MHz (SPLL/4) on startup Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>