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path: root/arch/arm/mach-uniphier/init/init-ld20.c
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2016-05-26ARM: uniphier: disable cache in SPL of PH1-LD20Masahiro Yamada
The Boot ROM has enabled D-cache and MMU setting DDR memory area as Normal Memory in its page table. Disable D-cache and MMU before jumping to U-Boot proper. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-05-01ARM: uniphier: allow to use System Bus for ROM boot mode of PH1-LD20Masahiro Yamada
The System Bus is not available by default on the ROM boot mode of PH1-LD20. To use devices connected to the System Bus, such as the Micro Support Card, it is necessary to set up pin-muxing and some System Bus Controller register. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-04-24ARM: uniphier: add PH1-LD20 SoC supportMasahiro Yamada
This is the first ARMv8 SoC from Socionext Inc. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>