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path: root/arch/arm/mach-uniphier/init/init-ld20.c
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2017-01-17ARM: uniphier: refactor Support Card init codeMasahiro Yamada
Splitting reset assertion (support_card_reset) and deassertion (support_card_init) is not adding much value any more. Handle all the initialization of Support Card in support_card_init(), then remove support_card_reset(). Also, detect_num_flash_banks() can have a static qualifier. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-01-17ARM: uniphier: refactor SBC init codeMasahiro Yamada
Merge sbc-admulti.c and sbc-savepin.c into a single file to avoid code duplication. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-01-17ARM: uniphier: refactor MEMCONF init codeMasahiro Yamada
Currently, memconf-sld3.c and memconf-pxs2.c duplicate the code. There are 3 patterns in terms of MEMCONF init: - DRAM 2 channels: LD4, sLD8, Pro4, Pro5, LD11 - DRAM 3 channels: sLD3 - DRAM 3 channels (Ch2 is disable by MEMCONF[21]): Pxs2, LD20 All of them can be moved into a single file by a little more refactoring. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-01-17ARM: uniphier: split out UMC clock enableMasahiro Yamada
The clock enable bits for UMC are more SoC-specific than for the other hardware blocks. Separate the UMC clocks and the other clocks for better code reuse across SoCs. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-10-10ARM: uniphier: do not setup pins for System Bus on NAND boot modeMasahiro Yamada
For LD11 and LD20 SoCs, the System Bus and NAND are multiplexed in the same I/O pins. When booting from a NAND device, pin-mux for the System Bus must not be set-up because they are exclusive with each other. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-19ARM: uniphier: add PLL init code for LD20 SoCMasahiro Yamada
Initialize the DPLL (PLL for DRAM) in SPL, and others in U-Boot proper. Split the common code into pll-base-ld20.c for easier re-use. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-18ARM: uniphier: consolidate System Bus pin-mux settings for LD11/LD20Masahiro Yamada
Use the pin-mux data in the pinctrl drivers by directly calling pinctrl_generic_set_state(). Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-05-26ARM: uniphier: disable cache in SPL of PH1-LD20Masahiro Yamada
The Boot ROM has enabled D-cache and MMU setting DDR memory area as Normal Memory in its page table. Disable D-cache and MMU before jumping to U-Boot proper. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-05-01ARM: uniphier: allow to use System Bus for ROM boot mode of PH1-LD20Masahiro Yamada
The System Bus is not available by default on the ROM boot mode of PH1-LD20. To use devices connected to the System Bus, such as the Micro Support Card, it is necessary to set up pin-muxing and some System Bus Controller register. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-04-24ARM: uniphier: add PH1-LD20 SoC supportMasahiro Yamada
This is the first ARMv8 SoC from Socionext Inc. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>