summaryrefslogtreecommitdiff
path: root/arch/arm/mach-uniphier
AgeCommit message (Collapse)Author
2015-05-31ARM: UniPhier: add pin mux setting for NAND CS1 of PH1-Pro4Masahiro Yamada
The chip select 1 of the NAND controller is available if you want to use, although the pins are shared with UART port 2. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-05-31ARM: UniPhier: fix pin mux setting for USB port 2 of PH1-sLD8Masahiro Yamada
The register value should be 1, not 4. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-05-31ARM: UniPhier: update DDR PHY register map for PH1-Pro5Masahiro Yamada
PH1-Pro5 includes a newer version of DDR PHY IP. Some registers have been added to the reserved areas. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-05-31ARM: UniPhier: set MACH_PH1_PRO4 as default SoCMasahiro Yamada
One disadvantage of commit a26cd04920dc (arch: Make board selection choices optional) is that Kconfig could create such an insane .config file that no board is selected. As PH1-Pro4 is the main stream of UniPhier SoC family, rip off the "optional" again in favor of PH1-Pro4 as the default SoC. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-05-31ARM: UniPhier: remove meaningless CONFIG_SPL_BUILD ifdefsMasahiro Yamada
This file is only built for SPL. These ifdef conditionals are unnecessary because UniPhier platform now supports UART on SPL. Show appropriate messages on error. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-05-31ARM: UniPhier: remove unnecessary cache coherency codeMasahiro Yamada
Cache coherency for SMP is cared by Linux. In U-Boot, the secondary CPU(s) are just sleeping. Nothing in memory is shared with the primary CPU. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-05-31ARM: UniPhier: use 32 bit register access for debug UART settingMasahiro Yamada
For the same reason as commit d0c47b3ef7c5 (serial: UniPhier: use 32 bit register access), use "str" instead of "strb" for the LCR register setting. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-05-31ARM: UniPhier: update the vendor name of UniPhier in KconfigMasahiro Yamada
The business for UniPhier Soc family has been transferred from Panasonic Corporation to Socionext Inc. Update the SoC select menu in Kconfig. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-05-31ARM: UniPhier: replace <asm/io.h> with <linux/io.h>Masahiro Yamada
In the Linux coding style, it is recommended to include <linux/io.h> rather than <asm/io.h>. Follow this trend. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-05-12arch: Make board selection choices optionalJoe Hershberger
By making the board selections optional, every defconfig will include the board selection when running savedefconfig so if a new board is added to the top of the list of choices the former top's defconfig will still be correct. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Cc: Tom Rini <trini@konsulko.com>
2015-03-28malloc_f: enable SYS_MALLOC_F by default if DM is onMasahiro Yamada
This option has a bool type, not hex. Fix it and enable it if CONFIG_DM is on because Driver Model always requires malloc memory. Devices are scanned twice, before/after relocation. CONFIG_SYS_MALLOC_F should be enabled to use malloc memory before relocation. As it is board-independent, handle it globally. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Robert Baldyga <r.baldyga@samsung.com>
2015-03-28malloc_f: remove redundant defalut values of CONFIG_SYS_MALLOC_F_LENMasahiro Yamada
The default value of CONFIG_SYS_MALLOC_F_LEN is defined by ./Kconfig as 0x400. Each defconfig or Kconfig need not repeat the same value. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Robert Baldyga <r.baldyga@samsung.com>
2015-03-24ARM: UniPhier: remove unnecessary ifdef conditionalMasahiro Yamada
The callee (arch/arm/lib/cache-cp15.c) has a #ifdef CONFIG_SYS_DCACHE_OFF conditional. The same conditional in the caller (arch/arm/mach-uniphier/cache_uniphier.c) is redundant. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-03-24ARM: UniPhier: disable L2 cache by lowlevel_init of U-Boot properMasahiro Yamada
The L2 cache is used as a temporary SRAM on SPL. Now the secondary CPUs store the necessary code for jumping to Linux on their L1 I-caches. So, the L2 cache can be disabled much earlier, at the very entry of U-Boot proper (lowlevel_init). This makes the boot sequence clearer. Also, as the L1 cache has been disabled by the start.S, enable_caches() does not need to do it again. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-03-24ARM: UniPhier: optimize kicking secondary CPUs codeMasahiro Yamada
Currently, the secondary CPU(s) are kicked three times: Boot ROM ---(kick)--> SPL ---(kick)--> U-boot ---(kick)--> Linux. It makes the boot sequence very complicated. This commit merges the first and the second kicks, so the secondary CPU(s) can directly jump from SPL to Linux. arch/arm/mach-uniphier/smp.S is no longer necessary. Linux boot test passed. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-03-24ARM: UniPhier: fix typos in commentsMasahiro Yamada
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-03-24ARM: UniPhier: add empty lowlevel_init to U-boot properMasahiro Yamada
To remove the ifdef conditional of CONFIG_SKIP_LOWLEVEL_INIT, add late_lowlevel_init.S to U-Boot proper. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-03-24ARM: UniPhier: use CONFIG_SPL_STACK to define SPL stack pointerMasahiro Yamada
Ifdef conditionals for CONFIG options are not Kconfig-friendly. Instead, define CONFIG_SPL_STACK to prepare for Kconfig moves. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-03-24ARM: UniPhier: enable Driver Model and UART on SPLMasahiro Yamada
Enable CONFIG_SPL_DM and CONFIG_SPL_SERIAL_SUPPORT, which provide Driver Model UART support on SPL. CONFIG_SYS_SPL_MALLOC_{START,SIZE} should be dropped because simple malloc is preferred on SPL. Dlmalloc requires some static variables on .data section that is not available yet for NOR boot mode etc. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-03-24ARM: UniPhier: move UART pin settings to SPLMasahiro Yamada
The UniPhier platform is going to enable Driver Model and UART support on SPL. Move UART pin settings to early_pin_init(), which is called from SPL. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-03-24ARM: UniPhier: move platform devices to SPLMasahiro Yamada
Since we do not have OF_CONTROL support for SPL, platform devices are necessary to enable Driver Model on SPL. To prepare for that, move platdevice.o to SPL and enable it by CONFIG_SPL_DM. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-03-24ARM: UniPhier: include PH1-LD4 Makefile from PH1-sLD8Masahiro Yamada
The two Makefiles arch/arm/mach-uniphier/{ph1-ld4,ph1-sld8}/Makefile are completely the same. We can improve the maintainability by having one to include the other. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-03-24ARM: UniPhier: remove unnecessary CONFIG_SYS_SOCMasahiro Yamada
Since commit a86ac9540e20 (ARM: UniPhier: include <mach/*.h> instead of <asm/arch/*.h>), UniPhier platform does not need the symbolic link arch/arm/include/asm. This option is not necessary either. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-03-01ARM: UniPhier: remove SSC_WAY_SIZE and SSC_NUM_ENTRIES macrosMasahiro Yamada
Each way of the system cache has 256 entries for PH1-Pro4 and older SoCs, whereas 512 entries for PH1-Pro5 and newer SoCs. The line size is still 128 byte. Thus, the way size is 32KB/64KB for old/new SoCs. To keep lowlevel_init SoC-independent, set BOOT_RAM_SIZE to the constant value 32KB. It is large enough for temporary RAM and should work for all the SoCs of UniPhier family. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2015-03-01ARM: UniPhier: remove stop_mpll() from PH1-Pro4 PLL initializationMasahiro Yamada
This function was intended for MN2WS0235 (what we call PH1-Pro4TV). On that SoC, MPLL is already running on the power-on reset and it makes sense to stop the PLL at early boot-up. On the other hand, PH1-Pro4(R) does not have SC_MPLLOSCCTL register, so this function has no point. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2015-03-01ARM: UniPhier: consolidate MEMCONF setting codeMasahiro Yamada
This code is duplicated in ph1-ld4/sg_init.c and ph1-pro4/sg_init.c. Merge the same code into a new file, memconf.c. The helper functions no longer have to be placed in the header file. Also, move them into memconf.c. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2015-03-01ARM: UniPhier: support 1CS support card for all the UniPhier SoCsMasahiro Yamada
Two support card variants are used with UniPhier reference boards: - 1 chip select support card (original CPLD) - 3 chip selects support card (ARIMA-compatible CPLD) Currently, the former is only supported on PH1-Pro4, but it can be expanded to PH1-LD4, PH1-sLD8 with a little code change. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2015-03-01ARM: UniPhier: enable xHCI and GIO cores for PH1-Pro4Masahiro Yamada
This is necessary to use the USB 3.0 host controllers on PH1-Pro4. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2015-03-01ARM: UniPhier: add I/O pin settings for xHCI on PH1-Pro4Masahiro Yamada
This is necessary to use the xHCI cores for PH1-Pro4. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2015-03-01ARM: UniPhier: move uniphier_ehci_reset() functionMasahiro Yamada
Because uniphier_ehci_reset() is only called from ehci-uniphier.c, it can be a static function there. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Marek Vasut <marex@denx.de>
2015-03-01ARM: UniPhier: remove EHCI platform devicesMasahiro Yamada
Now UniPhier platform highly depends on Device Tree configuration (CONFIG_OF_CONTROL is select'ed by Kconfig). Since the EHCI is only used on main U-Boot, we can drop platform devices of the EHCI controllers. We still keep UART platform devices because they might be useful for SPL. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Marek Vasut <marex@denx.de>
2015-03-01ARM: UniPhier: enable STDMAC for EHCIMasahiro Yamada
Deassert the reset signal and provide the clock for STDMAC core. This is necessary for the USB 2.0 host controllers. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2015-03-01ARM: UniPhier: reset NAND core in SPL for non-NAND boot modeMasahiro Yamada
For all the UniPhier SoCs so far, the reset signal of the NAND core is automatically deasserted after the PLL gets stabled. (The bit 2 of SC_RSTCTRL is default to one.) This causes a fatal problem on the NAND controller of PH1-LD4. For that SoC, the NAND I/O pins are not set up yet at the power-on reset except the NAND boot mode. As a result, the NAND controller begins automatic device scanning with wrong I/O pins and finally hangs up. Actually, U-Boot dies after printing "NAND:" on the console unless the boot mode latch detected the NAND boot mode. To work around this problem, reset the NAND core in SPL for non-NAND boot modes. If CONFIG_NAND_DENALI is enabled, the reset signal is deasserted again in U-Boot proper. At this time, I/O pins have been correctly set up, the device scanning should succeed. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2015-03-01ARM: UniPhier: split clkrst_init() into two functionsMasahiro Yamada
Split the current clkrst_init() into two functions: - early_clkrst_init(): called from SPL Deassert the reset signals of the memory controller and some other basic cores. - clkrst_init(): called from main U-boot Deassert the reset signals that are necessary for the access to peripherals etc. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2015-03-01ARM: UniPhier: rename SC_CLKCTRL_CLK_* to SC_SCLKCTRL_CEN_*Masahiro Yamada
Follow the register macros in the LSI specification book. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2015-03-01ARM: UniPhier: fix SBC init codeMasahiro Yamada
Now UniPhier SoCs only work with CONFIG_SPL and the function sbc_init() is called from SPL. The conditional #if !defined(CONFIG_SPL_BUILD) has no point any more. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2015-03-01ARM: UniPhier: fix comments in PH1-Pro4 SBC codeMasahiro Yamada
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2015-03-01ARM: UniPhier: include <mach/*.h> instead of <asm/arch/*.h>Masahiro Yamada
Since commit 0e7368c6c426 (kbuild: prepare for moving headers into mach-*/include/mach), we can replace #include <asm/arch/*.h> with <mach/*.h> so we do not need to create the symbolic link during the build. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2015-03-01ARM: UniPhier: move SoC headers to mach-uniphier/include/machMasahiro Yamada
Move arch/arm/include/asm/arch-uniphier/* -> arch/arm/mach-uniphier/include/mach/* Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2015-03-01ARM: UniPhier: move SoC sources to mach-uniphierMasahiro Yamada
Move arch/arm/cpu/armv7/uniphier/* -> arch/arm/mach-uniphier/* Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
generated by cgit (git 2.34.1) at 2024-12-28 15:45:12 +0000