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2019-12-13dts: am335x-brsmarc1/xre1: insert phy_id againHannes Schmelzer
commit 3b3e8a37d36e ("arm: dts: am335x: sync cpsw/mdio/phy with latest linux - drop phy_id") did sync with recent linux kernel and replaced therefore the 'phy_id' property with a phy-handle pointing to the mdio. This is OK for linux, but introduces trouble with the already running vxWorks on this target. So this commit here re-inerts the phy_id property beside the phy-handle property to be compatible with both. Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
2019-12-09ARM: DRA7: Fixup DSP OPP_HIGH clock rate on DRA76P/DRA77P SoCsSuman Anna
The commit 1b42ab3eda8a ("ARM: DRA7: Fixup DSPEVE, IVA and GPU clock frequencies based on OPP") added the core logic to update the kernel device-tree blob to adjust the DSP, IVA and GPU DPLL clocks based on a one-time OPP choice selected in U-Boot for most of the DRA7xx/AM57xx family of SoCs. The DSPs on DRA76xP/DRA77xP SoCs (DRA76x ACD package SoCs) though provide a higher performance and can run at a higher clock frequency of 850 MHz at OPP_HIGH instead of 750 MHz. Fix up the logic to use the correct clock rates on these SoCs. Note that this higher clock rate is not applicable to other Jacinto 6 Plus SoCs (DRA75xP/DRA74xP SoCs or AM574x SoCs) that follow the ABZ package. Signed-off-by: Suman Anna <s-anna@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-12-09Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-netTom Rini
2019-12-09arm: dts: k3-j721e-common-proc-board: Add DMA and CPSW related DT nodesVignesh Raghavendra
Add DT nodes related to DMA and CPSW to -u-boot.dtsi to get networking up on J721e EVM. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
2019-12-09arm: dts: armada-cp110-*dtsi: add xmdio nodesNevo Hed
Based on upstream-linux See https://github.com/torvalds/linux/commit/f66b2aff. However made the XSMI register window 0x16 (22) bytes per my reading of the functional spec. Similar commits in Marvels own repo bump it to 0x200 (512) bytes but I did not see the reasoning for that. https://github.com/MarvellEmbeddedProcessors/u-boot-marvell/commit/4d932b4. Also added device-name attributes to prevent ambiguity in the `mdio` command. Signed-off-by: Nevo Hed <nhed+github@starry.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-12-09arm: dts: k3-am654-base-board-u-boot: change cpsw2g interface mode to rgmii-rxidGrygorii Strashko
The AM654 SoC doesn't allow to disabling RGMII TX internal delay in CPSW2G MAC. Hence, change CPSW2G interface mode to "rgmii-rxid" - RGMII with internal RX delay provided by the PHY, the MAC will add an TX delay in this case. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-12-09net: Always build the string_to_enetaddr() helperJoe Hershberger
Part of the env cleanup moved this out of the environment code and into the net code. However, this helper is sometimes needed even when the net stack isn't included. Move the helper to lib/net_utils.c like it's similarly-purposed string_to_ip(). Also rename the moved function to similar naming. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Reported-by: Ondrej Jirman <megous@megous.com>
2019-12-09arm: -march=armv5t for ARM11Heinrich Schuchardt
In GCC 9 support for the Armv5 and Armv5E architectures (which have no known implementations) has been removed, cf. https://gcc.gnu.org/gcc-9/changes.html Commit 16540d07fd62 ("arm: fix -march for ARM11") changed the value of the compiler flag from -march=armv5 and -march=armv5t into -march=armv6 for ARM11. The values prior to this patch were: arch-$(CONFIG_CPU_ARM1136) =-march=armv5 arch-$(CONFIG_CPU_ARM1176) =-march=armv5t The change lead to a regression with the Raspberry Pi Zero W not booting anymore. Use -march=armv5t both for ARM1136 and ARM1176. Fixes: 16540d07fd62 ("arm: fix -march for ARM11") Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Tested-by: Joris Offouga <offougajoris@gmail.com>
2019-12-09Merge tag 'u-boot-imx-20191209' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-imx Fixes for 2020.01 ----------------- - imx8qxp_mek: increase buffer sizes and args number - Fixes for imx7ulp - imx8mm: Fix the first root clock in imx8mm_ahb_sels[] - colibri_imx7: reserve DDR memory for Cortex-M4 - vining2000: fixes and convert to ethernet DM - imx8m: fix rom version check to unbreak some B0 chips - tbs2910: Disable VxWorks image booting support
2019-12-09imx8m: fix rom version check to unbreak some B0 chipsPatrick Wildt
Recently the version check was improved to be able to determine that we're running on SoC revision 2.1. A check for B0 was tightened so that it now must equal 0x20 instead of being bigger than 0x20. On some B0 chips the value returned is 0x1020 instead of 0x20. This means even though it's B0, the check will fail and code relying on the correct chip revision will make wrong decisions. There is no documentation of those bits, but it seems that NXP always uses a byte to encode the revision. Thus remove the upper bits to fix the regression. Signed-off-by: Patrick Wildt <patrick@blueri.se>
2019-12-06Merge tag 'u-boot-rockchip-20191206' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip - rockchip pwm driver update to support all the SoCs - RK3308 GMAC and pinctrl support - More UART interface support on PX30 and pmugrf reg fix - Fixup on misc for eth_addr/serial# - Other updates on variant SoCs
2019-12-06ARM: imx: vining2000: Repair PCIe supportMarek Vasut
Ever since the conversion to DM PCI, the board was missing the PCIe DT nodes, hence the PCI did not really work. Fill in the DT nodes and add missing PCIe device reset. Moreover, bring the PCIe power domain up before booting Linux. This is mandatory to keep old broken vendor kernels working, as they do not do so and depend on the bootloader to bring the power domain up. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Silvio Fricke <silvio.fricke@softing.com> Cc: Stefano Babic <sbabic@denx.de>
2019-12-06ARM: imx: vining2000: Convert to SPL frameworkMarek Vasut
In preparation for use of DDR DRAM fine-tuning upon boot, convert the board to SPL framework instead of using DCD tables to bring up DRAM and pinmux. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Silvio Fricke <silvio.fricke@softing.com> Cc: Stefano Babic <sbabic@denx.de>
2019-12-06ARM: mx6: pmu: Expose PMU LDO configuration interfaceMarek Vasut
Make the PMU LDO configuration interface available to board code, so that board code can reconfigure the internal LDOs of the SoC. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Eric Nelson <eric@nelint.com> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Eric Nelson <eric@nelint.com>
2019-12-06board: colibri_imx7: reserve DDR memory for Cortex-M4Igor Opaniuk
i.MX 7's Cortex-M4 core can run from DDR and uses DDR memory for the rpmsg communication. Both use cases need a fixed location of memory reserved. For the rpmsg use case the reserved area needs to be in sync with the kernel's hardcoded vring descriptor location. Use the linux,usable-memory property to carve out 1MB of memory in case the M4 core is running. Also make sure that the i.MX 7 specific rpmsg driver does not get loaded in case we do not carve out memory. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2019-12-06mx6: Allow configuring the NoC registers on i.MX6QPFabio Estevam
The NoC registers on i.MX6QP needs to be configured, otherwise some usecases in the kernel behave incorrectly, such as rotation and resize. Currently the NoC registers are not configured in the kernel, so configure them in U-Boot like it is done in the NXP U-Boot tree. Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Stefano Babic <sbabic@denx.de>
2019-12-06mx7ulp: Sync the device tree related filesFabio Estevam
Sync the mx7ulp device tree related files with the one from NXP U-Boot vendor tree (imx_v2019.04_4.19.35_1.0.0). The mainline support for i.MX7ULP is very premature at this stage. We should probably re-sync with mainline Linux dts when it gets in better shape, but for now sync with the U-Boot vendor code. Signed-off-by: Fabio Estevam <festevam@gmail.com>
2019-12-06mx7ulp: scg: Remove unnused scg_a7_apll_init()Fabio Estevam
scg_a7_apll_init() is not called anywhere, so remove such dead code Signed-off-by: Fabio Estevam <festevam@gmail.com>
2019-12-06mx7ulp: Remove the _RUN notation from the PMC1 LDOVL definitionsFabio Estevam
The LDOVL definitions is common to all the modes, not only RUN mode, so in order to avoid confusion, remove the _RUN notation from the PMC1 LDOVL definitions. Signed-off-by: Fabio Estevam <festevam@gmail.com>
2019-12-06mx7ulp: Introduce the CONFIG_LDO_ENABLED_MODE optionFabio Estevam
Introduce the CONFIG_LDO_ENABLED_MODE option so that i.MX7ULP boards designed to operate with LDO enabled mode can work with 0.95V at LDO output in RUN mode as per the datasheet. Signed-off-by: Fabio Estevam <festevam@gmail.com>
2019-12-06mx7ulp: Print the LDO mode statusFabio Estevam
As per the i.MX7ULP datasheet, it can boot in LDO enabled mode or LDO bypass mode. Print the LDO mode status in the U-Boot log for convenience. Signed-off-by: Fabio Estevam <festevam@gmail.com>
2019-12-06arm: rockchip: rk3308: Initialize the iomux configurationDavid Wu
When we want to use plus pinctrl feature, we need to enable them at spl. Signed-off-by: David Wu <david.wu@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-12-06pwm: rk_pwm: Make PWM driver to support all Rockchip SocsDavid Wu
This PWM driver can be used to support pwm functions for on all Rockchip Socs. The previous chips than RK3288 did not support polarity, and register layout was different from the RK3288 PWM. The RK3288 keep the current functions. RK3328 and the chips after it, which can support hardware lock, configure duty, period and polarity at next same period, to prevent the intermediate temporary state. Signed-off-by: David Wu <david.wu@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-12-06dts: rk3308: Enable ethernet function supported for Firefly ROC_RK3308_CCDavid Wu
The Firefly ROC_RK3308_CC use ref_clock of input mode, and rmii pins of m1 group. Signed-off-by: David Wu <david.wu@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-12-06arm: dts: Add mac node for rk3308 at dtsi levelDavid Wu
The rk3308 only support RMII mode, and if it is output clock mode, better to use ref_clk pin with drive strength 12ma. Signed-off-by: David Wu <david.wu@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-12-05rockchip: misc: protect serial# from getting overwrittenHeiko Stuebner
serial# is one of the vendor properties and thus protected from being overwritten if already set. If env_set is called anyway this result in some nasty warnings, so check for presence before trying that. In the same direction check for the presence of cpuid# and compare it to the actual hardware and emit a warning if they don't match. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-12-05rockchip: misc: don't fail if eth_addr already setHeiko Stuebner
rockchip_setup_macaddr() runs from an initcall, so returning an error code will make that initcall fail thus breaking the boot process. And if an ethernet address is already set this is definitly not a cause for that, so just return success in that case. Fixes: 04825384999f ("rockchip: rk3399: derive ethaddr from cpuid"); Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-12-05rockchip: px30: Add support for using UART3 as debug UARTPaul Kocialkowski
Some generic PX30 SoMs found in the wild use UART3 as their debug output instead of UART2 (used for MMC) and UART5. Make it possible to use UART3 as early debug output, with the associated clock and pinmux configuration. Two sets of output pins are supported (M0/M1). Future users should also note that the pinmux default in the dts is to use the M1 pins while the Kconfig option takes M0 as a default. Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
2019-12-05rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNELPaul Kocialkowski
UART3 also has two sets of pins that can be selected. Rename the config option to a common name, to allow it to be used for both UART2 and UART3. Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-12-05rockchip: px30: Fixup PMUGRF registers layout orderPaul Kocialkowski
According to the PX30 TRM, the iomux registers come first, before the pull and strength control registers. Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
2019-12-05rockchip: px5: enable spl-fifo-mode for emmc for px5-evbAndy Yan
We need load some parts of ATF to sram, but rockchip dwmmc controllers can't do dma to non-ddr addresses space, so set the mmc controller into fifo mode in spl. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-12-05rockchip: rk3308: enable spl-fifo-mode for emmcAndy Yan
We need load some parts of ATF to sram, but rockchip dwmmc controllers can't do dma to non-ddr addresses space, so set the mmc controller into fifo mode in spl. And show my best respect to Heiko's work for this solution. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-12-05Fix typo in macros, "FIRMEWARE" -> "FIRMWARE"Thomas Hebb
Signed-off-by: Thomas Hebb <tommyhebb@gmail.com>
2019-12-04cmd: nand/sf: isolate legacy codeMiquel Raynal
The 'sf' command is not supposed to rely on the MTD stack, but both 'sf' and 'nand' commands use helpers located in mtd_uboot.c. Despite their location, these functions do not depend at all on the MTD stack. This file (drivers/mtd/mtd_uboot.c) is only compiled if CONFIG_MTD is selected, which is inconsistent with the current situation. Solve this by moving these three functions (which are only used by the above two commands) out of mtd_uboot.c and put them in a C file only compiled with cmd/sf.c and cmd/nand.c. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> [trini: Don't export get_part function now] Signed-off-by: Tom Rini <trini@konsulko.com>
2019-12-03mtd: rename CONFIG_NAND -> CONFIG_MTD_RAW_NANDMiquel Raynal
Add more clarity by changing the Kconfig entry name. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> [trini: Re-run migration, update a few more cases] Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
2019-12-03ARM: MediaTek: add basic support for MT8518 boardsmingming lee
This adds a general board file based on MT8518 SoCs from MediaTek. Apart from the generic parts (cpu) we add some low level init codes and initialize the early clocks. This commit is adding the basic boot support for the MT8518 eMMC board. Signed-off-by: mingming lee <mingming.lee@mediatek.com> [trini: Migrate env location to defconfig, set ENV_IS_IN_MMC] Signeed-off-by: Tom Rini <trini@konsulko.com>
2019-12-03pinctrl: add driver for MT8518mingming lee
Add Pinctrl driver for MediaTek MT8518 SoC. Signed-off-by: mingming lee <mingming.lee@mediatek.com>
2019-12-03ARM: MediaTek: Add support for MediaTek MT8518 SoCmingming lee
Add support for MediaTek MT8518 SoC. This include the file that will initialize the SoC after boot and its device tree. Signed-off-by: mingming lee <mingming.lee@mediatek.com>
2019-12-03board: omapl138_lcdk: add the mmc device to SPLBartosz Golaszewski
We don't have full device-tree support in SPL yet - add an appropriate U_BOOT_DEVICE() to the board file. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
2019-12-03mmc: davinci: drop support for ti,dm6441-mmcBartosz Golaszewski
The DM family of DaVinci SoCs is no longer supported. Drop the irrelevant code from the driver. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
2019-12-03armv7m: cache: add invalidate_icache_all() stubGiulio Benetti
This commit: https://gitlab.denx.de/u-boot/u-boot/commit/d409c962169bd293e39386d0ddfa64d5222a3be4 causes build failure with ICACHE enabled. This is due to missing invalidate_icache_all() stub. Let's add empty invalidate_icache_all() in the case where ICACHE is not enabled. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2019-12-03cosmetic: Fix spelling and whitespace errorsThomas Hebb
Signed-off-by: Thomas Hebb <tommyhebb@gmail.com>
2019-12-02common: Move some board functions out of common.hSimon Glass
A number of board function belong in init.h with the others. Move them. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02common: Move board_get_usable_ram_top() out of common.hSimon Glass
Move this function into init.h which seems to be designed for this sort of thing. Also update the header to declare struct global_data so that it can be included without global_data.h being needed. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02common: Move command functions out of common.hSimon Glass
Move these functions into the command.h header file which is a better fit. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02common: Move enable/disable_interrupts out of common.hSimon Glass
Move these two functions into the irq_funcs.h header file. Also move interrupt_handler_t as this is used by the irq_install_handler() function. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02common: Move interrupt functions into a new headerSimon Glass
These functions do not use driver model but are fairly widely used in U-Boot. But it is not clear that they will use driver model anytime soon, so we don't want to label them as 'legacy'. Move them to a new irq_func.h header file. Avoid the name 'irq.h' since it is widely used in U-Boot already. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02arm: powerpc: Tidy up code style for interrupt functionsSimon Glass
Remove the unwanted space before the bracket. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02common: Move ARM cache operations out of common.hSimon Glass
These functions are CPU-related and do not use driver model. Move them to cpu_func.h Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02common: Move some cache and MMU functions out of common.hSimon Glass
These functions belong in cpu_func.h. Another option would be cache.h but that code uses driver model and we have not moved these cache functions to use driver model. Since they are CPU-related it seems reasonable to put them here. Move them over. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
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