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2019-10-08arm64: zynqmp: Use mailbox driver for PMUFW config loadingMichal Simek
With new mailbox driver PMUFW configuration object can be loaded via the same interface and there is no need to have pmu_ipc.c completely. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Luca Ceresoli <luca@lucaceresoli.net>
2019-10-08arm64: zynqmp: probe firmware driverIbai Erkiaga
Probe ZynqMP firmware driver on the board initialization phase and ensure that firmware is in place to continue execution. The probing is done on board_init so it can be used for both SPL and U-Boot proper. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08arm64: zynqmp: remove old fw version functionIbai Erkiaga
Removes the old function to get the firmware version. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08firmware: zynqmp: create firmware headerIbai Erkiaga
New firmware header to place firmware specific macro and function declarations. The patch also moves the macros defining PM operations as well as some helper macros. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08arm64: zynqmp: Cleanup PM SMC macro compositionMichal Simek
Cleanup PM ID handling by using enum values. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08arm64: zynqmp: add firmware and mailbox node to DTIbai Erkiaga
The following patch adds a mailbox node and firmware node to following the mainline DT. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08firmware: zynqmp: Add zynqmp-power supportIbai Erkiaga
zynqmp-power driver for ZynqMP to handle the communication with the PMU firmware. Firmware driver just probes subnodes and power driver handles communication with PMU using the IPI mailbox driver. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08mailbox: zynqmp: ipi mailbox driverIbai Erkiaga
ZynqMP mailbox driver implementing IPI communication with PMU. This would allow U-Boot SPL to communicate with PMUFW to request privileged operations. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08arm64: zynqmp: Add a2197 memory board revAMichal Simek
Similar to processor board but i2c structure is completely different. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08arm64: zynqmp: Add System Controller for a2197-g/pMichal Simek
Similar SCs but different wiring. - dc_i2c is connected to X-PRC cards that's why label is required to have an option to hook up some devices. - Exactly identify i2c devices on x-prc boards. In case of missing i2c connection devices won't be accessible. - USB 0 should be device mode with super speed. - USB 1 should be host mode. - Fix i2c mux reset pin entry - commented, not verified. - Fix i2c1 eeprom compatible string - it is an ST 128Kbit device. Need to use atmel fallback. - Fix si570 I2C slave address and add corresponding part numbers. - Enable AMS for system monitoring. - phy reset property should be commented because it will throw a warning dump when called from context that can sleep. No support for phys property (zynqmp phy driver) with SGMII. Add is-internal-pcspma property required by uboot. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Harini Katakam <harini.katakam@xilinx.com>
2019-10-08arm64: zynqmp: Add generic a2197 system controller configMichal Simek
Add generic configuration for a2197-p/-m/-g boards. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08arm64: zynqmp: Switch spi-flash to jedec, spi-nor compatibleMichal Simek
Change has been done across the whole tree only zynqmp-mini-qspi hasn't been fixed. Origin changed done by commit ffd4c7c2ecb7 ("dts: switch spi-flash to jedec, spi-nor compatible") Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08ARM: zynq: dts: Added alias for usb nodeVipul Kumar
This patch added alias for usb node in dts file. Signed-off-by: Vipul Kumar <vipul.kumar@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08ARM: zynq: Align model name with DTMichal Simek
Use model property to distinguish different configurations. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08clk: versal: Add clock driver supportSiva Durga Prasad Paladugu
This patch adds clock driver support for Versal platform. The clock driver queries and performs clock operations using PLM firmware by communicating with it using SMC calls. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08arm64: zynqmp: Provide a Kconfig option to disable OCM and TCM MMU mappingMichal Simek
This patch provides an option to enable/disable OCM and TCM memory into MMU table with corresponding memory attributes. The same change was done for ZynqMP by commit 189bec47ab1f ("arm64: zynqmp: Provide a Kconfig option to define OCM and TCM in MMU") Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08arm64: versal: Enable memory mapping via DTMichal Simek
Code reads DT and setup MMU table based on memory node. This will ensure that only DT needs to be changed. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08arm64: zynqmp: Set initrd_high to as high as possibleT Karthik Reddy
This patch is setting up the initrd_high to as high as possible by leaving max stack size for u-boot so that bigger rootfs can also be loaded by u-boot for booting kernel. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08arm64: versal: Set initrd_high to as high as possibleSiva Durga Prasad Paladugu
This patch is setting up the initrd_high to as high as possible by leaving max stack size for u-boot so that bigger rootfs can also be loaded by u-boot for booting kernel. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08arm64: versal: Define board_late_init for versalSiva Durga Prasad Paladugu
Define board_late_init which performs bootmode detection and prepares corresponding distro boot commaand sequence. Also disable it for mini platforms because simply there is no need to have it enabled. But also disable it for virtual platform because Qemu is not modelling this register space that's why travis testing would fail. This configuration should be reverted when mainline Qemu is updated. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08arm64: zynqmp: Add u-boot,dm-pre-reloc to clk300 nodeMichal Simek
This node is used by qspi driver for supporting qspi boot mode in SPL. Similar changes have beeen done by commit a9022b017a90 ("ARM64: zynqmp: Add u-boot,dm-pre-reloc to clk nodes") Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08ARM: dts: at91: sam9x60ek: add onewire supportEugen Hristev
Add support for onewire memory. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2019-10-08ARM: dts: at91: sam9x60: add onewire nodeEugen Hristev
Add onewire node for w1 support. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2019-10-08ARM: dts: at91: sam9x60ek: Enable qspi nodeTudor Ambarus
The sam9x60 qspi controller uses 2 clocks, one for the peripheral register access, the other for the qspi core and phy. Both are mandatory. Enable the qspi node together with the SST26VF064B qspi nor flash memory. Booting from the QSPI NOR flash is now possible. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2019-10-08ARM: at91: Add SFR definitionsTudor Ambarus
sama5's SFR has at offset 0x04 the DDR Configuration Register, while sam9x60's SFR contains the EBI Chip Select Register. Add a union to reconcile both boards. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2019-10-08ARM: at91: Rename sama5_sfr.h to at91_sfr.hTudor Ambarus
The Special Function Registers (SFR) are present in sam9x5 and sam9x60 too, rename sama5_sfr to at91_sfr.h. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2019-10-08board: atmel: Add sam9x60ek boardSandeep Sheriker Mallikarjun
Add new board SAM9X60-EK using the ARM926 SAM9X60 SoC. Signed-off-by: Sandeep Sheriker Mallikarjun <sandeepsheriker.mallikarjun@microchip.com> [tudor.ambarus@microchip.com: - fix number of DRAM banks: One DDR2-SDRAM (W972GG6KB 2 Gbit = 16 Mbit x 16 x 8 banks] - drop SPL related macros - drop memtest macros - drop CONFIG_SPI_BOOT, CONFIG_SYS_USE_DATAFLASH related macros - drop inclusion of asm/arch/at91sam9_smc.h] Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2019-10-08ARM: dts: at91: sam9x60: Add macb0 Ethernet controllerNicolas Ferre
Add Ethernet controller to dtsi file and enable it on sam9x60ek platform connected with rmii. Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2019-10-08ARM: dts: Add dts files for sam9x60ekSandeep Sheriker Mallikarjun
add device tree files for sam9x60ek board with below changes. - Add initial device nodes (pmc, pinctrl, sdhc, dbgu & pit) - Add the reg property for the pinctrl node. - Add the "u-boot,dm-pre-reloc" property to determine which nodes are used by the board_init_f stage. Signed-off-by: Sandeep Sheriker Mallikarjun <sandeepsheriker.mallikarjun@microchip.com> [prasanthi.chellakumar@microchip.com: fix style/whitespace issues] Signed-off-by: Prasanthi Chellakumar <prasanthi.chellakumar@microchip.com> [nicolas.ferre@microchip.com: - fix gclk, - fix pio/pinctrl controller definition and allow to have more than only PIOA for this SoC, - removing pinctrl address] Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> [claudiu.beznea@microchip.com: - use SAM9X60's compatible for pinctrl - add drive strength and slew rate options for SDMMC0 pins.] Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> [tudor.ambarus@microchip.com: - u-boot,dm-pre-reloc property in dedicated file, - fix pit len, starts from 0xFFFFFE40 and it is of len 0x10] Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2019-10-08ARM: at91: Add sam9x60 socSandeep Sheriker Mallikarjun
Add new Microchip sam9x60 SoC based on an ARM926. Signed-off-by: Sandeep Sheriker Mallikarjun <sandeepsheriker.mallikarjun@microchip.com> [tudor.ambarus@microchip.com: fix SFR definition] Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2019-10-08ARM: dts: at91: sama5d27_wlsom1: add hlcdc nodeEugen Hristev
Add node for hlcld for u-boot logo display at boot. This is compatible with the Precision Design Associates (PDA) TM5000 screen. Timings are compatible with simple panel from Linux, panel name is pda_91_00156_a0 Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2019-10-08ARM: dts: at91: sama5d27_wlsom1_ek: add support for qspiEugen Hristev
Add node for qspi1 memory connected on the wlsom Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2019-10-08ARM: dts: at91: sama5d2: add seq for qspi1Eugen Hristev
qspi1 does not have an alias/seq number. This is required for SPL default SF bus booting for the boards that have this SoC Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2019-10-08board: atmel: sama5d2_wlsom1_ek: add SPL supportEugen Hristev
Add support for SPL for this board: DRAM initialization, PMC initialization, MMC boot. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2019-10-08ARM: at91: mpddrc: add lpddr2 initialization procedureEugen Hristev
Implement the lpddr2 initialization procedure for at91 mpddrc multi-port ddram controller. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2019-10-08board: laird: wb50n: use configure_ddrcfg_input_buffersEugen Hristev
Replace code with new function configure_ddrcfg_input_buffers from SFR mach driver. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2019-10-08ARM: at91: sfr: implement DDR input buffers open functionEugen Hristev
Add a function in SFR implementation that will open the DDR input buffers. This can be called at DRAM initialization time. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2019-10-08ARM: at91: sfr: convert to KconfigEugen Hristev
This converts the at91 sfr to Kconfig Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2019-10-08board: atmel: add sama5d27_wlsom1_ek boardNicolas Ferre
Add support for the SAMA5D27-WLSOM1-EK. It's based on the Microchip WireLess SoM which contains the SAMa5D27 LPDDR2 2Gbits SiP. Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> [eugen.hristev@microchip.com]: added u-boot specific dtsi and ported to 2019.10 Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2019-10-08ARM: at91: Add the chip ID for SAMA5D2 LPDDR2 SiPNicolas Ferre
The SAMA5D2 LPDDR2 SiP (System in Package) is added for SoC identification. Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2019-10-08spl: Convert CONFIG_SPL_SIZE_LIMIT to hexSimon Glass
This is currently a decimal value which is not as convenient or meaningful. Also U-Boot tends to use hex everywhere. Convert this option to hex and add a comment for the size_check macro. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Acked-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: correct the typo in the commit title] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08spl: Allow tiny printf() to be controlled in SPL and TPLSimon Glass
At present there is only one control for this and it is used for both SPL and TPL. But SPL might have a lot more space than TPL so the extra cost of a full printf() might be acceptable. Split the option into two, providing separate SPL and TPL controls. The TPL setting defaults to the same as SPL. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08arm: mxs: Correct CONFIG_SPL_NO_CPU_SUPPORT optionSimon Glass
At present this is defined in Kconfig but there is a separate one in the CONFIG whitelist. It looks like these are duplicates. Rename the non-Kconfig one and remove it from the whitelist. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08dm: core: Add device_foreach_child()Simon Glass
We have a 'safe' version of this function but sometimes it is not needed. Add a normal version too and update a few places that can use it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08watchdog: move WATCHDOG_TIMEOUT_MSECS to KconfigHeiko Schocher
move WATCHDOG_TIMEOUT_MSECS to Kconfig and fix all board defconfigs. Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Stefan Roese <sr@denx.de> Acked-by: Lukasz Majewski <lukma@denx.de> Acked-by: Martyn Welch <martyn.welch@collabora.com> Signed-off-by: Stefan Roese <sr@denx.de>
2019-10-06Revert "ARM: tegra: reserve unmapped RAM so EFI doesn't use it"Mian Yousaf Kaukab
This reverts commit 0797f7f0b7e1d7853e2842ddc235ffef139fa792. Tegra specific solution is not required any more as efi core has been made aware of ram_top with the following commit: 7b78d6438a efi_loader: Reserve unaccessible memory Signed-off-by: Mian Yousaf Kaukab <ykaukab@suse.de>
2019-10-05Merge branch 'master' of git://git.denx.de/u-boot-shTom Rini
- ARM: dts: rmobile: Restore increase off-on delay on the SD Vcc regulator
2019-10-04ARM: dts: imx6q-logicpd: Add missing imx6q-logicpd-u-boot for SPLAdam Ford
The SPL device tree is missing the entires for gpio1, uart1, usdhc1 and usdhc2. This creates the missing imx6q-logicpd-u-boot.dtsi file which will enable these functions so SPL can properly setup UART, detect microSD card, and startup. Fixes: 8f4691e31a18 ("ARM: imx6q_logic: With SPL_OF_CONTROL enabled, remove MMC init") Signed-off-by: Adam Ford <aford173@gmail.com>
2019-10-04board: ti: am654: Disable TRNG node for HS devicesAndrew F. Davis
On HS devices the access to TRNG is restricted on the non-secure ARM side, disable the node in DT to prevent firewall violations. Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-10-04arm: K3: Increase default SYSFW image size allocationAndrew F. Davis
The memory allocated to store the FIT image containing SYSFW and board configuration data is statically defined to the largest size expected. This was 269000 bytes but now needs to be grown to 276000 to make room for the signatures attached to the board configuration data on High Security devices. Signed-off-by: Andrew F. Davis <afd@ti.com>
generated by cgit (git 2.34.1) at 2025-01-10 18:41:54 +0000