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In SPL build, the formatting '%llx' in debug() is not supported.
Also, fix some misplaced parameters in printf.
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Seb Fagard <sebastien.fagard@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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parameter 'end address' must be inclusive of address range.
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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Latest SCFW has removed old MISC SECO commands. So update the codes
to use new SECO commands.
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
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parameter 'end address' must be inclusive of address range.
Modified from Seb's downstream patch.
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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Add the dump of DRAM PLL into "clocks" command
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
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For ARM core clock, there are two input branches, and can select via mux:
one from ARM PLL directly, second from CCM A53 clock root.
Currently we are using second branch. But IC confirmed the CCM A53 root
signoff timing is 1Ghz, so we should switch to input from ARM PLL directly.
This patch fixes the CORE SEL slice configuration and switch ARM clock
to ARM PLL.
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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iMX8MQ EVK board has a eMMC5.0 chip and supports SD3.0, so enable the UHS
and HS400 configs to enhance the eMMC/SD access.
The change also needs to set usdhc clock to 400Mhz, and add the
off-on-delay-us to SD reset pin, otherwise some SD cards will
fail to select UHS mode in re-initialization.
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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Update clock root table to let it be easy to configure clock at
very early stage. Also the core_sel mux parent should be A53 CLK
root and ARM PLL.
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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Acquire ATF commit hash when booting U-Boot to make user easy
to know the ATF version.
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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Move the SIP macro to common header and unify the name to
make others could reuse them.
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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Update is_imx6ull helper to include i.MX6ULZ SoC. i.MX6ULZ could
share same macro, then we no need to add is_imx6ulz in various drivers.
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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Add i.MX8MN variants support
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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Add i.MX8MQ Dual and QuadLite variants.
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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i.MX8MP speed grade use same layout as i.MX8MN, so reuse it for i.MX8MP
Reviewed-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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imx8mn speed grade fuse uses new definitions as below. So have
to update get_cpu_speed_grade_hz function to match it.
SPEED_GRADE[5:4] SPEED_GRADE[3:0] MHz
xx 0000 2300
xx 0001 2200
xx 0010 2100
xx 0011 2000
xx 0100 1900
xx 0101 1800
xx 0110 1700
xx 0111 1600
xx 1000 1500
xx 1001 1400
xx 1010 1300
xx 1011 1200
xx 1100 1100
xx 1101 1000
xx 1110 900
xx 1111 800
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
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According to iMX8MM datasheet (IMX8MMIEC_Rev_D and IMX8MMCEC_Rev_D),
the speed grading for imx8mm is 800Mhz, 1.2Ghz, 1.6Ghz and 1.8Ghz.
Update them to get_cpu_speed_grade_hz function.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
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i.MX8MP use 0x182 as its ID, so 0xff is not valid to get the cpu type,
extend it to 0x1ff.
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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All the FEC ethernet clock entries for iMX8MM are missing, while they
are already present on iMX8MQ. Fill in the nodes on iMX8MM, as the FEC
ethernet gets bogus clock information otherwise which makes ethernet
inoperable.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
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commit b2f5da9dd068 ("rockchip: rk3399: Add Nanopi M4 board support") added
support for Nanopi M4 board with Dual-Channel 4GB LPDDR3-1866 RAM.
This patch adds another variant of NanoPi M4 board with Dual-Channel
2GB DDR3-1866 RAM.
Signed-off-by: Deepak Das <deepakdas.linux@gmail.com>
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Add Firefly ROC-RK3399-PC Mezzanine board which is an
extension board on top of roc-rk3399-pc.
Will drop the separate defconfig file, once we support
the board detection at runtime.
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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Sync Firefly ROC-RK3399-PC Mezzanine Board dts file
from Linux v5.7-rc1.
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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Sync rk3399 dts(i) files from v5.7-rc1 linux-next.
Reason:
To get updated PCIe nodes and properties on respective
dts(i) files.
Summary:
- sync won't include new board dts(i)
- sync will add required files used on respective dts(i)
- rk3399-puma-u-boot.dtsi spiflash label changed to norflash
- move puma.dtsi bios_enable into rk3399-puma-u-boot.dtsi
- move legacy max-frequency of sdhci into rk3399-u-boot.dtsi
- update cross-ec-[keyboard|sbs].dtsi path as per U-Boot
- keep roc-rk3399-pc dc_12v changes to -u-boot.dtsi
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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Move U-Boot specific properties into rk3399-evb u-boot
specific dtsi file.
This would help to sync the devicetrees from Linux whenever
required instead of adding specific nodes.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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Move U-Boot specific properties into rk3399-puma u-boot
specific dtsi file.
This would help to sync the devicetrees from Linux whenever
required instead of adding specific nodes.
Cc: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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If the VBUS regulator is always-on, XHCI will fail to detect USB 3.0
devices; USB 2.0 devices will work however.
Make the VBUS regulator controllable and tie it to only the XHCI. This
makes all three USB ports usable.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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The ROC-RK3328-CC from Firefly and Libre Computer Project is a credit
card size development board based on the Rockchip RK3328 SoC, with:
- 1/2/4 GB DDR4 DRAM
- eMMC connector for optional module
- micro SD card slot
- 1 x USB 3.0 host port
- 2 x USB 2.0 host port
- 1 x USB 2.0 OTG port
- HDMI video output
- TRRS connector with audio and composite video output
- gigabit Ethernet
- consumer IR receiver
- debug UART pins
The ROC-RK3328-CC has the enable pin of the SD card power switch tied
to GPIO_0_D6. This pin also has the function SDMMC0_PWREN, which is
muxed by default. SDMMC0_PWREN is an active high signal controlled by
the MMC controller, however the switch enable is active low, and
pulled low (enabled) by default to make things work on boot.
As such, we need to mux away from SDMMC0_PWREN and use GPIO to enable
power to the card. The default GPIO state for the pin is pull-down and
input, which doesn't require extra configuration when paired with the
external pull-down and active low switch.
Deal with this by enabling regulator support in SPL, and setting
"u-boot,dm-spl" for the regulator and other device nodes needed for
muxing the pin.
The device tree file is synced from the Linux kernel next-20200324.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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This syncs rk3328 device tree files from the Linux kernel next-20200324.
The last commit to touch these files is:
b2411befed60 ("arm64: dts: add bus to rockchip amba nodenames")
Additional changes not yet in the Linux kernel include:
arm64: dts: rockchip: rk3328: drop #address-cells, #size-cells from grf node
arm64: dts: rockchip: rk3328: drop non-existent gmac2phy pinmux options
arm64: dts: rockchip: rk3328: Replace RK805 PMIC node name with "pmic"
Changes include:
- conversion of raw pin numbers to macros
- removal of deprecated RK_FUNC_* macros
- update of device tree binding headers
- new devices
- device tree cleanups
- gmac2phy disabled in -u-boot.dtsi as it is not supported in U-boot
This includes a re-ordering of the USB device nodes compared to upstream
Linux, moving the dwc2 OTG controller after the EHCI/OHCI nodes. This is
currently required as otherwise the dwc2 controller would not be able to
detect devices in some cases. This may be due to lack of USB PHY support
in U-boot.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
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The "hnp-srp-disable" property for dwc2 is specific to U-boot, not part
of upstream Linux's device tree bindings.
Move it to rk3328-u-boot.dtsi to avoid losing it when syncing device
tree files.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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The device tree file for rk3328-evb in the Linux kernel does not have
gmac2io enabled. Instead, gmac2phy is enabled, but that is not supported
in U-boot.
Move the gmac2io related nodes to rk3328-evb-u-boot.dtsi to preserve the
current functionality. When the device tree files are synced, gmac2phy
should be marked as "broken" in -u-boot.dtsi files.
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Loic Devulder <ldevulder@suse.com>
Tested-by: Peter Geis <pgwipeout@gmail.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
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USB 3.0 is only supported in U-boot, not in the Linux kernel where the
device tree files are ultimately synced from. While the xhci node was
moved, the external vbus regulator was not.
Move it as well.
Fixes: 2e91e2025c1b ("rockchip: rk3328: migrate u-boot node to -u-boot.dtsi")
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Loic Devulder <ldevulder@suse.com>
Tested-by: Peter Geis <pgwipeout@gmail.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
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https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze
Xilinx changes for v2020.07-rc2
mmc:
- Fix dt property handling via generic function
clk:
- Fix versal watchdog clock setting
nand:
- Fix zynq nand command comparison
xilinx:
- Enable ubifs
- Sync board_late_init configurations with initrd_high setup
- Make custom distro boot more verbose
zynq:
- Kconfig alignments
- Fix nand cse configuration
zynqmp:
- Fix zcu104 low level qspi configuration
- Small DT updates
Signed-off-by: Tom Rini <trini@konsulko.com>
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- Add DM_ETH support for DPAA1, DPAA2 based RDB platforms: ls1046ardb,
ls1043ardb, lx2160ardb, ls2088ardb, ls1088ardb.
- Add GICv3 support for ls1028a, ls2088a, ls1088a.
- Add lpuart support on ls1028aqds.
- Few bug fixes and updates on ls2088a, ls1012a, ls1046a, ls1021a based
platforms.
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- rmobile gen2/gen3 DTS sync and defconfig consolidation
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Probe the FMan MACs based on the device tree while
retaining the legacy code/functionality.
One notable change introduced here is that, for DM_ETH,
the name of the interfaces is corrected to the fmX-macY
format, that avoids the referral to the MAC block names
which were incorrect for FMan v3 devices (i.e. DTSEC,
TGEC) and had weird formatting (i.e. FM1@DTSEC6, FM1@TGEC1).
The legacy code is left unchanged in this respect.
Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
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Introduce the QorIQ DPAA 1 Frame Manager nodes in the LS1046ARDB
device tree. The device tree fragments are copied over with little
modification from the Linux kernel source code.
Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
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Add the QorIQ DPAA 1 Frame Manager v3 device tree nodes for the
LS1046A SoC. The device tree fragments are copied over with little
modification from the Linux kernel source code.
Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
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Introduce the QorIQ DPAA 1 Frame Manager nodes in the LS1043ARDB
device tree. The device tree fragments are copied over with little
modification from the Linux kernel source code.
Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
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Add the QorIQ DPAA 1 Frame Manager v3 device tree nodes for the
LS1043A SoC. The device tree fragments are copied over with little
modification from the Linux kernel source code.
Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
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Add the QorIQ DPAA Frame Manager v3 device tree nodes description.
The device tree fragments are copied over with little modification
from the Linux kernel source code.
Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
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Rename fsl-ls1028a-qds.dts to fsl-ls1028a-qds.dtsi so that
it can be used as common device tree for lpuart and duart.
Add lpuart device tree and duart device tree respectively
for qds which are used with duart and lpuart console.
Signed-off-by: Vabhav Sharma <vabhav.sharma@nxp.com>
Signed-off-by: Yuantian Tang <andy.tang@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
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Add lpuart nodes to enable lpuart feature
Signed-off-by: Vabhav Sharma <vabhav.sharma@nxp.com>
Signed-off-by: Yuantian Tang <andy.tang@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
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In order to maintain compatibility with the Linux DTS, the entire fsl-mc
node is added but instead of being probed by a dedicated bus driver it
will be a simple-mfd.
Also, annotate the external MDIO nodes and describe the PHYs (8 x
VSC8514, AQR105). Also, add phy-handles for the dpmacs to their
associated PHY.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
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In order to maintain compatibility with the Linux DTS, the entire fsl-mc
node is added but instead of being probed by a dedicated bus driver it
will be a simple-mfd.
Also, annotate the external MDIO nodes and describe the PHYs (4 x AQR405
and 4 x CS4340). Also, add phy-handles for the dpmacs to their
associated PHY.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
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In order to maintain compatibility with the Linux DTS, the entire fsl-mc
node is added but instead of being probed by a dedicated bus driver it
will be a simple-mfd.
Also, annotate the EMDIO1 node and describe the 2 AR8035 RGMII PHYs and
the 2 AQR107 PHYs. Also, add phy-handles for the dpmacs to their
associated PHY.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
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Add the External MDIO1 device node found in the WRIOP global memory
region. This is needed for management of external PHYs.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
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Add the External MDIO1 device node found in the WRIOP global memory
region. This is needed for management of external PHYs.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
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Add the External MDIO device nodes found in the WRIOP global memory
region. This is needed for management of external PHYs.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
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Add enable rng node in px30-evb-u-boot.dtsi.
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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Add rng node in rk3399-u-boot.dtsi and enable it in
rk3399-evb-u-boot.dtsi.
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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Remove DT nodes which are not used by U-Boot, like audio and video in/out
nodes. This saves about 35 kiB on the resulting U-Boot binary without any
impact on functionality.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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