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This commit adds board support for i.MXRT1050-EVK from NXP. This board
is an evaluation kit provided by NXP for i.MXRT105x processor family.
More information about this board can be found here:
https://www.nxp.com/design/development-boards/i.mx-evaluation-and-development-boards/i.mx-rt1050-evaluation-kit:MIMXRT1050-EVK
The initial supported/tested devices include:
- Debug serial
- SD
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
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Add i.IMXRT family basic support.
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
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Add dtsi file for i.MXRT1050.
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
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Since some driver requires this function add it as an empty stub
when DCACHE is OFF.
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
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IPG clock description is missing for I2C0 and I2C2 busses,
add it. Otherwise we see -ENODATA error when trying to get
I2C clock for these busses.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
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imx6ul-14x14-evk does not have a GPIO dedicated for reading the card
detect pin on the eSDHC2 port. In such cases the "broken-cd" property
must be passed, otherwise the card cannot be detected.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
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Add support for Capricorn Deneb SoM variant.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
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Add support for i.MX8X based Capricorn Giedi SoM.
Supported interfaces: GPIO, ENET, eMMC, I2C, UART.
Console output:
U-Boot SPL 2020.01-00003-gfd1c98f (Jan 07 2020 - 15:51:25 +0100)
Trying to boot from MMC1
Load image from MMC/SD 0x3e400
U-Boot 2020.01-00003-gfd1c98f (Jan 07 2020 - 15:51:25 +0100) ##v01.07
CPU: NXP i.MX8QXP RevB A35 at 1200 MHz at 30C
Model: Siemens Giedi
Board: Capricorn
Boot: MMC0
DRAM: 1022 MiB
MMC: FSL_SDHC: 0
Loading Environment from MMC... OK
In: serial@5a080000
Out: serial@5a080000
Err: serial@5a080000
Net: eth1: ethernet@5b050000 [PRIME]
Autobooting in 1 seconds, press "<Esc><Esc>" to stop
Signed-off-by: Anatolij Gustschin <agust@denx.de>
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All Tegra chips except Tegra186 have a tegraNNN-u-boot.dtsi. Duplicate
Tegra210's copy of this file for Tegra186. This ensures that a /binman node
exists in U-Boot's control DT. Subsequent to 3c10dc95bdd0 ("binman: Add a
library to access binman entries") this appears to be required. I haven't
really investigated why all this is necessary or how it works, but simply
observed the boot failure listed below, bisected it, noticed the
inconsistency in DT files, and found that fixing it resolved the boot
issue.
U-Boot 2020.01-rc4-00256-g3c10dc95bdd0 (Jan 07 2020 - 10:25:00 -0700)
SoC: tegra186
Model: NVIDIA P2771-0000-500
Board: NVIDIA P2771-0000
DRAM: 7.8 GiB
initcall sequence 00000000fffb7858 failed at call 00000000800955a8 (err=-22)
### ERROR ### Please RESET the board ###
Fixes: 3c10dc95bdd0 ("binman: Add a library to access binman entries")
Fixes: f2faffecb016 ("binman: tegra: Convert to use binman")
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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This patch is to build the coresight topology structure of zynq-7000
series according to the docs of coresight and userguide of zynq-7000.
Signed-off-by: Zumeng Chen <zumeng.chen@windriver.com>
Signed-off-by: Quanyang Wang <quanyang.wang@windriver.com>
Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Just fixing indentation and update year in Copyright.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Sync location with mainline kernel.
Added by Linux kernel commit 75926f07baae
("arm64: dts: zynqmp: Add missing gpio-controller to ps gpio").
Fixes: 0b33e0b15600 ("arm64: zynqmp: Add missing gpio property to dtsi")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Most of the legacy "gpio-key,wakeup" boolean property is already
replaced with "wakeup-source". However few occurrences of old property
has popped up again, probably from the remnants in downstream trees.
This patch replaces the legacy properties with the unified
"wakeup-source" property introduced by:
"Input: gpio_keys - switch to using generic device properties"
(sha1: 700a38b27eefc582099fdf69effacfad0ad738a4)
Cc: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Somewhere along recent changes to power control of the wl1831, power-on
became very unreliable on the Ultra96, failing like this:
wl1271_sdio: probe of mmc2:0001:1 failed with error -16
wl1271_sdio: probe of mmc2:0001:2 failed with error -16
After playing with some dt parameters and comparing to other users of
this chip, it turned out we need some power-on delay to make things
stable again. In contrast to those other users which define 200 ms,
Ultra96 is already happy with 10 ms.
Fixes: 5869ba0653b9 ("arm64: zynqmp: Add support for Xilinx zcu100-revC")
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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s/_/-/ for node names.
It fixes warnings like this:
... Warning (node_name_chars_strict): /cpu_opp_table:
Character '_' not recommended in node name ...
Issues reported by make dtbs W=12
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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The 'arm,armv8' compatible string is only for software models. It adds
little value otherwise and is inconsistently used as a fallback on some
platforms. Remove it from those platforms.
This fixes warnings generated by the DT schema.
Reported-by: Michal Simek <michal.simek@xilinx.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Acked-by: Antoine Tenart <antoine.tenart@bootlin.com>
Acked-by: Nishanth Menon <nm@ti.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Acked-by: Chanho Min <chanho.min@lge.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Wei Xu <xuwei5@hisilicon.com>
Acked-by: Liviu Dudau <liviu.dudau@arm.com>
Acked-by: Matthias Brugger <matthias.bgg@gmail.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Scott Branden <scott.branden@broadcom.com>
Acked-by: Kevin Hilman <khilman@baylibre.com>
Acked-by: Chunyan Zhang <zhang.lyra@gmail.com>
Acked-by: Robert Richter <rrichter@cavium.com>
Acked-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
Acked-by: Dinh Nguyen <dinguyen@kernel.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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zcu102-revB/up are not removing phy from revA properly because of incorrect
name.
Fixes: 2975a42b42c5 ("arm64: zynqmp: Use ethernet-phy as node name for ethernet phys")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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zcu1285 is the same as zcu1275 but it is using Avnet FMC
http://www.ultrazed.org/product/network-fmc-module
Unfortunately not everything is connected now that's why this is only
describing system which Xilinx is using.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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There is no issue with using firmware based driver instead of fixed clock
one.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Removed no-1-8-v property from zynqmp sdhci devicetree nodes to
allow UHS-I capable SD cards to work in SD3.0 UHS modes.
Boards that does not have level shifter for SD, does not support 1.8v.
so no-1-8-v property to sdhci dt nodes should be present in zcu102 Rev-A,B,
zcu104 Rev-A,C, zcu100, zcu1275 Rev-B boards.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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The board is very similar to zcu216 with zu49dr device.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Add missing nand/smcc description.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Corrected the type of eeprom in device tree for zcu216 boards according
to schematic.
Signed-off-by: Raviteja Narayanam <raviteja.narayanam@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Fix shunt resistor value for ina226 vccint_ams and vccint_io_bram_ps.
2mOhm shunt was only in early board revision schematics but never got to
real revA board.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Follow i.MX, Sunxi, RISC-V and Rockchip to generate u-boot.itb which
includes U-Boot proper, ATF and DTBs in FIT format. ZynqMP supports FIT for
quite a long time but with using out of tree solution. The patch is filling
this gap.
Tested on zcu102, zcu104 and zcu100/Ultra96.
zcu100/Ultra96 v2.2 ATF build by:
make DEBUG=0 ZYNQMP_CONSOLE=cadence1 RESET_TO_BL31=1 PLAT=zynqmp bl31
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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All drivers should be converted to DM already that's why these hardcoded
base addresses are not needed anymore.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Remove hardcoded base addresses of smc controller and nand controller.
Get those addresses from dt and replace wherever they are used.
Remove smc and nand base address from header file too.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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handoff_setup() was used to generate fixed handoff structure for ATF on
ZynqMP platform.
Switching to bl2_plat_get_bl31_params() platform brings more flexibility
because information can be taken from fit image where /fit-images node is
created at run time.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Empty implementation should not return 0 (success) because that mean that
passed name matches the board configuration.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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In past SPL_ZYNQMP_TWO_SDHCI symbol was introduced to handle boards with
two sdhci controllers. The problem was that U-Boot is registering
controllers based on aliases in DT but bootmode targets specific controller
ID. That's why on boards with one "second" sdhci controller bootmode was
pointing to second controller(MMC2) but alias was setup to mmc0 (the first
controller). And SPL requires to point to mmc0 in this case.
Long time ago commit f101e4bd3703
("spl: add support for alternative boot device") added support for handling
multiple bootmodes in SPL. Use this functionality and setup second sdhci
controller as backup boot device.
Below is table with behavior:
HW/bootmode bootorder
sd0/sd0 mmc0/mmc1 (mmc1 never called)
sd1/sd1 mmc1/mmc0 (mmc0 fails and mmc1 is called)
sd0+sd1/sd0 mmc0/mmc1 (mmc1 never called)
sd0+sd1/sd1 mmc1/mmc0 (mmc0 never called)
All other bootmodes are not affected but order can be extended to cover
advance boot flows.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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There shouldn't be a need to use any partition description because it
can be used for writing data anywhere.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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MIO34 is connected to POWER_KILL signal. When MIO configuration is done in
psu_init() and this pin is assigned to PMU but PMU configuration is not
loaded yet. PMU gpio output is high that means board is powered off
immediately.
The patch is fixing this sequence that MIO34 stays assing to ps gpio IP.
PMU config is loaded in SPL and then pin assigned to PMU through
psu_post_config_data().
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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When position-independent pre-relocation code is enable there is also
necessary to enable relative early stack pointer not to use origin location
pointed by CONFIG_SYS_INIT_SP_ADDR macro.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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There is no reason to clear bss and call board_init_r() from board_init_f()
beca it can be called directly from crt0_64.S with also support for SPL
stack relocation to SDRAM.
For more information please take a look at arch/arm/lib/crt0_64.S
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Remove hardcoded base address of nand and replace it with the
value taken from device tree. Remove base address from header
file too.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Current U-Boot has only support for psci reset.
Adding support for arm psci reset2 allows passing of reset level
and other platform sepcific parameters like strap settings
to lowlevel psci implementation.
Signed-off-by: Rajesh Ravi <rajesh.ravi@broadcom.com>
Signed-off-by: Vladimir Olovyannikov <vladimir.olovyannikov@broadcom.com>
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Programs the following:
1. Redistributor PROCBASER configuration table (which
is common for all redistributors)
2. Redistributor pending table (PENDBASER), for all the
available redistributors.
Signed-off-by: Bharat Kumar Reddy Gooty <bharat.gooty@broadcom.com>
Signed-off-by: Vladimir Olovyannikov <vladimir.olovyannikov@broadcom.com>
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https://gitlab.denx.de/u-boot/custodians/u-boot-uniphier
UniPhier SoC updates for v2020.04
- add pinmux nodes for I2C ch5, ch6
- enable SPI driver and command
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https://gitlab.denx.de/u-boot/custodians/u-boot-imx
---------------------------------------------------------------------
Add i.MX8MP SoC and EVK board
Update README for i.MX8MN EVK and fix mmc env
Add pca9450 driver
--------------------------------------------------------------------
Travis: https://travis-ci.org/sbabic/u-boot-imx/builds/634211885
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https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic
- Khadas VIM3L based on Amlogic S905D3 support
- Various fixups for amlogic boards
- Unnecessary header includes drop into video/meson
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The next generation SoC can connect on-board slave devices via
I2C ch5 and ch6.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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Add basic i.MX8MP EVK board support
U-Boot SPL 2020.01-rc4-00388-gb1bf40c0ae-dirty (Dec 30 2019 - 17:55:33 +0800)
power_pca9450b_init
DDRINFO: start DRAM init
DDRINFO:ddrphy calibration done
DDRINFO: ddrmix config done
Normal Boot
Failed to find clock node. Check device tree
WDT: Not found!
Trying to boot from BOOTROM
image offset 0x8000, pagesize 0x200, ivt offset 0x0
U-Boot 2020.01-rc4-00388-gb1bf40c0ae-dirty (Dec 30 2019 - 17:55:33 +0800)
CPU: Freescale i.MX8MP rev1.0 at 1000 MHz
Reset cause: POR
Model: NXP i.MX8MPlus EVK board
DRAM: 6 GiB
MMC: FSL_SDHC: 1, FSL_SDHC: 2
Loading Environment from MMC... OK
In: serial
Out: serial
Err: serial
Net: No ethernet found.
Hit any key to stop autoboot: 0
u-boot=> mmc list
FSL_SDHC: 1 (SD)
FSL_SDHC: 2
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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Add imximage-8mp-lpddr4.cfg for imximage usage, almost same
as i.MX8MN ddr4 cfg, but with different ddr firmware
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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The drivers/clk/imx/*.c are used for CLK dm case, the
clock_imx8mm.c is used for non CLK dm case, let's split
it. Sometimes it is hard to enable CLK dm in SPL stage,
considering code size, malloc size requirement, the splittion
will make it easy to use non CLK dm in SPL stage.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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i.MX8MP ROM support ROMAPI as i.MX8MN, so make
SPL_IMX_ROMAPI_LOADADDR visible to i.MX8MP
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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i.MX8MP does not have LVTTL, it has a PE property
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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Add pin header file for i.MX8MP
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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The i.MX8M Plus Media Applications Processor is part of the growing
mScale family targeting the consumer and industrial market. It brings
an effective Machine Learning and AI accelerator that enables a new
class of applications. It is built in Samsung 14LPP to achieve both
high performance and low power consumption and relies on a powerful
fully coherent core complex based on a quad core ARM Cortex-A53 cluster
and Cortex-M7 low-power coprocessor, audio digital signal processor,
machine learning and graphics accelerators.
Add the basic dtsi support for i.MX8MP.
Patch from Anson Huang for Kernel
https://patchwork.kernel.org/patch/11310915/
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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4000MTS DDR needs 1GHz fracpll, so add the entry
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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