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2019-11-07arm: dts: k3-am654-r5-base-board: enable wkup_vtm0 node and link in suppliesTero Kristo
Link the vdd-supplies for the voltage domains under the VTM node. Also, enable the node under SPL. This will enable the AVS class 0 support on am65x-evm board. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Keerthy <j-keerthy@ti.com>
2019-11-07arm: dts: k3-am654-r5-base-board: add supply rail for MPUTero Kristo
MPU voltage on AM65x-evm is controlled via the TPS62363 chip attached to i2c0 bus. Add device node for this so that it can be controlled via a regulator driver. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Keerthy <j-keerthy@ti.com>
2019-11-07arm: dts: k3-am654-r5-base-board: enable wkup_i2c0 driver for splTero Kristo
Enable wkup_i2c0 as this is needed for voltage control. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Keerthy <j-keerthy@ti.com>
2019-11-07arm: dts: k3-am654-r5-base-board: Add VTM nodeKeerthy
Add VTM node for voltage and thermal management. For u-boot, this is needed for supporting AVS class 0, as the efuse values for the OPPs are stored under the VTM. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Keerthy <j-keerthy@ti.com>
2019-11-07arm: mach-k3: j721e_init: Initialize avs class 0Keerthy
Initialize avs class 0 Signed-off-by: Keerthy <j-keerthy@ti.com>
2019-11-07arm: mach-k3: am6_init: Initialize AVS class 0Keerthy
Initialize AVS class 0 so that mpu voltage rail is programmed to the AVS class 0 compensated value. Signed-off-by: Keerthy <j-keerthy@ti.com>
2019-11-04Merge tag 'u-boot-imx-20191104' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-imx u-boot-imx-20191104 ------------------- - i.MX NAND: nandbcb support for MX6UL / i.MX7 - i.MX8: support for HAB - Convert to DM (opos6ul, mccmon6) - Toradex i.MX6ull colibri - sync DTS with kernel Travis : https://travis-ci.org/sbabic/u-boot-imx/builds/606853416
2019-11-03imx: nandbcb: add support for writing BCB onlyIgor Opaniuk
Add subcommand for add writing BCB only, where we provide appropriate offsets for firmware1 and firmware2 and size. Example of usage: > nandbcb bcbonly 0x00180000 0x00080000 0x00200000 Writing 1024 bytes to 0x0: randomizing OK Writing 1024 bytes to 0x20000: randomizing OK Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Tested-by: Max Krummenacher <max.krummenacher@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2019-11-03imx: nandbcb: refactor update functionIgor Opaniuk
Move code for writing FCB/DBBT pages to a separate function Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Tested-by: Max Krummenacher <max.krummenacher@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2019-11-03imx: nandbcb: add support for i.MX7Igor Opaniuk
Add support for updating FCB/DBBT on i.MX7: - additional new fields in FCB structure - Leverage hardware BCH/randomizer for writing FCB Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Tested-by: Max Krummenacher <max.krummenacher@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2019-11-03imx: gpmi: add defines for hw randominizerIgor Opaniuk
Extend GPMI Integrated ECC Control Register Description, include additional defines for enabling randomizer function and providing proper randomizer type. For additional details check i.MX7 APR, section 9.6.6.3 GPMI Integrated ECC Control Register Description (GPMI_ECCCTRLn) Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Tested-by: Max Krummenacher <max.krummenacher@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2019-11-03imx: support i.MX8QM ROM 7720 a1 boardOliver Graute
Add i.MX8QM ROM 7720a1 board support Boot log as below: U-Boot 2019.10-rc3-00004-gd073e0242f (Sep 20 2019 - 08:24:13 +0200) CPU: NXP i.MX8QM RevB A53 at 1200 MHz Model: Advantech iMX8QM Qseven series Board: ROM-7720-A1 4GB Build: SCFW 65afe5f6 Boot: SD2 DRAM: 4 GiB MMC: FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2 Loading Environment from MMC... OK In: serial@5a060000 Out: serial@5a060000 Err: serial@5a060000 Net: eth0: ethernet@5b040000Could not get PHY for FEC1: addr 1 , eth-1: ethernet@5b050000 Hit any key to stop autoboot: 0 Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Simon Glass <sjg@chromium.org> Cc: Ye Li <ye.li@nxp.com> Cc: uboot-imx <uboot-imx@nxp.com>
2019-11-03arm: dts: imx8mm: sync dts from Linux KernelPeng Fan
Sync dts for i.MX8MM from Linux Kernel 5.4.0-rc1 Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-03board/BuR/brppt2: initial commitHannes Schmelzer
This commit adds support for the brppt2 board. The board is based on the i.mx6 dual-lite SoC. Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
2019-11-03imx8: output SECO-FW and ATF commit IDsAnatolij Gustschin
Borrow ID reading code from Ye Li (NXP U-Boot, commit ID 5b443e3e2617) but drop imx-mkimage commit ID reading since we now use in tree mkimage. Signed-off-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-11-03mach-imx: Adding new argument for SIP call interfaceYe Li
Need to pass total 5 arguments for SIP HAB call on i.MX8MQ, so update the interface to add new argument. Signed-off-by: Ye Li <ye.li@nxp.com> [agust: fixed imx8m-power-domain build] Signed-off-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Patrick Wildt <patrick@blueri.se> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-11-03imx8: Add AHAB secure boot supportPeng Fan
Add function and new command "auth_cntr" for secure boot support. When booting with life cycle set to OEM closed, we need to use this function to authenticate the OS container and load kernel & FDT from OS container to their destination. Also add image authentication call when loading container images. Users can set CONFIG_AHAB_BOOT=y to enable the feature. It is not set at default. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-03imx8mm: evk: enable bd71837 pmicPeng Fan
Enable bd71837 pmic for i.MX8MM EVK board, need to set voltage for DRAM and linux suspend voltage requirement. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-03imx: spl: implement spl_boot_mode for i.MX7/8/8MPeng Fan
It will be easy to separate SD/EMMC when booting in SPL stage, then no need to bother which device is BOOT_DEVICE_MMC1/2. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-03imx: imx8mq: add init_nand_clkPeng Fan
Add init_nand_clk to enable gpmi nand clock. Since i.MX8MQ not use CCF, so we still use legacy mode to configure the clock. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-03imx8m: clock: improve irq response latencyPeng Fan
Improve the IRQ response latency by setting GIC root clock source to sys_pll2_200m from osc. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-03imx8m: imx8mq: get chip rev for B1 revisionPeng Fan
The i.MX8MQ B1 uses OCOTP_HW_OCOTP_READ_FUSE_DATA register for chip id. It returns a magic number 0xff0055aa. update get_cpu_rev to support it, and enable ocotp clock to access ocotp. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-03opos6uldev: migrate to DM_VIDEOSébastien Szymanski
Migrate to DM_VIDEO, update the device tree and remove code that is no longer necessary. Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
2019-11-03imx6ul: opos6ul: migrate to DM_ETHSébastien Szymanski
Migrate to DM_ETH and remove code that is no longer necessary. Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
2019-11-03imx: update i.MX8MQ device treesPatrick Wildt
This updates the i.MX8MQ device trees and, necessarily, also the i.MX8MQ clock bindings. These are taken verbatim from from the Linux kernel version v5.4-rc2, which three small changes which were already part of the previous device tree: * Keep the PSCI reserved memory range * Keep the alias for ethernet, so that the MAC address can be set * Keep the modified #include for the IOMUXC pins Signed-off-by: Patrick Wildt <patrick@blueri.se> Acked-by: Peng Fan <peng.fan@nxp.com>
2019-11-03ARM: imx: Convert mccmon6 to use DM/DTS in the u-boot properLukasz Majewski
This commit converts mccmon6's u-boot proper (in a single commit to avoid build breaks) to use solely DM/DTS. The DTS description of the mccmon6 has been ported from Linux kernel (v4.20, SHA1: 8fe28cb58bcb235034b64cbbb7550a8a43fd88be) Signed-off-by: Lukasz Majewski <lukma@denx.de>
2019-11-03imx: Enable RTC (ds1307) support in the U-Boot proper on TPC70 boardLukasz Majewski
The TPC70 is equipped with DS1307 RTC device. Add code to enable support for it. Signed-off-by: Lukasz Majewski <lukma@denx.de>
2019-11-03ARM: dts: imx6ull-colibri: pre-reloc for uart pinmux modesIgor Opaniuk
Add u-boot,dm-pre-reloc properties for uart pinmux configuration nodes, which enables UART as early as possible (before relocation). Without this we miss almost the half of output (U-boot version, CPU defails, Reset cause, DRAM details etc.). Fixes: cd69e8ef9b ("colibri-imx6ull: migrate pinctrl and regulators to dtb/dm") Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2019-11-03ARM: dts: imx6ull-colibri: change hierarchy of DTS filesIgor Opaniuk
Introduce imx6ull-colibri-u-boot.dtsi for u-boot specific properties to keep original imx6ull-colibri.dts in sync with Linux. Move all contents of imx6ull-colibri.dts to imx6ull-colibri.dtsi + additionally fix checkpatch warnings. Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2019-11-03arm: mxs: Increase VDDD voltage to match specificationMarek Vasut
According to IMX28CEC rev. 4, 10/2018, Table 15. Recommended Operating Conditions, page 16, the VDDD should be set to 1.55V when the CPU is operating at 454MHz. This is the case in U-Boot, hence increase the VDDD voltage. This fixes instability when performing TFTP transfers. Increase the brownout threshold to 1.4V. The documentation recommends 1.45V setting for the brownout, however, this triggers failure during power block init, so keep the brownout slightly lower. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2019-11-03ARM: imx: Use IMX6_SRC_GPR10_BMODE instead of magic numberClaudius Heine
Signed-off-by: Claudius Heine <ch@denx.de>
2019-11-03ARM: imx: Fix bmode detection from grp10Claudius Heine
imx6_is_bmode_from_gpr9 always returns false, because IMX6_SRC_GPR10_BMODE is 1<<28 and gets casted to u8 on return. This moves the function body into imx6_src_get_boot_mode, since that is the only one using it and it is on the same abstraction level (accessing registers directly). Signed-off-by: Claudius Heine <ch@denx.de>
2019-11-03arm: dts: Add devicetree support for iMXQXP AI_ML boardManivannan Sadhasivam
Add devicetree support for iMXQXP AI_ML board from Einfochips. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
2019-11-03i.MX6: nand: extend nandbcb command for imx6UL(L)Parthiban Nallathambi
Firmware Configuration Block(FCB) for imx6ul(l) needs to be BCH encoded. Signed-off-by: Parthiban Nallathambi <pn@denx.de> Acked-by: Shyam Saini <shyam.saini@amarulasolutions.com> Acked-by: Peng Fan <peng.fan@nxp.com>
2019-11-03arm: dts: am335x: sync cpsw/mdio/phy with latest linux - drop phy_idGrygorii Strashko
Synchronize CPSW/MDIO/PHY DT nodes with latest linux - replace deprecated phy_id property with phy-handle. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Cc: Lokesh Vutla <lokeshvutla@ti.com> Cc: Hannes Schmelzer <hannes.schmelzer@br-automation.com> Cc: Heiko Schocher <hs@denx.de> Cc: Felix Brack <fb@ltec.ch> Cc: Jean-Jacques Hiblot <jjhiblot@ti.com>
2019-11-03arm: dts: am437x: sync cpsw/mdio/phy with latest linux - drop phy_idGrygorii Strashko
Synchronize CPSW/MDIO/PHY DT nodes with latest linux - replace deprecated phy_id property with phy-handle. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Cc: Lokesh Vutla <lokeshvutla@ti.com>
2019-11-03arm: dts: dra7: sync cpsw/mdio/phy with latest linux - drop phy_idGrygorii Strashko
Synchronize CPSW/MDIO/PHY DT nodes with latest linux - replace deprecated phy_id property with phy-handle. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Cc: Lokesh Vutla <lokeshvutla@ti.com>
2019-11-03mx6: clock: Introduce disable_ipu_clock()Fabio Estevam
Introduce disable_ipu_clock(). This is done in preparation for configuring the NoC registers on i.MX6QP in SPL. Afer the NoC registers are set the IPU clocks can be disabled. Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-11-03mx6: clock: Use setbits_le32()Fabio Estevam
The code can be made simpler by using setbits_le32(), so switch to it. Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-10-31lib: time: Add microsecond timerMarek Vasut
Add get_timer_us(), which is useful e.g. when we need higher precision timestamps. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Tom Rini <trini@konsulko.com> Cc: Simon Glass <sjg@chromium.org> [trini: Fixup arch/arm/mach-bcm283x/include/mach/timer.h] Signed-off-by: Tom Rini <trini@konsulko.com>
2019-10-30Merge branch '2019-10-28-azure-ci-support'Tom Rini
- Clean up Travis-CI slightly and then add support for Microsoft Azure pipelines, all from Bin Meng.
2019-10-30Merge https://gitlab.denx.de/u-boot/custodians/u-boot-sunxiTom Rini
- H6 dts(i) sync (Clément) - H6 PIO (Icenowy) - Fix pll1 clock calculation (Stefan) - H6 dram, half DQ (Jernej) - A64 OLinuXino eMMC (Sunil)
2019-10-29arm: mvebu: Avoid generating kwbimage.cfg in the source treeBin Meng
At present some boards generate kwbimage.cfg in the source tree during the build. This breaks buildman testing on some systems where the source tree is read-only. Update makefile rules to generate it in the build tree instead. Note some other boards have the kwbimage.cfg file written in advance, hence we need check if the file exists in the build tree first, otherwise we fall back to one in the source tree. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2019-10-25Merge branch '2019-10-24-ti-imports'Tom Rini
- Enable DFU on dra7xx boards - Further Keystone 3 platform improvements
2019-10-25arm: dts: k3-am65: Add R5F ranges in interconnect nodesSuman Anna
Add the address spaces for the R5F cores in MCU domain to the ranges property of the cbass_mcu interconnect node so that the addresses within the R5F nodes can be translated properly by the relevant OF address API. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-10-25armv7R: K3: j721e: Add support for triggering ddr init from SPLLokesh Vutla
In SPL, DDR should be made available by the end of board_init_f() so that apis in board_init_r() can use ddr. Adding support for triggering DDR initialization from board_init_f(). Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-10-25arm: dts: k3-j721e: Add ddr nodeLokesh Vutla
Use the 3733MTs DDR configuration that is auto generated from DDR_Regconfig tool. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Kevin Scholz <k-scholz@ti.com>
2019-10-25ram: k3-am654: Do not rely on default values for certain DDR registerJames Doublesin
Added the following registers to the DDR configuration: - ACIOCR0, - ACIOCR3, - V2H_CTL_REG, - DX8SLxDQSCTL. Modified enable_dqs_pd and disable_dqs_pd to only touch the associated bit fields for pullup and pulldown registers (to preserve slew rate and other bits in that same register). Also update the dts files in the same patch to maintain git bisectability. Signed-off-by: James Doublesin <doublesin@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-10-25armv7r: dts: am654-base-board: Rename 1600MHz to 1600MTs in dtsi filenameJames Doublesin
The current configuration of DDR on AM654 base board is for 1600MTs but the file name is specified as k3-am654-base-board-ddr4-1600MHz.dtsi. Since 1600MHz is misleading, rename it to k3-am654-base-board-ddr4-1600MTs.dtsi Signed-off-by: James Doublesin <doublesin@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-10-25arm: K3: Clean and invalidate Linux Image before jumping to LinuxLokesh Vutla
U-Boot cleans and invalidate L1 and L2 caches before jumping to Linux by set/way in cleanup_before_linux(). Additionally there is a custom hook provided to clean and invalidate L3 cache. Unfortunately on K3 devices(having a coherent architecture), there is no easy way to quickly clean all the cache lines for L3. The entire address range needs to be cleaned and invalidated by Virtual Address. This can be implemented using the L3 custom hook but it take lot of time to clean the entire address range. In the interest of boot time this might not be a viable solution. The best hit is to make sure the loaded Linux image is flushed so that the entire image is written to DDR from L3. When Linux starts running with caches disabled the full image is available from DDR. Reported-by: Andrew F. Davis <afd@ti.com> Reported-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
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