summaryrefslogtreecommitdiff
path: root/arch/arm
AgeCommit message (Collapse)Author
2019-12-03mtd: rename CONFIG_NAND -> CONFIG_MTD_RAW_NANDMiquel Raynal
Add more clarity by changing the Kconfig entry name. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> [trini: Re-run migration, update a few more cases] Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
2019-12-03ARM: MediaTek: add basic support for MT8518 boardsmingming lee
This adds a general board file based on MT8518 SoCs from MediaTek. Apart from the generic parts (cpu) we add some low level init codes and initialize the early clocks. This commit is adding the basic boot support for the MT8518 eMMC board. Signed-off-by: mingming lee <mingming.lee@mediatek.com> [trini: Migrate env location to defconfig, set ENV_IS_IN_MMC] Signeed-off-by: Tom Rini <trini@konsulko.com>
2019-12-03pinctrl: add driver for MT8518mingming lee
Add Pinctrl driver for MediaTek MT8518 SoC. Signed-off-by: mingming lee <mingming.lee@mediatek.com>
2019-12-03ARM: MediaTek: Add support for MediaTek MT8518 SoCmingming lee
Add support for MediaTek MT8518 SoC. This include the file that will initialize the SoC after boot and its device tree. Signed-off-by: mingming lee <mingming.lee@mediatek.com>
2019-12-03board: omapl138_lcdk: add the mmc device to SPLBartosz Golaszewski
We don't have full device-tree support in SPL yet - add an appropriate U_BOOT_DEVICE() to the board file. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
2019-12-03mmc: davinci: drop support for ti,dm6441-mmcBartosz Golaszewski
The DM family of DaVinci SoCs is no longer supported. Drop the irrelevant code from the driver. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
2019-12-03armv7m: cache: add invalidate_icache_all() stubGiulio Benetti
This commit: https://gitlab.denx.de/u-boot/u-boot/commit/d409c962169bd293e39386d0ddfa64d5222a3be4 causes build failure with ICACHE enabled. This is due to missing invalidate_icache_all() stub. Let's add empty invalidate_icache_all() in the case where ICACHE is not enabled. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2019-12-03cosmetic: Fix spelling and whitespace errorsThomas Hebb
Signed-off-by: Thomas Hebb <tommyhebb@gmail.com>
2019-12-02common: Move some board functions out of common.hSimon Glass
A number of board function belong in init.h with the others. Move them. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02common: Move board_get_usable_ram_top() out of common.hSimon Glass
Move this function into init.h which seems to be designed for this sort of thing. Also update the header to declare struct global_data so that it can be included without global_data.h being needed. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02common: Move command functions out of common.hSimon Glass
Move these functions into the command.h header file which is a better fit. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02common: Move enable/disable_interrupts out of common.hSimon Glass
Move these two functions into the irq_funcs.h header file. Also move interrupt_handler_t as this is used by the irq_install_handler() function. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02common: Move interrupt functions into a new headerSimon Glass
These functions do not use driver model but are fairly widely used in U-Boot. But it is not clear that they will use driver model anytime soon, so we don't want to label them as 'legacy'. Move them to a new irq_func.h header file. Avoid the name 'irq.h' since it is widely used in U-Boot already. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02arm: powerpc: Tidy up code style for interrupt functionsSimon Glass
Remove the unwanted space before the bracket. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02common: Move ARM cache operations out of common.hSimon Glass
These functions are CPU-related and do not use driver model. Move them to cpu_func.h Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02common: Move some cache and MMU functions out of common.hSimon Glass
These functions belong in cpu_func.h. Another option would be cache.h but that code uses driver model and we have not moved these cache functions to use driver model. Since they are CPU-related it seems reasonable to put them here. Move them over. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02arm: powerpc: Tidy up code style for cache functionsSimon Glass
Remove the unwanted space before the bracket. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02common: Move some SMP functions out of common.hSimon Glass
These functions belong in cpu_func.h so move them over. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02common: Move some CPU functions out of common.hSimon Glass
These functions belong in cpu_func.h since they do not use driver model. Move them over. Don't bother adding comments since these functions should be deleted. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02common: Move mii_init() function out of common.hSimon Glass
This function belongs in mii.h so move it over. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02common: Move get_ticks() function out of common.hSimon Glass
This function belongs in time.h so move it over and add a comment. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02arm: pxa: Drop pxa_wait_ticks()Simon Glass
This function has a similar name to the common wait_ticks(). It is only used in one place and seems small enough to drop. Inline it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02common: Move some time functions out of common.hSimon Glass
These functions belong in time.h so move them over and add comments. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02common: Move serial functions out of common.hSimon Glass
These functions belong in serial.h so move them over. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02Move strtomhz() to vsprintf.hSimon Glass
At present this function sits in its own file but it does not really justify it. There are similar string functions in vsprintf.h, so move it there. Also add the missing function comment. Use the vsprintf.h include file explicitly where needed. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02crc32: Use the crc.h header for crc functionsSimon Glass
Drop inclusion of crc.h in common.h and use the correct header directly instead. With this we can drop the conflicting definition in fw_env.h and rely on the crc.h header, which is already included. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02common: Move older CPU functions to their own headerSimon Glass
These should be moved to driver model, but in the meantime, move them out of the common header to help reduce its size. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-11-28Merge git://git.denx.de/u-boot-socfpgaTom Rini
- Assorted Gen5 fixes
2019-11-28Merge tag 'mmc-11-27-2019' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-mmc - fsl_esdhc update and some cleanup in ls1021a/mpc83xx code - mmc tmio sdhi update for hs400
2019-11-27arm: drop eSDHC clock getting in mxc_get_clock() for layerscapeYangbo Lu
Although layerscape platforms reuse mxc_get_clock() of i.MX platforms, eSDHC clock getting do not have to use it. It uses global data gd->arch.sdhc_clk directly in fsl_esdhc driver. Even there are more than one eSDHC controllers on SoC, they use same reference clock. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-11-26ARM: dts: stm32: update eMMC configuration for stm32mp157c-ev1Patrick Delaunay
Update the sdmmc2 node for eMMC support on eval board stm32mp157c-ev1. - update slew-rate for pin configuration - update "vqmmc-supply" - remove "st,sig-dir" - add mandatory "pinctrl-names" - add "mmc-ddr-3_3v" This patch solve the eMMC detection issue for command "mmc dev 1". Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-11-26ARM: dts: stm32: DT alignment with kernel v5.4-rc4Patrick Delaunay
Device tree and binding alignment with kernel v5.4-rc4 Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2019-11-26ARM: dts: stm32: DT alignment with kernel v5.3Patrick Delaunay
Device tree and binding alignment with kernel v5.3 and converted to SPDX. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2019-11-25Merge tag 'rpi-next-2020.01' of https://github.com/mbgg/u-bootTom Rini
- add RPi4 upstream compatible to pinctrl - fix boot banner on RPi3/4 - add support for one binary on RPi3/4
2019-11-25ARM: socfpga: Unreset NAND in SPL on Gen5Marek Vasut
In case the SPL on Gen5 loads U-Boot from NAND, unreset the NAND IP explicitly in the platform code as the denali-spl driver is not aware of DM at all. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dalon Westergreen <dwesterg@gmail.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Ley Foon Tan <ley.foon.tan@intel.com> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Tien Fong Chee <tien.fong.chee@intel.com> Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
2019-11-25ARM: socfpga: Add ArriaV ST/SX IDMarek Vasut
Add new FPGA ID for ArriaV ST/D3 or SX/B3 . Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dalon Westergreen <dwesterg@gmail.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Ley Foon Tan <ley.foon.tan@intel.com> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Tien Fong Chee <tien.fong.chee@intel.com> Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
2019-11-25ARM: socfpga: Purge pending transactions upon enabling bridges on Gen5Marek Vasut
On Gen5, when the FPGA is loaded and there was some prior interaction between the HPS and the FPGA via bridges (e.g. Linux was running and using some of the IPs in the FPGA) followed by warm reset, it has been observed that there might be outstanding unfinished transactions. This leads to an obscure misbehavior of the bridge. When the bridge is enabled again in U-Boot and there are outstanding transactions, a read from within the bridge address range would return a result of the previous read instead. Example: => bridge enable ; md 0xff200000 1 ff200000: 1234abcd => bridge enable ; md 0xff200010 1 ff200010: 5678dcba <------- this is in fact a value which is stored in a memory at 0xff200000 => bridge enable ; md 0xff200000 1 ff200000: 90effe09 <------- this is in fact a value which is stored in a memory at 0xff200010 and so it continues. Issuing a write does lock the system up completely. This patch opens the FPGA bridges in 'bridge enable' command, the tears them down again, and then opens them again. This allows these outstanding transactions to complete and makes this misbehavior go away. However, it is not entirely clear whether this is the correct solution. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dalon Westergreen <dwesterg@gmail.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Ley Foon Tan <ley.foon.tan@intel.com> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Tien Fong Chee <tien.fong.chee@intel.com> Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
2019-11-25ARM: socfpga: Actually put bridges into reset on Gen5 in bridge disableMarek Vasut
On Gen5, the 'bridge disable' command write 0x0 to brgmodrst register, which releases all bridges from reset, instead of putting all bridges into reset. Fix this by inverting the mask and actually putting the bridges into reset. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dalon Westergreen <dwesterg@gmail.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Ley Foon Tan <ley.foon.tan@intel.com> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Tien Fong Chee <tien.fong.chee@intel.com> Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-11-24ARM: defconfig: add unified config for RPi3 and RPi4Matthias Brugger
Provide a defconfig which allows us to boot Raspberrry Pi 4 and Raspberry Pi 3 Model B/B+ Instead of using the embedded DTB as done in RPi3 we use the devicetree provided by the firmware. Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2019-11-24ARM: bcm283x: Set memory map at run-timeMatthias Brugger
For bcm283x based on arm64 we also have to change the mm_region. Add assign this in mach_cpu_init() so we can create now one binary for RPi3 and RPi4. Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2019-11-24ARM: bcm283x: Set rpi_bcm283x_base at run-timeMatthias Brugger
As part of the effort to create one binary for several bcm83x SoCs we read the IO base address from device-tree. Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2019-11-24ARM: bcm283x: Move BCM283x_BASE to a global variableMatthias Brugger
We move the per SOC define BCM283x_BASE to a global variable. This is a first step to provide a single binary for several bcm283x SoCs. Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2019-11-24arm: dts: bcm283x: Rename U-Boot fileMatthias Brugger
Rename the file bcm283x-uboot.dtsi so that it get automatically include through the scripts/Makefile.lib using $(CONFIG_SYS_SOC))-u-boot.dtsi Without this uarts and pincontroller miss the property dm-pre-reloc and the first call to bcm283x_mu_serial_ofdata_to_platdata() fails as the pins are not set correctly. As a result the U-Boot banner isn't shown on boot. Before commmit 143256b353 ("fdt: update bcm283x device tree sources to Linux 5.1-rc6 state") we included bcm283x-uboot.dtsi directly in the device-tree file. Which got deleted by the metioned commit. This is a much robuster solution. Reported-by: Tom Rini <trini@konsulko.com> Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Tested-by: Tom Rini <trini@konsulko.com> [RPi 3, 32b and 64b modes] Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2019-11-24fdt: fix bcm283x dm-pre-reloc definitionsMatthias Brugger
In commmit 143256b353 ("fdt: update bcm283x device tree sources to Linux 5.1-rc6 state") we deleted the label for the node soc from bcm283x.dtsi As we don't need to add the property dm-pre-reloc to the soc node, we can delete it from bcm283x-uboot.dtsi Tested-by: Tom Rini <trini@konsulko.com> [RPi 3, 32b and 64b modes] Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2019-11-23Merge tag 'u-boot-rockchip-20191124' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip - Clean vid/pid in Kconfig and add fastboot for rk3399 - add 'u-boot, spl-fifo-mode' for mmc - Use FIT generator for rk3229 optee and rk3368 ATF - fan53555: add support for Silergy SYR82X and SYR83X
2019-11-23arm: fix -march for ARM11Heinrich Schuchardt
In GCC 9 support for the Armv5 and Armv5E architectures (which have no known implementations) has been removed, cf. https://gcc.gnu.org/gcc-9/changes.html ARM11 is an armv6 implementation. So change the architecture flag for the compiler to armv6 for ARM11. Suggested-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2019-11-23rockchip: px30: enable spl-fifo-mode for both emmc and sdmmc on evbHeiko Stuebner
As part of loading trustedfirmware, the SPL is required to place portions of code into the socs sram but the mmc controllers can only do dma transfers into the regular memory, not sram. The results of this are not directly visible in u-boot itself, but manifest as security-relate cpu aborts during boot of for example Linux. There were a number of attempts to solve this elegantly but so far discussion is still ongoing, so to make the board at least boot correctly put both mmc controllers into fifo-mode, which also circumvents the issue for now. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-11-23rockchip: Setup dwc3_device (for non-dm gadgets)Jagan Teki
Setup dwc3_device structure for non-dm gadgets, which is used in rk3399 platforms. dwc3_device would have basic regbase, dr_mode, high speed and 16-bit UTMI+ etc. Cc: Marek Vasut <marex@denx.de> Tested-by: Levin Du <djw@t-chip.com.cn> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> (Fix to use CONFIG_USB_DWC3_GADGET instead of CONFIG_USB_DWC3) Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-23rockchip: Convert to use FIT generator for opteeKever Yang
Use generator script so that we can use environment for TEE source. $TEE for tee.bin, and if file not exist, the script can report a warning, and meke the build success without a error. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-22Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini
- Assorted fixes