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2020-04-13Merge branch 'next'Tom Rini
Pull in changes that have been pending in our 'next' branch. This includes: - A large number of CI improvements including moving to gcc-9.2 for all platforms. - amlogic, xilinx, stm32, TI SoC updates - USB and i2c subsystem updtaes - Re-sync Kbuild/etc logic with v4.19 of the Linux kernel. - RSA key handling improvements
2020-04-09imx: Fix imx8m FIT script issueYe Li
The FIT config node has reversed ATF and u-boot: ATF is set to 'firmware' but u-boot is set to 'loadables'. This script can work previously because spl fit driver wrongly appends fdt to all loadable images. With the issue fixed in commit 9d15d1d1c24f ("Revert "common: spl_fit: Default to IH_OS_U_BOOT if FIT_IMAGE_TINY enabled"") the u-boot in 'loadables' does not have fdt appended and fails to work. So correct the script by moving u-boot to 'firmware' and ATF to 'loadables'. Signed-off-by: Ye Li <ye.li@nxp.com> Reported-by: Matt Porter <mporter@konsulko.com> Tested-by: Matt Porter <mporter@konsulko.com>
2020-04-08Merge tag 'u-boot-amlogic-20200406' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic into next - clk: meson-g12a: missing break - sync all Amlogic DT from Linux v5.6-rc2 - MMC clock fixups - add support for Libre Computer AML-S905D-PC and AML-S912-PC
2020-04-07Merge tag 'xilinx-for-v2020.07' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze into next Xilinx changes for v2020.07 common: - Align ENV_FAT_INTERFACE - Fix MAC address source print log - Improve based autodetection code xilinx: - Enable netconsole Microblaze: - Setup default ENV_OFFSET/ENV_SECT_SIZE Zynq: - Multiple DT updates/fixes - Use DEVICE_TREE environment variable for DTB selection - Switch to single zynq configuration - Enable NOR flash via DM - Minor SPL print removal - Enable i2c mux driver ZynqMP: - Print multiboot register - Enable cache commands in mini mtest - Multiple DT updates/fixes - Fix firmware probing when driver is not enabled - Specify 3rd backup RAM boot mode in SPL - Add SPL support for zcu102 v1.1 and zcu111 revA - Redesign debug uart enabling and psu_init delay - Enable full u-boot run from EL3 - Enable u-boot.itb generation without ATF with U-Boot in EL3 Versal: - Enable distro default - Enable others SPI flashes - Enable systems without DDR Drivers: - Gem: - Flush memory after freeing - Handle mdio bus separately - Watchdog: - Get rid of unused global data pointer - Enable window watchdog timer - Serial: - Change reinitialization logic in zynq serial driver Signed-off-by: Tom Rini <trini@konsulko.com>
2020-04-07ARM: dts: imx8qxp-colibri: dm-pre-proper for pd_dma nodesIgor Opaniuk
pd_dma_* nodes should be accessible during pre-relocation stage of U-Boot proper for properly handling power domains. This fixes the issue with permanent failing of invocation of power_domain_get_by_index() in the common code of DM power domain uclass (drivers/power/domain/power-domain-uclass.c). Fixes: f0cc4eae9a ("core: device: use dev_power_domain_on") Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-04-07ARM: dts: imx8qm-apalis: dm-pre-proper for pd_dma nodesIgor Opaniuk
pd_dma_* nodes should be accessible during pre-relocation stage of U-Boot proper for properly handling power domains. This fixes the issue with permanent failing of invocation of power_domain_get_by_index() in the common code of DM power domain uclass (drivers/power/domain/power-domain-uclass.c). Fixes: f0cc4eae9a ("core: device: use dev_power_domain_on") Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-04-07ARM: dts: imx8qxp-colibri: replace dm-spl with dm-pre-properIgor Opaniuk
For non-SPL/TPL setups dm-spl, dm-tpl, dm-pre-proper, dm-pre-reloc are handled equally, forcing the nodes with these properties to be accessible and device being probed before pre-relocation of U-Boot proper (drivers/core/util.c): bool ofnode_pre_reloc(ofnode node) { /* for SPL and TPL the remaining nodes after the fdtgrep 1st pass * had property dm-pre-reloc or u-boot,dm-spl/tpl. * They are removed in final dtb (fdtgrep 2nd pass) */ return true; if (ofnode_read_bool(node, "u-boot,dm-pre-reloc")) return true; if (ofnode_read_bool(node, "u-boot,dm-pre-proper")) return true; /* * In regular builds individual spl and tpl handling both * count as handled pre-relocation for later second init. */ if (ofnode_read_bool(node, "u-boot,dm-spl") || ofnode_read_bool(node, "u-boot,dm-tpl")) return true; return false; } Howewer, to avoid confusion in future, replace dm-spl `%s/dm-spl/dm-pre-proper/g` properties to dm-pre-proper to explicitly state that they are handled during pre-relocation stage of U-Boot proper. Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-04-07ARM: dts: imx8qm-apalis: replace dm-spl with dm-pre-properIgor Opaniuk
For non-SPL/TPL setups dm-spl, dm-tpl, dm-pre-proper, dm-pre-reloc are handled equally, forcing the nodes with these properties to be accessible and device being probed before pre-relocation of U-Boot proper (drivers/core/util.c): bool ofnode_pre_reloc(ofnode node) { /* for SPL and TPL the remaining nodes after the fdtgrep 1st pass * had property dm-pre-reloc or u-boot,dm-spl/tpl. * They are removed in final dtb (fdtgrep 2nd pass) */ return true; if (ofnode_read_bool(node, "u-boot,dm-pre-reloc")) return true; if (ofnode_read_bool(node, "u-boot,dm-pre-proper")) return true; /* * In regular builds individual spl and tpl handling both * count as handled pre-relocation for later second init. */ if (ofnode_read_bool(node, "u-boot,dm-spl") || ofnode_read_bool(node, "u-boot,dm-tpl")) return true; return false; } Howewer, to avoid confusion in future, replace dm-spl `%s/dm-spl/dm-pre-proper/g` properties to dm-pre-proper to explicitly state that they are handled during pre-relocation stage of U-Boot proper. Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-04-06arm64: versal: Disable DDR cache mapping if DDR is not enabledMichal Simek
Similar change was done in past by commit 3b644a3c2f69 ("arm64: zynqmp: Provide a config to not map DDR region in MMU table"). Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06arm64: zynqmp: Add support for u-boot.itb generation without ATFMichal Simek
If ATF doesn't exist generate u-boot.itb without it and let U-Boot run in EL3. Still keep warning to let user know that ATF/BL31 is missing. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06arm64: zynqmp: Move timeout for clock propagation below psu_initMichal Simek
Delay required for clock propagation is tighly coupled with initialization done in psu_init(). That's why call it also for u-boot proper with CONFIG_ZYNQMP_PSU_INIT_ENABLED enabled. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06arm64: zynqmp: Add support for debug uart also for U-Boot properMichal Simek
board_early_init_f() is the right location where debug uart can be configurated (after MIO initialization). The patch is taking this call from SPL to also make it available for U-Boot proper. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06arm64: zynqmp Add support for zcu102 rev1.1Michal Simek
rev1.1 has different DDR sodimm module that's why it requires different DDR configuration. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06arm64: zynqmp: Add third backup bootmodeMichal Simek
I found this issue when was running py/test.py on zcu102 which is for me by default setup to SD boot mode without any way to change boot mode. Alternative software bootmode selection to JTAG is not working because JTAG mode is 0 which also reset value for it. That's why saying SPL to take u-boot.itb from RAM instead of SD in SD boot mode is not possible via alternative bootmode selection. That's why setup third boot mode to JTAG(BOOT_DEVICE_RAM) as final fallback. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06ARM: zynq: Do not print message about boot deviceMichal Simek
This information is shown already that's why there is no reason to print it again via custom prints. U-Boot SPL 2020.01-03080-ga6214d033bd0 (Mar 05 2020 - 09:59:05 +0100) mmc boot Trying to boot from MMC1 or U-Boot SPL 2020.01-03080-ga6214d033bd0 (Mar 05 2020 - 10:49:46 +0100) qspi boot Trying to boot from SPI Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06ARM: zynq: Enable DM for CFI NOR flashMichal Simek
With multi defconfig NOR flash information about NOR should be taken from DT that's why there is no reason to specify address and sizes via fixed config. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06ARM: zynq: Do not include full zynq-7000.dtsi to cse-nor configurationMichal Simek
There is no real need to include full DT when only some nodes are enough to use. It will save some space. Retested with FSBL for initial SoC setup. SPL didn't work. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06Makefile: Add environment variable DEVICE_TREE to headerMichal Simek
Users have option to overwrite default device tree (CONFIG_DEFAULT_DEVICE_TREE) via environment variable DEVICE_TREE. Feature has been added long time ago by commit 74de8c9a1672 ("dts/Makefile: Build the user specified dts") for a little bit different reason. But this variable can be also used for different purpose like choosing proper configuration from FIT image in SPL. And this is the functionality I would like to use on Xilinx Zynq devices that current u-boot.img can be composed in the same way based on OF_LIST and different configuration is taken based on platform specific SPL. SPL requires low level ps7_init_gpl configuration that's why different boards require different SPL with fixed board_fit_config_name_match(). Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-06ARM: zynq: Change zc770 xm011 Nand x16 configurationsMichal Simek
Instead of symlink include origin file and just change model description. Difference is not in DT but in ps7_init configurations which is taken based on device tree name that's why the same DT can't be used. Also update model and update comments to match configurations. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06arm64: zynqmp: Move pinctrl node under firmware nodeMichal Simek
Pinctrl is handled via firmare interface that's why move it there without reg property and new compatible string. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06arm64: zynqmp: Fix GIC compatible propertyMichal Simek
dtbs_check is showing warning around GIC compatible property as interrupt-controller@f9010000: compatible: ['arm,gic-400', 'arm,cortex-a15-gic'] is not valid under any of the given schemas Similar change has been done also by Linux kernel commit 5400cdc1410b ("ARM: dts: sunxi: Fix GIC compatible") Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06ARM: zynq: Fix addresses in partition definitionsMichal Simek
Node name should be <name>@<address> which is not how partitions are described. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06arm64: zynqmp: Fix addresses in partition definitionsMichal Simek
Node name should be <name>@<address> which is not how partitions are described. Issue was found by running dtbs_check as: flash@0: 'partition@qspi-device-tree', 'partition@qspi-fsbl-uboot', 'partition@qspi-linux', 'partition@qspi-rootfs' do not match any of the regexes: ... Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06arm64: zynqmp: Sync DP subsystemMichal Simek
Sync DP subsystem with the latest state in Xilinx U-Boot repository. This binding hasn't been approved in mainline Linux but it is much better than ancient version which this patch removes. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06arm64: zynqmp: Do not duplicate flash partition label propertyAmit Kumar Mahapatra
In kernel 5.4, support has been added for reading MTD devices via the nvmem API. For this the mtd devices are registered as read-only NVMEM providers under sysfs with the same name as the flash partition label property. So if flash partition label property of multiple flash devices are identical then the second mtd device fails to get registered as a NVMEM provider. This patch fixes the issue by having different label property for different flashes. Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06arm64: dts: zynqmp: Add clk cells for sdhciAshok Reddy Soma
Add clock-cells and clock-output-names for sdhci0 and sdhci1. These are needed for linux sdhci driver from 5.4 version onwards. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06arm64: zynqmp: Remove second copy of reset-controllerMichal Simek
Reset controller is handled via firmware that's why it should be the part of firmware node. Origin solution hasn't been removed when above change was applied by commit b07e97b4ba27 ("arm64: zynqmp: Use reset header in zynqmp.dtsi"). Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06arm64: zynqmp: Add 'no-1-8-v' property for ZynqMP BoardsManish Narani
Modify dts files to add 'no-1-8-v' property for all the ZynqMP boards. User can remove this property to enable the UHS mode. This is to keep the same speed (HS) modes across all the stages of the Linux Boot. Due to power cycling limitation of some of the ZynqMP boards, some SD cards don't get power cycled and are failing in Linux. Signed-off-by: Manish Narani <manish.narani@xilinx.com>
2020-04-06arm64: zynqmp: Sync zynqmp fpga manager with mainlineNava kishore Manne
Sync zynqmp fpga manager with mainline. Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06arm64: zynqmp: Remove unused zynqmp-clk.dtsiMichal Simek
All boards have been converted to firmware based driver that's why we can remove this file now. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06ARM: zynq: Fix spi name nodeMichal Simek
None name address should be aligned with address. DTC 1.5.1 is reporting issues related to that. arch/arm/boot/dts/zynq-zc770-xm010.dts:106.10-119.4: Warning (spi_bus_reg): /amba/spi@e0007000/flash@0: SPI bus unit address format error, expected "1" arch/arm/boot/dts/zynq-zc770-xm013.dts:101.19-109.4: Warning (spi_bus_reg): /amba/spi@e0006000/eeprom@0: SPI bus unit address format error, expected "2" Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06arm64: zynqmp: Update Copyright years to 2020Michal Simek
Trivial change. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06arm64: zynqmp: Replace gpio-key,wakeup with wakeup sourceMichal Simek
The same change has been done for Zynq by commit 1241c72b6db1 ("ARM: dts: zynq: replace gpio-key,wakeup with wakeup-source property") in mainline Linux kernel. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06ARM: dts: zynq: replace gpio-key,wakeup with wakeup-source propertySudeep Holla
Most of the legacy "gpio-key,wakeup" boolean property is already replaced with "wakeup-source". However few occurrences of old property has popped up again, probably from the remnants in downstream trees. Replace the legacy properties with the unified "wakeup-source" property introduced in the Linux kernel commit 700a38b27eef ("Input: gpio_keys - switch to using generic device properties") Cc: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06ARM: dts: zc702: Fix I2C bus warningsQuanyang Wang
The dtc has new checks for I2C and SPI buses. Fix the warnings in node names and unit-addresses. Warning from Linux kernel: arch/arm/boot/dts/zynq-zc702.dts:187.13-190.6: Warning (i2c_bus_reg): /amba/i2c@e0004000/i2c-mux@74/i2c@7/hwmon@52: I2C bus unit address format error, expected "34" arch/arm/boot/dts/zynq-zc702.dts:191.13-194.6: Warning (i2c_bus_reg): /amba/i2c@e0004000/i2c-mux@74/i2c@7/hwmon@53: I2C bus unit address format error, expected "35" arch/arm/boot/dts/zynq-zc702.dts:195.13-198.6: Warning (i2c_bus_reg): /amba/i2c@e0004000/i2c-mux@74/i2c@7/hwmon@54: I2C bus unit address format error, expected "36" Signed-off-by: Quanyang Wang <quanyang.wang@windriver.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06arm64: zynqmp: Print multiboot register value in EL3Michal Simek
Multi boot register can be used for using different boot images and design better boot strategy. Let EL3 SPL or U-Boot to read it and print it. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06arm64: dts: meson: add libretech-pc supportJerome Brunet
Add support for the Amlogic based libretech-pc platform. This platform comes with 2 variant, based on the s905d or s912 SoC. Acked-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> [narmstrong: update board/amlogic/q200/MAINTAINERS] Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-04-06arm64: dts: meson: import libretech-pc from linux v5.6-rc2Jerome Brunet
Sync the libretech-pc device tree from Linux v5.6-rc2 11a48a5a18c6 ("Linux 5.6-rc2") Acked-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-04-06arm64: dts: meson: sync dt and bindings from v5.6-rc2Jerome Brunet
Sync the device tree and dt-bindings from Linux v5.6-rc2 11a48a5a18c6 ("Linux 5.6-rc2") The only exception to this is the mmc pinctrl pin bias of gxl SoC family. This is a fix which found its way to u-boot but not Linux yet. Acked-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-04-05ARM: dts: stm32: Temporarily drop cd-gpios from AV96 DTMarek Vasut
The card-detect GPIO and any other GPIO access currently doesn't work in U-Boot SPL on any STM32 platform and crashes the SPL. To work around this problem on AV96 right before release, remove the cd-gpios from DT. This patch must be reverted right after release, once the proper fix for the GPIO driver, "gpio: stm32: support gpio ops in SPL", is applied. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Tom Rini <trini@konsulko.com> Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2020-04-03Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-tegraTom Rini
- Add support for Jetson Nano, plus miscellaneous other fixes found during Nano bringup. - Add Igor's update_uboot wrapper patches.
2020-04-03mach-snapdragon: Fix overwriting last digit of serial numberJan-Christoph Tebbe
When generating the MAC address based on the boards serial number the last digit was overwritten with the null termination. That way boards with serial numbers close to each other would use the same MAC address. Signed-off-by: Jan-Christoph Tebbe <Jan-Christoph.Tebbe@ithinx.io>
2020-04-02ARM: tegra: Add NVIDIA Jetson Nano Developer Kit supportTom Warren
The Jetson Nano Developer Kit is a Tegra X1-based development board. It is similar to Jetson TX1 but it is not pin compatible. It features 4GB of LPDDR4, a SPI NOR flash for early boot firmware and an SD card slot used for storage. HDMI 2.0 or DP 1.2 are available for display, four USB ports (3 USB 2.0 and 1 USB 3.0) can be used to attach a variety of peripherals and a PCI Ethernet controller provides onboard network connectivity. NVMe support has also been added. Env save is at the end of QSPI (4MB-8K). A 40-pin header on the board can be used to extend the capabilities and exposed interfaces of the Jetson Nano. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> Tested-by: Peter Robinson <pbrobinson@gmail.com>
2020-04-02mmc: t210: Fix 'bad' SD-card clock when doing 400KHz card detectTom Warren
According to the HW team, for some reason the normal clock select code picks what appears to be a perfectly valid 375KHz SD card clock, based on the CAR clock source and SDMMC1 controller register settings (CAR = 408MHz PLLP0 divided by 68 for 6MHz, then a SD Clock Control register divisor of 16 = 375KHz). But the resulting SD card clock, as measured by the HW team, is 700KHz, which is out-of-spec. So the WAR is to use the values given in the TRM PLLP table to generate a 400KHz SD-clock (CAR clock of 24.7MHz, SD Clock Control divisor of 62) only for SDMMC1 on T210 when the requested clock is <= 400KHz. Note that as far as I can tell, the other requests for clocks in the Tegra MMC driver result in valid SD clocks. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2020-04-02mmc: t210: Add autocal and tap/trim updates for SDMMC1/3Tom Warren
As per the T210 TRM, when running at 3.3v, the SDMMC1 tap/trim and autocal values need to be set to condition the signals correctly before talking to the SD-card. This is the same as what's being done in CBoot, but it gets reset when the SDMMC1 HW is soft-reset during SD driver init, so needs to be repeated here. Also set autocal and tap/trim for SDMMC3, although no T210 boards use it for SD-card at this time. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2020-04-02i2c: t210: Add VI_I2C clock source supportTom Warren
Fix VI_I2C clock source type. Will be needed by VI_I2C driver. Also added use of INTERNAL_ID macro in two places, needed to keep the id returned to 8 bits. Signed-off-by: Tom Warren <twarren@nvidia.com>
2020-04-02t210: pinmux: Remove pinmux/GPIO init from T210 boardsTom Warren
T210 CBoot is now doing the full pinmux and GPIO init, based on the DTB tables. Remove pinmux/GPIO init tables & code from all T210-based builds below: p2371-2180 aka TX1 p2371-0000 e2220-1170 p2571 Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com>
2020-04-02t210: do not enable PLLE and UPHY PLL HW PWRSEQJC Kuo
This commit removes the programming sequence that enables PLLE and UPHY PLL hardware power sequencers. Per TRM, boot software should enable PLLE and UPHY PLLs in software controlled power-on state and should power down PLL before jumping into kernel or the next stage boot software. Adds call to board_cleanup_before_linux to facilitate this. Signed-off-by: JC Kuo <jckuo@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com>
2020-04-02ARM: tegra: p2371-2180: add I2C nodes to DTStephen Warren
This adds to the DT the I2C controllers that connect to the board ID EEPROM, etc. With this change, you can now probe all I2C devices on a TX1 board. Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com>
2020-04-02rockchip: Enable pre console for rk3399Jagan Teki
Enable pre console buffer for rk3399 platform. This would help to capture the console messages prior to the console being initialised. Enabling this would help to capture all the console messages on video output source like HDMI. So we can find the full console messages of U-Boot proper on HDMI display when enabled it for RK3399 platform boards. Buffer address used for pre console is 0x0f200000 which is ram base plus 240MiB. right now the Allwinner SoC is using similar computation. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Peter Robinson <pbrobinson@gmail.com>
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