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2018-09-11ARM: mach-omap2: Don't initialize I2C if DM_I2C is enabledAdam Ford
boot-common.c checks to see if I2C is enabled in SPL, but it doens't check for DM_I2C before initializing it. This will now only initialize the I2C is the DM_I2C is not enabled to avoid initializing it more than once. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-11ARM: dts: da850-evm-u-boot: Remove redundant entriesAdam Ford
With the re-sync from Linux 4.18, several entries in da850-evm-u-boot.dtsi are no longer necessary, so this patch removes them. Signed-off-by: Adam Ford <aford173@gmail.com>
2018-09-11arm: dts: da850: Re-sync da850-evm.dts from Linux 4.18Adam Ford
Signed-off-by: Adam Ford <aford173@gmail.com>
2018-09-11Merge branch 'master' of git://git.denx.de/u-boot-uniphierTom Rini
2018-09-11arm64: dts: k3: Add u-boot specific nodesLokesh Vutla
Add the minimum dt nodes required to boot. These nodes will get deleted as kernel gets these nodes added in the main dts files. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-09-11arm64: dts: k3: Add Support for AM654 SoCLokesh Vutla
Add initial DT support for AM654 EVM that runs on A53. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-09-11board: ti: am654: a53: Add initial support for am654Lokesh Vutla
Add initial support for AM654 based EVM running on A53. Enable 4GB of DDR available on the EVM so that kernel DTB file can be updated accordingly. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> [Andreas: Added 4GB ddr support] Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
2018-09-11gpio: do not include <asm/arch/gpio.h> for ARCH_K3Lokesh Vutla
As no gpio.h is defined in arch/arm/mach-k3/include/, to avoid compilation failure, do not include asm/arch/gpio.h. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-09-11armv8: K3: am654: Add support for generating build targetsLokesh Vutla
Update Makefile to generate - tispl.bin: First stage bootloader on ARMv8 core - u-boot.img: Second stage bootloader on ARMv8 core. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-09-11armv8: K3: am654: Add custom MMU supportLokesh Vutla
Add MMU mappings for AM654 SoC. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-09-11arm: K3: am654: Unlock control module registers during initAndreas Dannenberg
By default the device control module registers are locked, preventing any writes to its registers. Unlock those registers as part of the init flow. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-09-11arm: K3: am654: Add support for boot device detectionLokesh Vutla
AM654 allows for booting from primary or backup boot media. Both media can be chosen individually based on switch settings. ROM looks for a valid image in primary boot media, if not found then looks in backup boot media. In order to pass this boot media information to boot loader, ROM stores a value at a particular address. Add support for reading this information and determining the boot media correctly. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2018-09-11arm: K3: Update _start instructionLokesh Vutla
On K3 family SoCs, once the ROM loads image on R5, M3 resets R5 and expects to start executing from 0x0. In order to handle this ROM updates the boot vector of R5 such that first 64 bytes of image load address are mapped to 0x0. In this case, it is SPL's responsibility to jump to the proper image location. So, update the PC with address of reset vector(like how other exception vectors are handled), instead of branching to reset. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-09-11arm: K3: Add support for AM654 SoC definitionLokesh Vutla
The AM654 device is designed for industrial automation and PLC controller class platforms among other applications. Introduce base support for AM654 SoC. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2018-09-11arm: K3: Add initial support for TI's K3 generation of SoCsLokesh Vutla
Add support for Texas Instruments' K3 Generation Processor families. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2018-09-11ARM: uniphier: remove ad-hoc clock enabling for EHCIMasahiro Yamada
The MIO clock is enabled by default, and the STDMAC clock is enabled by the clk driver. The ad-hoc way to enable the clock is no longer needed. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-09-11mmc: uniphier-sd: sync with LinuxMasahiro Yamada
Sync with the driver code and the binding recently merged in Linux. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-09-11ARM: dts: uniphier: sync DT with Linux 4.19-rc1Masahiro Yamada
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-09-10arm: armv7m: clean up armv7m unified code compilationVikas Manocha
unified syntax should be selected by config ARM_ASM_UNIFIED Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
2018-09-10arm: armv7m: remove un-necessary If then instructionVikas Manocha
With gas option -mimplicit-it=always, IT block is inserted by the assembler for thumb2. Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
2018-09-10arm: stm32: Remove redundant thumb build selectionVikas Manocha
All armv7m arch builds are thumb & SYS_THUMB_BUILD is already selected by CPU_ARMV7M. Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
2018-09-10arm: spear: enable GPIO3 and 4 clocks when the GPIO controller driver is builtQuentin Schulz
There are multiple GPIOs that can be used with the same driver depending on the CONFIG_GPIO_BASE defined in the controller driver. GPIO3 and 4 require a clock to be enabled so let's enable them when the driver is built. Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
2018-09-10board: arm: Add support for Broadcom BCM7260Thomas Fitzsimmons
Add support for loading U-Boot on the Broadcom 7260 SoC. This port assumes Broadcom's BOLT bootloader is acting as the second stage bootloader, and U-Boot is acting as the third stage bootloader, loaded as an ELF program by BOLT. Signed-off-by: Thomas Fitzsimmons <fitzsim@fitzsim.org> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Cc: Florian Fainelli <f.fainelli@gmail.com>
2018-09-10ARM: CPU: arm926ejs: Consolidate cache routines to common fileAdam Ford
Four different boards had different options for enabling cache that were virtually all the same. This consolidates these common functions into arch/arm/cpu/arm926ejs/cache.c This also has the positive side-effect of enabling cache on the Davinci (da850) boards. Signed-off-by: Adam Ford <aford173@gmail.com> [trini: Add mach-at91 to the list of consolidations] Signed-off-by: Tom Rini <trini@konsulko.com>
2018-09-10at91: fix devicetree warningsEugen Hristev
This commit fixes various devicetree warnings in the at91 devicetrees like: arch/arm/dts/sama5d36ek_cmp.dtb: Warning (avoid_unnecessary_addr_size): /gpio_keys: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property These warnings make buildman report failed builds for most of at91 boards. Thus, fixing it. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-09-10ARM: dts: Makefile: fix build for at91familyEugen Hristev
For at91family, makefile was building unwanted DTBs Moved them under specific target configuration. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-09-10arch: types.h: factor out fixed width typedefs to int-ll64.hMasahiro Yamada
All architectures have the same definition for s8/16/32/64 and u8/16/32/64. Factor out the duplicated code into <asm-generic/int-ll64.h>. BTW, Linux unified the kernel space definition into int-ll64.h a few years ago as you see in Linux commit 0c79a8e29b5f ("asm/types.h: Remove include/asm-generic/int-l64.h"). Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-09-10arm: armv7-a: Compile and tune for armv7-a instead of armv5Adam Ford
arch/arm/Makefile references armv5 for backwards compatibility with older compilers. This patch removes those references to armv5, since by now newer compilers are required which should have armv7 support enabled. The Makefile also also has a list of options for mtune, but the entry for CONFIG_CPU_V7A is empty, so this patch tunes the CPU_V7A architecture to generic-armv7-a. The following size changed apply to omap3_logic using GCC. Stock text data bss dec hex filename 50910 429 67580 118919 1d087 spl/u-boot-spl 540713 22700 327072 890485 d9675 u-boot Without Armv5 text data bss dec hex filename 50916 429 67580 118925 1d08d spl/u-boot-spl 540719 22700 327064 890483 d9673 u-boot mtune=generic-armv7-a text data bss dec hex filename 50932 429 67580 118941 1d09d spl/u-boot-spl 540519 22700 327080 890299 d95bb u-boot Signed-off-by: Adam Ford <aford173@gmail.com>
2018-09-07ARM: Specify aligned address for secure section instead of using attributesChen-Yu Tsai
In commit a1274cc94a20 ("ARM: Page align secure section only when it is executed in situ"), we used output section attributes (the "ALIGN" keyword after the colon) to specify the alignment requirements. Using the constant "COMMONPAGE" there was recently broken in binutils 2.31 [1]. Binutils maintainer Alan Modra suggested the former method would still work. Since both methods achieve the same result, this patch does just that. This fixes the "reboot after bootm" issue we've been seeing on sunxi when booting non-secure. [1] https://sourceware.org/bugzilla/show_bug.cgi?id=23571 Suggested-by: Alan Modra <amodra@gmail.com> Signed-off-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Jagan Teki <jagan@openedev.com>
2018-09-05ARM: dts: logicpd-torpedo-37xx-devkit-u-boot: Fix MMC Card DetectAdam Ford
When re-syncing the DTS files from the kernel, something caused the MMC driver to no longer detect the MMC card. Undoing the CD-invert appears to fix the issue. Fixes: e6ea2390cde3 ("ARM: DTS: Resync LogicPD-Torpedo-37xx-devkit with Linux 4.18-RC4") Signed-off-by: Adam Ford <aford173@gmail.com>
2018-09-04Merge branch 'master' of git://git.denx.de/u-boot-imxTom Rini
2018-09-04imx: mx7: add system suspend/resume supportAnson Huang
This patch adds system suspend/resume support, when linux kernel enters deep sleep mode, SoC will go into below mode: - CA7 platform goes into STOP mode; - SoC goes into DSM mode; - DDR goes into self-refresh mode; - CPU0/SCU will be powered down. When wake up event arrives: - SoC DSM mdoe exits; - CA7 platform exit STOP mode, SCU/CPU0 power up; - Invalidate L1 cache; - DDR exit self-refresh mode; - Do secure monitor mode related initialization; - Jump to linux kernel resume entry. Belwo is the log of 1 iteration of system suspend/resume: [ 338.824862] PM: suspend entry (deep) [ 338.828853] PM: Syncing filesystems ... done. [ 338.834433] Freezing user space processes ... (elapsed 0.001 seconds) done. [ 338.842939] OOM killer disabled. [ 338.846182] Freezing remaining freezable tasks ... (elapsed 0.001 seconds) done. [ 338.869717] PM: suspend devices took 0.010 seconds [ 338.877846] Disabling non-boot CPUs ... [ 338.960301] Retrying again to check for CPU kill [ 338.964953] CPU1 killed. [ 338.968104] Enabling non-boot CPUs ... [ 338.973598] CPU1 is up [ 339.267155] mmc1: queuing unknown CIS tuple 0x80 (2 bytes) [ 339.275833] mmc1: queuing unknown CIS tuple 0x80 (7 bytes) [ 339.284158] mmc1: queuing unknown CIS tuple 0x80 (6 bytes) [ 339.385065] PM: resume devices took 0.400 seconds [ 339.389836] OOM killer enabled. [ 339.392986] Restarting tasks ... done. [ 339.398990] PM: suspend exit The resume entry function has to initialize stack pointer before calling C code, otherwise there will be an external abort occur, in additional, invalidate L1 cache must be done in secure section as well, so this patch also adds assembly code back and keep it as simple as possible. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Acked-by: Stefan Agner <stefan@agner.ch> Tested-by: Stefan Agner <stefan@agner.ch>
2018-09-04imx: mx7: add gpc initialization for low power modeAnson Huang
Add i.MX7D GPC initialization for low power mode support like system suspend/resume from linux kernel: - Pending IOMUXC IRQ to workaround GPC state machine issue; - Mask all GPC interrupts for M4/C0/C1; - Configure SCU timing; - Configure time slot ack; - Configure C0/C1 power up/down timing; - Configure wakeup source mechanism; - Disable DSM/RBC related settings. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2018-09-04imx: mx7: psci: improve cpu hotplug flowAnson Huang
This patch improves cpu hotplug, previous cpu_off implementation is NOT safe, a CPU can NOT power down itself in runtime, it will cause system bus hang due to pending transaction. So need to use other online CPU to kill it when it is ready for killed. Here use SRC parameter register and a magic number of ~0 as handshake for killing a offline CPU, when the online CPU checks the psci_affinity_info, it will help kill the offline CPU according to the magic number stored in SRC parameter register. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2018-09-04watchdog: mx25: use the imx_watchdog driver for mx25Martin Kaiser
The existing imx_watchdog driver is compatible with mx25 chipsets. Add a WDOG1_BASE_ADDR define for the base address and enable the driver in watchdog's Makefile. To use the driver, a board must define CONFIG_IMX_WATCHDOG and CONFIG_HW_WATCHDOG. This fixes an issue when booting an mx25 chip via usb/serial. In this case, the boot rom will always enable the watchdog. If u-boot is running in interactive mode and the watchdog is not serviced, the system is rebooted when the watchdog expires. Signed-off-by: Martin Kaiser <martin@kaiser.cx> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-09-04dts: imx6ul_evk: Add DTS files for 14x14 EVK and 9x9 EVK boardsYe Li
Add the board DTS files for 14x14 EVK and 9x9 EVK. They are necessary for converting to use u-boot DM driver. Two -u-boot.dtsi are added to modify compatible string of SPI flash device to "spi-flash". Signed-off-by: Ye Li <ye.li@nxp.com>
2018-09-04dts: imx6ul: Update alias to support DMYe Li
Add spi0 alias for qspi for enabling DM SPI. Change usb alias for usbotg1 and usbotg2 for enabling DM USB Signed-off-by: Ye Li <ye.li@nxp.com>
2018-09-04imx: imx7d-sdb: Add DM QSPI supportYe Li
On iMX7D SabreSD board, the QSPI has pins conflict with EPDC (default). To use QSPI, users have to rework the board (de-populate R388-R391, R396-R399 populate R392-R395, R299, R300). So we add new DTS file and new defconfig dedicated for QSPI. Other changes to support the DM QSPI: - Add QSPI node and alias spi0. - Modify spi4 (spi-gpio) node and add alias spi5 for it to avoid req conflict - Add EPDC node in imx7d.dtsi and disable it in imx7d-sdb-qspi.dts to align with kernel and also present the conflict. - Add -u-boot.dtsi to modify compatible string of mx25l51245g@0 to "spi-flash" - Remove iomux settings of qspi in board codes which is not needed for DM driver. Signed-off-by: Ye Li <ye.li@nxp.com>
2018-09-04imx: imx6sx-sabreauto: convert to use DM QSPI driverYe Li
To support DM QSPI driver: - Add -u-boot.dtsi to modify n25q256a@0 and n25q256a@1 compatible string to "spi-flash" and add "num-cs" property. - Enable DM SPI and DM SPI FLASH configurations - Remove iomux settings of qspi1 in board codes which is not needed for DM driver. Signed-off-by: Ye Li <ye.li@nxp.com>
2018-09-04imx: imx6sx-sdb: Enable DM QSPI driverYe Li
To support DM QSPI driver - Add spi0 and spi1 alias for qspi1 and qspi2. - Add -u-boot.dtsi to modify n25q256a@0 and n25q256a@1 compatible string to "spi-flash" and add "num-cs" property. - Enable DM SPI/QSPI relavent configurations - Remove iomux settings of qspi2 in board codes which is not needed for DM driver. - Add sf default settings. So running "sf probe" can detect the flash Signed-off-by: Ye Li <ye.li@nxp.com>
2018-08-29rockchip: dts: fix unnecessary '-cells' warningKever Yang
Fix warning below: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-08-26cmd: ubi: change 'default y' for SUNXI to 'imply' in KconfigMasahiro Yamada
It is not preferred to put SUNXI-specific code in the common place. Change it to 'imply' property of ARCH_SUNXI. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-08-24Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini
2018-08-24Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini
2018-08-24board: arm: bcmstb: Declare get_ticks in timer.hThomas Fitzsimmons
In an earlier proposed patch, bcmstb.c implemented timer_read_counter, but it was updated to implement get_ticks instead. This patch updates the declaration in timer.h accordingly. Signed-off-by: Thomas Fitzsimmons <fitzsim@fitzsim.org>
2018-08-24ARM: dts: socfpga: Add missing NAND resetMarek Vasut
The NAND reset is missing from DT, so the reset manager cannot unreset the NAND. Add the missing DT reset entry. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-24ARM: dts: socfpga: Drop ad-hoc UART clock frequency encoding from DTMarek Vasut
The UART clock frequency can be obtained from the clock framework by the ns16550 driver, so drop this redundant DT node. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-24ARM: socfpga: Convert Arria10 to timer frameworkMarek Vasut
Switch the Arria10 from ad-hoc hardcoded timer to timer framework and the DW APB timer driver. This allows the A10 to extract timer information, like timer rate, from clock framework and thus DT instead of having it hardcoded in U-Boot configuration files. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-24ARM: dts: socfpga: Flag timer clock as pre-relocMarek Vasut
Flag timer clock as DM pre-reloc, so that a timer driver can be used and it can extract information about it's clock rate using the clock framework. This patch also moves some of the pre-reloc flags into the core dtsi file, this is because the timer is not board specific, but rather is used on all boards. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-24ARM: socfpga: Reorder Arria10 SPLMarek Vasut
The Arria10 SPL is a complete mess of calls to functions which are called in the wrong context and it is surprise it works at all. This patch tries to clean that mess up by shuffling the function calls around and moving the calls into the correct context. Due to the delicate nature of the reordering, this is done in one huge patch. The following changes happen in this patch: - Security policy init and NIC301 happens first in board_init_f() - The clock init happens very early in board_init_f() in SPL only - arch_early_init_r() only registers the FPGA, just like on Gen5 - arch_early_init_r() is never called from any _f() function - Dedicated FPGA pins are inited in board_init_f() as on Gen5 Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Ley Foon Tan <ley.foon.tan@intel.com>
generated by cgit (git 2.34.1) at 2024-12-26 19:58:16 +0000