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2016-12-05arm64: mvebu: Add support for the DB-88F8040 Armada 8k devel boardStefan Roese
This patch adds the necessary files to support the Marvell Armada 8k devel board. Most board specfic files are shared with the Armada 7k boards under the name "armada-8k*". So only minimal changes are necessary to add this basic board support (except the DT files of course). Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com>
2016-12-05arm64: mvebu: Add slave CP area to the memory mapStefan Roese
To enable access to the slave CP its memory needs to be added to the MMU memory map. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com>
2016-12-05arm64: mvebu: Add Armada-80x0 dts/dtsi filesStefan Roese
Add the latest version of the DT files from the Linux kernel. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com>
2016-12-05arm64: mvebu: Rename db-88f7040 files to armada-8kStefan Roese
This moves some of the Armada DB-88F7040 board specific files to a more generic name: armada-8k. This is in preparation for the Armada-8k support which will be added soon. And since both platforms share most devices, lets also share most source files to not duplicate the code here. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com>
2016-12-04Merge git://git.denx.de/u-boot-mpc85xxTom Rini
2016-12-04arm: Remove VCMA9 boardSimon Glass
This board has not been converted to DM_SERIAL by the deadline. Remove it. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: David Müller <d.mueller@elsoft.ch> Reviewed-by: Jagan Teki <jagan@openedev.com>
2016-12-04arm: Remove smdk2410 boardSimon Glass
This board has not been converted to DM_SERIAL by the deadline. Remove it. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: David Müller <d.mueller@elsoft.ch>
2016-12-04ARM: dts: AM571x-IDK Initial SupportSchuyler Patton
Add initial DTS support for AM571-IDK evm. Signed-off-by: Schuyler Patton <spatton@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-12-04board: ti: am572x: Add pinmux for X15/GPEVM SR2.0 using latest PMTNishanth Menon
Update the board pinmux for AM572x-IDK board using latest PMT[1] and the board files named am572x_gp_evm_A3a_sr2p0 that were autogenerated on 19th October, 2016 by "Ahmad Rashed<a-rashed@ti.com>". [1] https://dev.ti.com/pinmux/app.html#/default/ Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-12-04ARM: dts: am57xx: sync DT with latest LinuxLokesh Vutla
Sync all am57xx based dts files with latest Linux Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-12-04ARM: dts: dra71x-evm: Add DT supportLokesh Vutla
Add DT support for dra71-evm and built it as part of FIT image. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-12-04ARM: dts: dra7xx: sync DT with latest LinuxLokesh Vutla
Sync all dra7xx based dts files with latest Linux Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-12-04ARM: OMAP4+: Add support for getting pbias info from boardLokesh Vutla
Palmas driver assumes it is always TPS659xx regulator on all DRA7xx based boards to enable mmc regulator. This is not true always like in case of DRA71x-evm. So get this information based on the board. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Vignesh R <vigneshr@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> [trini: Delete omap4_vmmc_pbias_config from omap_hsmmc.c] Signed-off-by: Tom Rini <trini@konsulko.com>
2016-12-04board: ti: dra71x-evm: Add PMIC supportKeerthy
Add the pmic_data for LP873x PMIC which is used to power up dra71x-evm. Note: As per the DM[1] DRA71x supports only OP_NOM. So, updating the efuse registers only to use OPP_NOM irrespective of any CONFIG_DRA7_<VOLT>_OPP_{NOM,od,high} is defined. [1] http://www.ti.com/product/DRA718/technicaldocuments Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-12-04ARM: DRA7: Fixup DSPEVE, IVA and GPU clock frequencies based on OPPSuman Anna
This patch adds support to update the device-tree blob to adjust the DSP and IVA DPLL clocks pertinent to the selected OPP choice, with the default being OPP_NOM. The voltage settings are done in u-boot, but the actual clock configuration itself is done in kernel because of the following reasons: 1. SoC definition constraints us to NOT to do dynamic voltage scaling ever after the initial avs0 setting in bootloader - so the voltage must be set in bootloader. 2. The voltage level must be set even if the IP blocks like GPU/DSP are unused. 3. The IVA, GPU and DSP DPLLs are not essential for u-boot functionality, and similar DPLL clock configuration code has been cleaned up in v2014.10 u-boot release. See commit, 02c41535b6a4 ("ARM: OMAP4/5: Remove dead code against CONFIG_SYS_CLOCKS_ENABLE_ALL"). The non-essential DPLLs are configured within the kernel during the clock init step when parsing the device tree and creating the clock devices. This approach meets both the u-boot and kernel needs. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Subhajit Paul <subhajit_paul@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-12-04ARM: DRA7: Redefine voltage and efuse macros per OPP using KconfigSuman Anna
Redefine the macros used to define the voltage values and the efuse register offsets based on OPP for all the voltage domains. This is done using Kconfig macros that can be set in a defconfig or selected during a config step. This allows a voltage domain to be configured/set to a corresponding voltage value depending on the OPP selection choice. The Kconfig choices have been added for MPU, DSPEVE, IVA and GPU voltage domains, with the MPU domain restricted to OPP_NOM. The OPP_OD and OPP_HIGH options will be added when the support for configuring the MPU clock frequency is added. The clock configuration for other voltage domains is out of scope in u-boot code. The CORE voltage domain does not have separate voltage values and efuse register offset at different OPPs, while the MPU voltage domain only has different efuse register offsets for different OPPs, but uses the same voltage value. Any different choices of OPPs for voltage domains on common ganged-rails is automatically taken care to select the corresponding highest OPP voltage value. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-12-04ARM: OMAP4+: Add support for dynamically selecting OPPsLokesh Vutla
It can be expected that different paper spins of a SoC can have different definitions for OPP and can have their own constraints on the boot up OPP for each voltage rail. In order to have this flexibility, add support for dynamically selecting the OPP voltage based on the board to handle any such exceptions. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-12-03Merge branch 'master' of git://www.denx.de/git/u-boot-dmTom Rini
2016-12-03arm: omap5: Add OPTEE node to fdtAndrew F. Davis
Add an OPTEE node to the FDT when TEE installation has completed successfully. This informs the kernel of the presence of OPTEE. Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-12-03arm: omap5: Add TEE loading supportHarinarayan Bhatta
secure_tee_install is used to install and initialize a secure TEE OS such as Linaro OP-TEE into the secure world. This function takes in the address where the signed TEE image is loaded as an argument. The signed TEE image consists of a header (struct tee_header), TEE code+data followed by the signature generated using image signing tool from TI security development package (SECDEV). Refer to README.ti-secure for more information. This function uses 2 new secure APIs. 1. PPA_SERV_HAL_TEE_LOAD_MASTER - Must be called on CPU Core 0. Protected memory for TEE must be reserved before calling this function. This API needs arguments filled into struct ppa_tee_load_info. The TEE image is authenticated and if there are no errors, the control passes to the TEE entry point. 2. PPA_SERV_HAL_TEE_LOAD_SLAVE - Called on other CPU cores only after a TEE_LOAD_MASTER call. Takes no arguments. Checks if TEE was successfully loaded (on core 0) and transfers control to the same TEE entry point. The code at TEE entry point is expected perform OS initialization steps and return back to non-secure world (U-Boot). Signed-off-by: Harinarayan Bhatta <harinarayan@ti.com> Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-12-03arm: omap5: Add function to make an SMC call on cpu1Harinarayan Bhatta
On DRA7xx platform, CPU Core 1 is not used in u-boot. However, in some cases it is need to make secure API calls from Core 1. This patch adds an assembly function to make a secure (SMC) call from CPU Core #1. Signed-off-by: Harinarayan Bhatta <harinarayan@ti.com> Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-12-03davinci: omapl138_lcdk: configure ddr2Fabien Parent
The SPL is unable to load u-boot because the DDR2 is not configured. Configure the DDR2. Signed-off-by: Fabien Parent <fparent@baylibre.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-12-03davinci: omapl138_lcdk: configure pll0Fabien Parent
The SPL is not able to boot properly because the PLL0 is not configured. Configure it. Signed-off-by: Fabien Parent <fparent@baylibre.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-12-03ARM: davinci: Move CONFIG_SYS_DA850_DDR_INIT to KconfigFabien Parent
Clean config headers by moving CONFIG_SYS_DA850_DDR_INIT away to a Kconfig file. Signed-off-by: Fabien Parent <fparent@baylibre.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-12-03ARM: davinci: Move CONFIG_SYS_DA850_PLL_INIT to KconfigFabien Parent
Clean config headers by moving CONFIG_SYS_DA850_PLL_INIT away to a Kconfig file. Signed-off-by: Fabien Parent <fparent@baylibre.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-12-03ARM: DRA7x/AM57xx: Get rid of CONFIG_AM57XXNishanth Menon
CONFIG_AM57XX is just an unnecessary macro that is redundant given So, remove the same instead of spreading through out the u-boot source code and getting in the way to maintain common code for DRA7x family. Acked-by: Andrew F. Davis <afd@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-12-03ARM: K2G: DDR3: Fix up priv ID for MPUNishanth Menon
For ECC enabled DDR, we use EDMA to reset all memory values to 0. For K2E/L/H/K the priv ID of 8 was indicative of ARM, but that is not the case for K2G, where it is 1. Unfortunately, ddr3 code had hard coded the privID and had missed identification previously. Fix the same, else unforeseen behavior can be expected in our reset of DDR contents to 0 for ECC enablement. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-12-02drivers: usb: musb: adopt musb backend driver to driver modelMugunthan V N
Currently all backend driver ops uses hard coded physical address, so to adopt the driver to DM, add device pointer to ops call backs so that drivers can get physical addresses from the usb driver priv/plat data. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-12-02am33xx: board: probe misc drivers to register musb devicesMugunthan V N
MUSB wrapper driver is bound as MISC device and underlying usb devices are bind to usb drivers based on dr_mode, so probing the MISC wrapper driver to register musb devices. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-12-02am33xx: board: do not register usb devices when CONFIG_DM_USB is definedMugunthan V N
Do not register usb devices when CONFIG_DM_USB is define. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-12-02libfdt: replace ARCH_FIXUP_FDT with ARCH_FIXUP_FDT_MEMORYMasahiro Yamada
Commit e2f88dfd2d96 ("libfdt: Introduce new ARCH_FIXUP_FDT option") allows us to skip memory setup of DTB, but a problem for ARM is that spin_table_update_dt() and psci_update_dt() are skipped as well if CONFIG_ARCH_FIXUP_FDT is disabled. This commit allows us to skip only fdt_fixup_memory_banks() instead of the whole of arch_fixup_fdt(). It will be useful when we want to use a memory node from a kernel DTB as is, but need some fixups for Spin-Table/PSCI. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Alexey Brodkin <abrodkin@synopsys.com> Acked-by: Simon Glass <sjg@chromium.org> Fixed build error for x86: Signed-off-by: Simon Glass <sjg@chromium.org>
2016-12-02armv8: fsl-layerscape: Move SECURE_BOOT to KconfigYork Sun
Move from CONFIG_SYS_EXTRA_OPTIONS to Kconfig option. Signed-off-by: York Sun <york.sun@nxp.com>
2016-12-02armv7: ls1021a: Move SECURE_BOOT option to KconfigYork Sun
Move from CONFIG_SYS_EXTRA_OPTIONS to Kconfig option. Signed-off-by: York Sun <york.sun@nxp.com>
2016-12-02script: remove CONFIG_SYS_CCSRBAR_DEFAULT from white listYork Sun
Now all mpc85xx and mpc86xx have converted to use SYS_CCSRBAR_DEFAULT in Kconfig. Drop this macro for LSCH2 and remove from white list. Signed-off-by: York Sun <york.sun@nxp.com>
2016-12-02ARM: zynq: Enable SD1 and qspi for picozed boardSiva Durga Prasad Paladugu
Enable SD1 and qspi for picozed board. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-12-02ARM64: zynqmp: List secondary software boot modesMichal Simek
Using alternative bootmode field to support automatic secondary boot modes. It is purely software setting where SW modes are using free bootmode combinations. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-12-02ARM64: zynqmp: Force certain bootmode for SPLMichal Simek
ZynqMP provides an option to overwrite bootmode setting which can change SPL behavior. For example: boot SPL via JTAG and then SPL loads images from SD. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-12-01arm: mvebu: move SYS_MVEBU_PLL_CLOCK to KconfigChris Packham
The main PLL frequency is 2GHz for Armada-XP and 1GHZ for Armada 375, 38x and 39x. [ Linux commit ae142bd9976532aa5232ab0b00e621690d8bfe6a ] Signed-off-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
2016-11-30Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini
2016-11-30imx6: clock: Enable External Memory Interface [EIM] clock (eim_slow_clock)Lukasz Majewski
This patch extends the imx6 clock code to enable or disable the EIM slow clock, which in necessary when one wants to use EIM interface t o read/write from external memory (e.g. NOR). Signed-off-by: Lukasz Majewski <l.majewski@majess.pl>
2016-11-30mx6sx: Add initial support for Samtec VIN|ING 2000 boardChristoph Fritz
This patch adds initial support for Samtec VIN|ING 2000 board. Signed-off-by: Christoph Fritz <chf.fritz@googlemail.com> Reviewed-by: Stefano Babic <sbabic@denx.de> Acked-by: Marek Vasut <marex@denx.de>
2016-11-29mx6sx: Add initial support for UDOO Neo BoardBreno Lima
UDOO Neo Board is a development board from Seco that has three models: - UDOO Neo Basic - UDOO Neo Basic Kick Starter - UDOO Neo Extended - UDOO Neo Full All versions are based on the i.MX6 SoloX processor. For more details about the UDOO Neo board, please refer to: http://www.udoo.org/udoo-neo/ This work is based on a previous commit of Francesco Montefoschi <francesco.monte@gmail.com>: https://github.com/fmntf/u-boot/commit/877b71184a5105e708024f232d36aed574961844 Only tested on the UDOO Neo Full board. Signed-off-by: Breno Lima <breno.lima@nxp.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2016-11-29ARM: ts4600: add basic board supportSebastien Bourdelin
This commit adds basic support including: MMC, Serial console Signed-off-by: Sebastien Bourdelin <sebastien.bourdelin@savoirfairelinux.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2016-11-29ARM: mx6: ddr: use Kconfig for inclusion of DDR calibration routinesEric Nelson
The DDR calibration routines are gated by conditionals for the i.MX6DQ SOCs, but with the use of the sysinfo parameter, these are usable on at least i.MX6SDL and i.MX6SL variants with DDR3. Also, since only the Novena board currently uses the dynamic DDR calibration routines, these routines waste space on other boards using SPL. Add a KConfig entry to allow boards to selectively include the DDR calibration routines. Signed-off-by: Eric Nelson <eric@nelint.com>
2016-11-29mx6: ddr: add routine to return DDR calibration dataEric Nelson
Add routine mmdc_read_calibration() to return the output of DDR calibration. This can be used for debugging or to aid in construction of static memory configuration. This routine will be used in a subsequent patch set adding a virtual "mx6memcal" board, but could also be useful when gathering statistics during an initial production run. Signed-off-by: Eric Nelson <eric@nelint.com>
2016-11-29mx6: ddr: pass mx6_ddr_sysinfo to calibration routinesEric Nelson
The DDR calibration routines have scattered support for bus widths other than 64-bits: -- The mmdc_do_write_level_calibration() routine assumes the presence of PHY1, and -- The mmdc_do_dqs_calibration() routine tries to determine whether one or two DDR PHYs are active by reading MDCTL. Since a caller of these routines must have a valid struct mx6_ddr_sysinfo for use in calling mx6_dram_cfg(), and the bus width is available in the "dsize" field, use this structure to inform the calibration routines which PHYs are active. This allows the use of the DDR calibration routines on CPU variants like i.MX6SL that only have a single MMDC port. Signed-off-by: Eric Nelson <eric@nelint.com> Reviewed-by: Marek Vasut <marex@denx.de>
2016-11-29mx6: ddr: allow 32 cycles for DQS gating calibrationEric Nelson
The DDR calibration code is only setting flag DG_CMP_CYC (DQS gating sample cycle) for the first PHY. Set the 32-cycle flag for both PHYs and clear when done so the MPDGCTRL0 output value isn't polluted with calibration artifacts. Signed-off-by: Eric Nelson <eric@nelint.com> Reviewed-by: Marek Vasut <marex@denx.de>
2016-11-29imx: mx6: ddr: add register MPZQLP2CTL for LPDDR2Eric Nelson
Add constants for the MPZQLP2CTL DDR register for both banks to allow setting the LPDDR2 timing values in .cfg files using a named constant instead of hex addresses as is currently done in mx6slevk and other board files. Signed-off-by: Eric Nelson <eric@nelint.com>
2016-11-29imx: make ipu's di configurableMax Krummenacher
The ipu has two display interfaces. Make the used one a parameter in struct display_info_t instead of using unconditionally DI0. DI0 is the default setting. Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> Reviewed-by: Eric Nelson <eric@nelint.com>
2016-11-29ARM: mx6: add MMC2 boot device detection support in SPLMarcin Niestroj
Check BOOT_CFG2[3:4] to determine which SD/MMC port is selected to boot from. If MMC2 is selected return BOOT_DEVICE_MMC2. In all other cases return BOOT_DEVICE_MMC1, as we do not have corresponding macro for MMC3 and MMC4. Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>