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2014-02-07SPL: Add CONFIG_SUPPORT_EMMC_BOOT support to CONFIG_SPL_FRAMEWORKTom Rini
We use the switch CONFIG_SUPPORT_EMMC_BOOT today to enable some additional features of the eMMC boot partitions. Add support for being told that we have booted from one of these partitions to the spl framework and implement this on TI OMAP/related. Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Signed-off-by: Tom Rini <trini@ti.com> Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2014-02-07MMC: DWMMC: Correct the CLKDIV register valueRajeshwari S Shinde
This patch corrects the divider value written to CLKDIV register. Since SDCLKIN is divided inside controller by the DIVRATIO value set in the CLKSEL register, we need to use the same output clock value to calculate the CLKDIV value. as per user manual: cclk_in = SDCLKIN / (DIVRATIO + 1) Input parameter to mmc_clk is changed to dwmci_host, since we need the same to read DWMCI_CLKSEL register. This improves the read timing values for channel 0 on SMDK5250 from 0.288sec to 0.144sec Signed-off-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2014-01-24spl: common: Support for USB MSD FAT image loadingDan Murphy
Add SPL support to be able to detect a USB Mass Storage device connected to a USB host. Once a USB Mass storage device is detected the SPL will load the u-boot.img from a FAT partition to target address. Signed-off-by: Dan Murphy <dmurphy@ti.com>
2014-01-24ARM: merge commonly-defined PLATFORM_RELFLAGSMasahiro Yamada
Before this commit, all arch/arm/cpu/${CPU}/config.mk except ARMv8 had the same option: $(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,)) This commit moves it into arch/arm/config.mk. If the compiler does not support the option, it is ignored by $(call cc-option,...). So this commit gives no harm to ARMv8. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-01-24lib: time: add weak timer_init() functionDarwin Rambo
If timer_init() is made a weak stub function, then it allows us to remove several empty timer_init functions for those boards that already have a timer initialized when u-boot starts. Architectures that use the timer framework may also remove the need for timer.c. Signed-off-by: Darwin Rambo <drambo@broadcom.com> Reviewed-by: Tim Kryger <tim.kryger@linaro.org>
2014-01-20ARM: bcm2835: fix mailbox timeoutStephen Warren
My original intention was to have a 100ms timeout. However, the timer operations used return values in ms not us, so we ended up with a 100s timeout instead. Fixing this exposes that some operations need longer to operate than 100ms, so bump the timeout up to a whole second. Reported-by: Andre Heider <a.heider@gmail.com> Reviewed-by: Andre Heider <a.heider@gmail.com> Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
2014-01-20ARM: rpi_b: power on SDHCI and USB HW modulesStephen Warren
Send RPC commands to the VideoCore to turn on the SDHCI and USB modules. For SDHCI this isn't needed in practice, since the firmware already turned on the power in order to load U-Boot. However, it's best to be explicit. For USB, this is necessary, since the module isn't powered otherwise. This will allow the kernel USB driver to work. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
2014-01-20Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini
2014-01-17mx6: Revert "mx6: soc: Disable VDDPU regulator"Fabio Estevam
Commit 022298278 (mx6: soc: Disable VDDPU regulator) is causing kernel hang for people using FSL kernel 3.0.35 and 3.10, so revert it for now. Reported-by: Otavio Salvador <otavio@ossystems.com.br> Reported-by: Pierre Aubert <p.aubert@staubli.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2014-01-16Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini
2014-01-16arm: rmobile: Add SH QSPI base register addressNobuhiro Iwamatsu
This adds base register address of SH QSPI. Currently, SH QSPI is used only from R8A7790 and R8A7791. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2014-01-15Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'Albert ARIBAUD
2014-01-15mx6: Add initial support for the Hummingboard soloFabio Estevam
SolidRun has designed the Hummingboard board based on mx6q/dl/solo. Add the initial support for the mx6 solo variant. More information about this hardware can be found at: http://imx.solid-run.com/wiki/index.php?title=Carrier-One_Hardware (Carrier-One was the previous name of Hummingboard). Based on the work from Jon Nettleton <jon.nettleton@gmail.com>. Signed-off-by: Jon Nettleton <jon.nettleton@gmail.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2014-01-15mx6: clock: Pass the frequency as argument of enable_fec_anatop_clock()Fabio Estevam
Provide an argument to enable_fec_anatop_clock() to specify the clock frequency that will be generated. No changes are made to mx6slevk, which uses the default 50MHz fec clock. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
2014-01-14Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini
2014-01-14arm: use canonical sub mnemonicAndreas Bießmann
Building some arm boards with older binutils may produce errors like this: ---8<--- crt0.S: Assembler messages: crt0.S:70: Error: register expected, not '#(184)' -- `sub sp,#(184)' --->8--- Use canonical version of the subtract mnemonic to avoid those issues. Reported-by: Alexey Smishlayev <alexey@xtech2.lv> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2014-01-14Merge 'u-boot-imx/master' into 'u-boot-arm/master'Albert ARIBAUD
2014-01-14arm: put .hash, .got.plt and .machine_param back in binariesAlbert ARIBAUD
Some targets will build fine but not boot if sections .hash and .got.plt are not present in the binary. Add them back. Also, Exynos machines require .machine_param section in SPL. Add it. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Tested-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com>
2014-01-13Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini
2014-01-13ARM: pxa: Fix OneNAND SPL buildsMarek Vasut
The OneNAND SPL used on PXA is slightly obscure. Due to the OneNAND limitation, where we have only the first 1KiB of the OneNAND available upon power-up as a memory-mapped area, from which the CPU starts executing, we place only the most essential code into this first 1KiB . This code copies the rest of the SPL into SRAM and jumps to it. This code is stored in section .text.0 . The rest of the SPL is stored in section .text.1 . When running the OBJCOPY on the SPL, it will preserve only .text section, but the .text.0 and .text.1 are stripped away from the result, thus making the SPL binary empty. The patch adds additional -j parameters to the OBJCOPY for PXA during the SPL build, which will preserve the .text.0 and .text.1 sections. Moreover, this patch also adds missing functions into the .text.0 section, since otherwise the PXA270 with 1KiB-window OneNAND won't be able to boot. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com>
2014-01-13usb: ehci: exynos: set/reset hsic physInderpal Singh
The controller has 3 ports. The port0 is for USB 2.0 Phy, port1 and port2 are for HSIC phys. The usb 2.0 phy is already being setup. This patch sets up the hsic phys. Signed-off-by: Inderpal Singh <inderpal.singh@linaro.org>
2014-01-13imx6: make use of lldiv(..)Christian Gmeiner
Commit 762a88ccf8540948fbf8c31b40a29d1e0684a25b introduces a 64-bit division without using the lldiv() function, which pulls in previously unused libgcc stuff. Signed-off-by: Måns Rullgård <mans@mansr.com> Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com> Acked-by: Stefano Babic <sbabic@denx.de>
2014-01-10Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini
Bringing in the MMC tree means that CONFIG_BOUNCE_BUFFER needed to be added to include/configs/exynos5-dt.h now. Conflicts: include/configs/exynos5250-dt.h Signed-off-by: Tom Rini <trini@ti.com>
2014-01-10gpio: zynq: Add dummy gpio routinesJagannadha Sutradharudu Teki
GPIO dummy routines are required for fdt build, may be removed these dependencies once the u-boot fdt is fully optimized. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-01-10dts: zynq: Add basic fdt supportJagannadha Sutradharudu Teki
This patch provides a basic fdt support for zynq u-boot. zynq-7000.dtsi-> initial arch dts file zynq-zed.dts -> initial zed board dts file more devices should be added in subsequent patches. u-boot build: once configuring of a board done for building dtb with zynq-zed.dts as an input zynq-uboot> make DEVICE_TREE=zynq-zed Enabled CONFIG_OF_SEPARATE for building dtb separately. There is a new binary called u-boot-dtb.bin which is a u-boot with devicetree supported. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-01-10zynq: Add support to find bootmodeJagannadha Sutradharudu Teki
Added support to find the bootmodes by reading slcr bootmode register. this can be helpful to autoboot the configurations w.r.t a specified bootmode. Added this functionality on board_late_init as it's not needed for normal initializtion part. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-01-10armv8: Use __aarch64__ rather than CONFIG_ARM64 in some casesTom Rini
The toolchain sets __aarch64__ for both LE and BE. In the case of posix_types.h we cannot reliably use config.h as that will lead to problems. In the case of byteorder.h it's clearer to check the EB flag being set in either case instead. Cc: David Feng <fenghua@phytium.com.cn> Signed-off-by: Tom Rini <trini@ti.com> Amended by Albert ARIBAUD <albert.u.boot@aribaud.net> to actually remove the config.h include from the posix_types.h files, with permission from Tom Rini.
2014-01-09arm64: core supportDavid Feng
Relocation code based on a patch by Scott Wood, which is: Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: David Feng <fenghua@phytium.com.cn>
2014-01-09socfpga/dwmmc: Adding DesignWare MMC driver support for SOCFPGAChin Liang See
To add the DesignWare MMC driver support for Altera SOCFPGA. It required information such as clocks and bus width from platform specific files (SOCFPGA handoff files) Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Rajeshwari Shinde <rajeshwari.s@samsung.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Wolfgang Denk <wd@denx.de> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2014-01-06Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'Albert ARIBAUD
2014-01-06Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'Albert ARIBAUD
Conflicts: include/micrel.h The conflict above was trivial, caused by four lines being added in both branches with different whitepace.
2014-01-03arm: mx5: Add fuse supply enable in fsl_iimSergey Alyoshin
Enable fuse supply before fuse programming and disable after. Signed-off-by: Sergey Alyoshin <alyoshin.s@gmail.com> Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
2014-01-03ARM: mx6: Allow enablement of FEC Anatop based clock for all MX6Otavio Salvador
The enable_fec_anatop_clock method should be available for all MX6 variant as it is not MX6 SoloLite specific. This moves the code out of the #ifdef/#endif and we make it conditional to CONFIG_FEC_MXC instead. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Acked-by: Stefano Babic <sbabic@denx.de>
2014-01-03imx: Easy enabling of SION per-pin using MUX_MODE_SION helper macroOtavio Salvador
The macro allows easy setting in per-pin, as for example: ,---- | imx_iomux_v3_setup_pad(MX6_PAD_NANDF_D1__GPIO_2_1 | MUX_MODE_SION); `---- The IOMUX_CONFIG_SION allows for reading PAD value from PSR register. The following quote from the datasheet: ,---- | ... | 28.4.2.2 GPIO Write Mode | The programming sequence for driving output signals should be as follows: | 1. Configure IOMUX to select GPIO mode (Via IOMUXC), also enable SION if need | to read loopback pad value through PSR | 2. Configure GPIO direction register to output (GPIO_GDIR[GDIR] set to 1b). | 3. Write value to data register (GPIO_DR). | ... `---- This fixes the gpio_get_value to properly work when a GPIO is set for output and has no conflicts. Thanks for Benoît Thébaudeau <benoit.thebaudeau@advansee.com>, Fabio Estevam <fabio.estevam@freescale.com> and Eric Bénard <eric@eukrea.com> for helping to properly trace this down. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Acked-by: Stefano Babic <sbabic@denx.de>
2014-01-02mx6: soc: Disable VDDPU regulatorFabio Estevam
As U-boot does not use GPU/VPU peripherals, shutdown the VDDPU regulator in order to save power. Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Jason Liu <r64343@freescale.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2014-01-02mx6: soc: Add the required LDO ramp up delayFabio Estevam
When changing LDO voltages we need to wait for the required amount of time for the voltage to settle. Also, as the timer is still not available when arch_cpu_init() is called, we need to call it later at board_postclk_init() phase. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2014-01-02mx6: soc: Introduce set_ldo_voltage()Fabio Estevam
Introduce set_ldo_voltage() so that all three LDO regulators can be configured. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2014-01-02mx6: soc: Set the VDDSOC at 1.175 VFabio Estevam
mx6 datasheet specifies that the minimum VDDSOC at 792 MHz is 1.15 V. Add a 25 mV margin and set it to 1.175V. This also matches the VDDSOC voltages for 792MHz operation that the kernel configures: http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/tree/arch/arm/mach-mx6/cpu_op-mx6.c?h=imx_3.0.35_4.1.0 Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2014-01-02mx6: soc: Clear the LDO ramp values up prior to setting the LDO voltagesFabio Estevam
Since ROM may modify the LDO ramp up time according to fuse setting, it is safer to reset the ramp up field to its default value of 00: 00: 64 cycles of 24MHz clock; 01: 128 cycles of 24MHz clock; 02: 256 cycles of 24MHz clock; 03: 512 cycles of 24MHz clock; Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Jason Liu <r64343@freescale.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2014-01-02mx6: soc: Staticize set_vddsoc()Fabio Estevam
set_vddsoc() is not used anywhere else, so make it static. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2013-12-30DTS: Add dts support for SMDK5420Rajeshwari Birje
This patch adds dts support for SMDK5420. exynos5.dtsi created is a common file which has the nodes common to both 5420 and 5250. Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Signed-off-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-12-30Exynos5420: Add support for 5420 in pinmux and gpioRajeshwari Birje
Adds code in pinmux and gpio framework to support Exynos5420. Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Signed-off-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-12-30Exynos5420: Add DDR3 initialization for 5420Rajeshwari Birje
This patch intends to add DDR3 initialization code for Exynos5420. Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Signed-off-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-12-30Exynos5420: Add clock initialization for 5420Rajeshwari Birje
This patch adds code for clock initialization and clock settings of various IP's and controllers, required for Exynos5420 Signed-off-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-12-30EXYNOS5420: Add dmc and phy_control register structureRajeshwari Birje
Add dmc and phy_control register structure for 5420. Signed-off-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-12-30EXYNOS5420: Add power register structure.Rajeshwari Birje
Add structure for power register for Exynos5420 Signed-off-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-12-30Exynos5420: Add base addresses for 5420Rajeshwari Birje
Adds base addresses of various IPs and controllers required for Exynos5420. Signed-off-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-12-30EXYNOS5: Create a common board fileRajeshwari Birje
Create a common board.c file for all functions which are common across all EXYNOS5 platforms. exynos_init function is provided for platform specific code. Signed-off-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-12-19MX6: fix sata compilation for i.MX6Stefano Babic
Commit 164d98466103a46b7c881149e92ec2a28a6375be breaks board with SATA support, because sata is not compiled. Signed-off-by: Stefano Babic <sbabic@denx.de>
2013-12-18ARM: AM43xx: GP_EVM: Add support for DDR3Lokesh Vutla
GP EVM has 1GB DDR3 attached(Part no: MT41K512M8RH). Adding details for the same. Below is the brief description of DDR3 init sequence(SW leveling): -> Enable VTT regulator -> Configure VTP -> Configure DDR IO settings -> Disable initialization and refreshes until EMIF registers are programmed. -> Program Timing registers -> Program leveling registers -> Program PHY control and Temp alert and ZQ config registers. -> Enable initialization and refreshes and configure SDRAM CONFIG register Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
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