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2020-04-29ARM: dts: add QorIQ DPAA 1 FMan v3 device tree nodesMadalin Bucur
Add the QorIQ DPAA Frame Manager v3 device tree nodes description. The device tree fragments are copied over with little modification from the Linux kernel source code. Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-29armv8: ls1028aqds: add lpuart dts supportYuantian Tang
Rename fsl-ls1028a-qds.dts to fsl-ls1028a-qds.dtsi so that it can be used as common device tree for lpuart and duart. Add lpuart device tree and duart device tree respectively for qds which are used with duart and lpuart console. Signed-off-by: Vabhav Sharma <vabhav.sharma@nxp.com> Signed-off-by: Yuantian Tang <andy.tang@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-29arm: dts: ls1028a: add lpuart nodesYuantian Tang
Add lpuart nodes to enable lpuart feature Signed-off-by: Vabhav Sharma <vabhav.sharma@nxp.com> Signed-off-by: Yuantian Tang <andy.tang@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-29arm: dts: ls1088ardb: add DPMAC and PHY nodesIoana Ciornei
In order to maintain compatibility with the Linux DTS, the entire fsl-mc node is added but instead of being probed by a dedicated bus driver it will be a simple-mfd. Also, annotate the external MDIO nodes and describe the PHYs (8 x VSC8514, AQR105). Also, add phy-handles for the dpmacs to their associated PHY. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-29arm: dts: ls2088ardb: add DPMAC and PHY nodesIoana Ciornei
In order to maintain compatibility with the Linux DTS, the entire fsl-mc node is added but instead of being probed by a dedicated bus driver it will be a simple-mfd. Also, annotate the external MDIO nodes and describe the PHYs (4 x AQR405 and 4 x CS4340). Also, add phy-handles for the dpmacs to their associated PHY. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-29arm: dts: lx2160ardb: add DPMAC and PHY nodesIoana Ciornei
In order to maintain compatibility with the Linux DTS, the entire fsl-mc node is added but instead of being probed by a dedicated bus driver it will be a simple-mfd. Also, annotate the EMDIO1 node and describe the 2 AR8035 RGMII PHYs and the 2 AQR107 PHYs. Also, add phy-handles for the dpmacs to their associated PHY. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-29arm: dts: ls1088a: add external MDIO nodesIoana Ciornei
Add the External MDIO1 device node found in the WRIOP global memory region. This is needed for management of external PHYs. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-29arm: dts: ls2088a: add external MDIO nodesIoana Ciornei
Add the External MDIO1 device node found in the WRIOP global memory region. This is needed for management of external PHYs. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-29arm: dts: lx2160a: add external MDIO nodesIoana Ciornei
Add the External MDIO device nodes found in the WRIOP global memory region. This is needed for management of external PHYs. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-29arm: dts: rockchip: px30: add and enable rng nodeLin Jinhan
Add enable rng node in px30-evb-u-boot.dtsi. Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-04-29arm: dts: rockchip: rk3399: add and enable rng nodeLin Jinhan
Add rng node in rk3399-u-boot.dtsi and enable it in rk3399-evb-u-boot.dtsi. Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com> Tested-by: Peter Robinson <pbrobinson@gmail.com> Reviewed-by: Sughosh Ganu <sughosh.ganu@linaro.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-04-29ARM: dts: rmobile: Scrub unused DT nodesMarek Vasut
Remove DT nodes which are not used by U-Boot, like audio and video in/out nodes. This saves about 35 kiB on the resulting U-Boot binary without any impact on functionality. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2020-04-28Convert CONFIG_PHYLIB et al to KconfigTom Rini
This converts the following to Kconfig: CONFIG_PHYLIB CONFIG_BITBANGMII CONFIG_MV88E6352_SWITCH CONFIG_MV88E61XX_SWITCH CONFIG_PHYLIB_10G CONFIG_PHY_AQUANTIA CONFIG_PHY_ATHEROS CONFIG_PHY_BROADCOM CONFIG_PHY_CORTINA CONFIG_PHY_DAVICOM CONFIG_PHY_ET1011C CONFIG_PHY_LXT CONFIG_PHY_MARVELL CONFIG_PHY_MICREL CONFIG_PHY_NATSEMI CONFIG_PHY_REALTEK CONFIG_RTL8211X_PHY_FORCE_MASTER CONFIG_PHY_SMSC CONFIG_PHY_TERANETICS CONFIG_PHY_TI CONFIG_PHY_VITESSE CONFIG_PHY_XILINX Signed-off-by: Tom Rini <trini@konsulko.com>
2020-04-28ARM: dts: rmobile: Synchronize Gen3 DTs with Linux 5.6.2Marek Vasut
Synchronize R-Car Gen3 device trees with Linux 5.6.2, commit 9fbe5c87eaa9b72db08425c52c373eb5f6537a0a . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2020-04-28ARM: dts: rmobile: Synchronize Gen2 DTs with Linux 5.6.2Marek Vasut
Synchronize R-Car Gen2 device trees with Linux 5.6.2, commit 9fbe5c87eaa9b72db08425c52c373eb5f6537a0a . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2020-04-28Merge tag 'u-boot-amlogic-20200428' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic - fix sd-emmc controller A init on G12A/G12B/SM1 SoCs - add GXBB USB PHY driver - enable access to SPI NOR Flash on VIM2 and VIM3/VIM3L boards - fix USB PHYs Power-Up on on VIM3/VIM3L boards
2020-04-28rockchip: px30-evb: remove redundant include fileKever Yang
The file <board name>-u-boot.dtsi inculde automatically by the build system, no need to add this to dts file. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2020-04-28rockchip: px30: add -u-boot dtsi for socKever Yang
Add soc level -u-boot.dtst so that boards can share the common nodes. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2020-04-28fsl-layerscape: Move GIC RD tables init to soc.cHou Zhiqiang
Move GIC redistributor tables initialization to CPU setup function. This patch introduces a GIC redistributor tables init function, and moves the function of reserving memory for GIC redistributor tables to soc.c and adds a argument for the memory size to reserve, BTW rename the function so that it is more readable. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Wasim Khan <wasim.khan@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-28fsl-layerscape: Kconfig: Select RESV_RAM if GIC_V3_ITSHou Zhiqiang
The GIC redistributor tables initialization depends on RESV_RAM config, so select RESV_RAM if GIC_V3_ITS is enabled. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Wasim Khan <wasim.khan@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-28fsl-layerscape: Add RESV_RAM check in resv_ram addrHou Zhiqiang
The initialization of gd->arch.resv_ram pointer should depend on if the RESV_RAM config is enabled. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Wasim Khan <wasim.khan@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-28arm: dts: rockchip: rk3399-roc-pc: Enable FE1.1 USB 2.0 HUB on roc-rk3399-pcSuniel Mahesh
roc-rk3399-pc has an FE1.1 USB 2.0 HUB which connects two USB ports (HOST1 and HOST2). For end devices to work we need to enable USB hub so that HOST detects there presence and enumerates them accordingly. This requires explicit pinctrl within gpio enablement. Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-04-28arm: dts: meson-khadas-vim3: enable SPI NOR flashNeil Armstrong
Enable the SPI flash controller and reduce the usable eMMC data pins to 4 to permit using the on-board SPI NOR Flash. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-04-28arm: dts: meson-gxm-khadas-vim2-u-boot: enable SPI NOR flashNeil Armstrong
Activate the on-board SPI NOR Flash by enabling the SPI controller and disabling the DS eMMC pin in the VIM2 u-boot.dtsi file. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-04-28arm64: dts: meson: sync dt and bindings from v5.7-rc1Neil Armstrong
Sync the device tree and dt-bindings from Linux v5.7-rc1 8f3d9f354286 ("Linux 5.7-rc1"). Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-04-27ARM: zynq: Add nand controller node in zynq-ces-nand dtT Karthik Reddy
Add memory-controller@e000e000 node in zynq-ces-nand.dts as zynq_nand driver utilizes flash@e1000000 node. Without this dt node mini nand u-boot does not probe. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-27arm64: zynqmp: Fix irps5401 device nodesMichal Simek
- Do not use irps54012 as device node which is not correct. - Fix addresses of irps5401/u180 on zcu104 revisions. - Remove clock-cells property. It is PMIC without any clock output. - Define irps5401 nodes in zynqmp-e-a2197 Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-27arm64: zynqmp: Add label to GPIO lines for boot mode and PORSaeed Nowshadi
Add label to GPIO lines controlling boot mode and POR EMIO pins so System Controller can assert those lines on Versal. Signed-off-by: Saeed Nowshadi <saeed.nowshadi@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-27ARM: zynq: Setup stack size via KconfigMichal Simek
Stack size has been introduced by commit a69814c815b9 ("arm64: zynqmp: Set initrd_high to as high as possible") and commit 085201c246ee ("arm64: versal: Set initrd_high to as high as possible") to support setting up initrd_high as high as possible. The same change should happen for Zynq because the code is moved to xilinx common location. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-27arm: socfpga: stratix10: Fix incorrect CLKMGR_S10_PERPLL_BYPASS offsetLey Foon Tan
Offset value for CLKMGR_S10_PERPLL_BYPASS should be 0xb0, fix it. Reported-by: Chee Hong Ang <chee.hong.ang@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2020-04-24arm: add Cubieboard7 board supportAmit Singh Tomar
The Cubieboard is a single board computer containing a Actions S700 SoC(with 4 ARMv8 Cortex-A53 cores). This patch adds respective defconfig alongwith .dts(copied from Linux v5.5-rc6 with hash "b3a987b0264d"). Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
2020-04-24actions: Move defconfig options to KconfigAmit Singh Tomar
This patch moves some of the config options from bubblegum_96_defconfig to respective Kconfig files. Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
2020-04-24arm: add support Actions Semi S700Amit Singh Tomar
This patch adds basic support for Actions Semi based S700 SoC, which is driven by common owl framework. Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
2020-04-24arm: dts: actions: s700: add u-boot specific dtsi fileAmit Singh Tomar
Devices like uart and clk are needed to be enabled before relocation. this patch adds u-boot.dtsi file that mark these device as dm-pre-reloc. Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
2020-04-24arm: actions: add S700 SoC device treeAmit Singh Tomar
This patch adds .dtsi file(sync with Linux 5.5-rc6 with hash "b3a987b0264d") and required binding for S700 SoC that is a 64-bit Quad-core ARM Cortex-A53 cores. It also provisions dts file to be built based on selected platform(CONFIG_MACH_S900/S700). Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
2020-04-24clk: actions: Add common clock driverAmit Singh Tomar
This patch converts S900 clock driver to something common that can be used for other SoCs, for instance S700(few of clk registers are same). Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
2020-04-24arm: dts: actions: s900: add u-boot specific dtsi fileAmit Singh Tomar
Devices like uart and clk are needed to be enabled before relocation. This patch adds u-boot.dtsi file that mark these device as dm-pre-reloc. Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
2020-04-24arm: dts: sync dts for Action Semi S900Amit Singh Tomar
Synchronize device tree bindings with v5.5-rc6 tag with commit id "b3a987b0264d". Also, it removes older clock binding defined for S900 along with undocumented compatible string "actions,s900-serial" from serial driver and adapts clock driver to cater to new bindings. Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
2020-04-24arm: actions: rename sysmap-s900 to sysmap-owlAmit Singh Tomar
Now that memory maps(for both S700 and S900 SoCs) can be managed using a common file, rename sysmap-s900 to sysmap-owl to reflect the same. Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
2020-04-24arm: actions: Add common framework for Actions Owl Semi SoCsAmit Singh Tomar
This commit adds common arch support for Actions Semi Owl series SoCs and removes the Bubblegum96 board files. Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
2020-04-24common/board_f: Make reserve_mmu genericOvidiu Panait
Introduce arch_reserve_mmu to allow for architecture-specific reserve_mmu routines. Also, define a weak nop stub for it. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-24arm: asm/cache.c: Introduce arm_reserve_mmuOvidiu Panait
As a preparation for turning reserve_mmu into an arch-specific variant, introduce arm_reserve_mmu on ARM. It implements the default routine for reserving memory for MMU TLB and needs to be weakly defined in order to allow for machines to override it. Without this decoupling, after introducing arch_reserve_mmu, there would be two weak definitions for it, one in common/board_f.c and one in arch/arm/lib/cache.c. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-24common/board_f: Move arm-specific reserve_mmu to arch/arm/lib/cache.cOvidiu Panait
Move the ARM-specific reserve_mmu definition from common/board_f.c to arch/arm/lib/cache.c. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-24Merge tag 'u-boot-stm32-20200424' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-stm - Solve stm32mp15 pinctrl dts issue (patch conflict in branches master and next) - Split device tree for DHCOR Som and AV 96 board - Update PLL4 setting in AV96 board - Enable bootd, iminfo, imxtract on DHCOM
2020-04-24qemu: don't allow to select 32- and 64-bitHeinrich Schuchardt
TARGET_QEMU_ARM_64BIT and TARGET_QEMU_ARM_32BIT should be mutually exclusive. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-04-24ARM: dts: stm32: Split AV96 into DHCOR SoM and AV96 boardMarek Vasut
The AV96 is in fact an assembly of DH Electronics DHCOR SoM on top of an AV96 reference board. Split the DTs to reflect that and make sure to DHCOR SoM can be reused on other boards easily. It is also highly recommended to configure the board for the DHCOM make stm32mp15_dhcom_basic_defconfig make DEVICE_TREE=stm32mp15xx-dhcor-avenger96 as that permits reusing the board code for the DH components, like accessing and reading out the ethernet MAC from EEPROM. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Patrice Chotard <patrice.chotard@st.com> Change-Id: I7db47280d4eb0d668eb4e006355240271154f97f
2020-04-24ARM: dts: stm32: Adjust PLL4 settings on AV96Marek Vasut
The PLL4 is supplying SDMMC12, SDMMC3 and SPDIF with 120 MHz and FDCAN with 96 MHz. This isn't good for the SDMMC interfaces, which can not easily divide the clock down to e.g. 50 MHz for high speed SD and eMMC devices, so those devices end up running at 30 MHz as that is 120 MHz / 4. Adjust the PLL4 settings such that both PLL4P and PLL4R run at 100 MHz instead, which is easy to divide to 50MHz for optimal operation of both SD and eMMC, SPDIF clock are not that much slower and FDCAN is also unaffected. Reviewed-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Marek Vasut <marex@denx.de> Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-04-24ARM: dts: stm32mp1: remove file stm32mp157-pinctrl.dtsiPatrick Delaunay
Remove the unnecessary file stm32mp157-pinctrl.dtsi and solve all issues introduced by the commit 891483186052b2598 ("Merge branch 'next'") after a conflict on the patch applied in the next branch in commit 1a4f57c895cc ("ARM: dts: stm32mp1: DT alignment with Linux 5.6-rc1") Need to reapplied on stm32mp15-pinctrl.dtsi the the 3 patches applied previously on file "stm32mp157-pinctrl.dtsi" in v2020.04 - commit 4fdbe6487daa ("ARM: dts: stm32: Add alternate pinmux for SDMMC1 direction pins")' - commit 5fdcba64027f ("ARM: dts: stm32: Add alternate pinmux for SDMMC2 pins 4-7")' - commit 955de5111112 ("ARM: dts: stm32: Add alternate pinmux for ethernet RGMII")' Cc: Marek Vasut <marex@denx.de> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-04-22Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvellTom Rini
- mvebu bubt cmd: Add A38x support (Joel) - Clearfog: Fix SCSI boot duplication (Joel) - Armada-37xx: Fix DDR PHY clock divider values (Marek)
2020-04-22Merge tag 'mmc-2020-4-22' of https://gitlab.denx.de/u-boot/custodians/u-boot-mmcTom Rini
- iproc_sdhci memory leak fix and enable R1B resp quirk - more mmc cmds and several mmc updates from Heinirich - Use bounce buffer for tmio sdhci - Alignment check for tmio sdhci
generated by cgit (git 2.34.1) at 2025-01-30 20:13:39 +0000