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This syncs up the current cmd/Kconfig and include/configs/ files with the
only exception being CMD_NAND. Due to how we have used this historically
we need to take further care here when converting.
Signed-off-by: Tom Rini <trini@konsulko.com>
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PH1-LD20 does not support 1.8V signaling for SD card; only Default
Speed and High Speed (up to 50MHz) with 3.3V signaling is supported.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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This is the first ARMv8 SoC from Socionext Inc.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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The current table look-up for the DTB file name turned out bothersome
in terms of maintainability; I ended up adding a new entry every time
a new board is supported.
There is a common pattern between the DT compatible string and the
corresponding file name; drop the vendor prefix "socionext," and
prefix it with "uniphier-" and suffix it with ".dtb".
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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No need to stop booting U-Boot even if boot mode is unknown.
Setting the "bootmode" environment is only useful for booting
Linux Kernel. Anyway, U-Boot has already booted by this point.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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For PH1-LD20 or later, per-pin input-enable control is supported,
that is, we need to set-up IECTRL registers for a group of pins.
This helper function will be useful for a bunch of register settings.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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Currently, fdtgrep would not accept uniphier-ph1-ld20-ref.dtb
and uniphier-ph1-ld11-ref.dtb unless the aliases node comes
the first in the root node.
$ make -s uniphier_pxs2_ld6b_defconfig
$ make CROSS_COMPILE=arm-linux-gnueabi- DEVICE_TREE=uniphier-ph1-ld20-ref
[snip]
LDS spl/u-boot-spl.lds
LD spl/u-boot-spl
OBJCOPY spl/u-boot-spl-nodtb.bin
FDTGREP spl/u-boot-spl.dtb
Error at 'fdt_find_regions': FDT_ERR_BADLAYOUT
/aliases node must come before all other nodes
Error: FDT_ERR_BADMAGIC
make[1]: *** [spl/u-boot-spl.dtb] Error 1
make: *** [spl/u-boot-spl] Error 2
This commit moves the aliases node as the error message from the
fdtgrep tool suggests, although this requirement does not sound
reasonable to me.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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This makes the EEPROM device on the Reference Daughter board
available.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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Because DT properties are 4-byte aligned, the pointer access
*(fdt64_t *) in this code causes unaligned access.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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This enables full ethernet usage, including U-Boot to write the board
specific MAC address (ethaddr) into the DT blob before passing it to
Linux.
Without this, the ethaddr is not detected in U-Boot at all, resulting
in this error upon bootup:
...
Model: EBV SOCrates
Net:
Error: ethernet@ff702000 address not set.
No ethernet found.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Chin Liang See <clsee@altera.com>
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Fix a small typo in some of the SoCFPGA dts files that has spread via
copy-and-paste.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Chin Liang See <clsee@altera.com>
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Add support for Technexion's PICO-IMX6UL-EMMC board.
For information about this board, please visit:
http://www.technexion.com/products/pico/pico-som/pico-imx6-emmc
Signed-off-by: Richard Hu <richard.hu@technexion.com>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
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Define the UART6_BASE_ADDR for MX6UL.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
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Due to incorrect placement of the clock gate cell in the ldb_di[x]_clk tree,
the glitchy parent mux of ldb_di[x]_clk can cause a glitch to enter the
ldb_di_ipu_div divider. If the divider gets locked up, no ldb_di[x]_clk is
generated, and the LVDS display will hang when the ipu_di_clk is sourced from
ldb_di_clk.
To fix the problem, both the new and current parent of the ldb_di_clk should
be disabled before the switch. This patch ensures that correct steps are
followed when ldb_di_clk parent is switched in the beginning of boot.
This patch was ported from the 3.10.17 NXP kernel
http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/commit/?h=imx_3.10.17_1.0.1_ga&id=eecbe9a52587cf9eec30132fb9b8a6761f3a1e6d
NXP errata number: ERR009219, EB821
Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
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The echo -ne "\xNN" does not work in certain bourne-compatible shells, like
dash. The recommended way of hex->char conversion is using printf(1), but
there is a pitfall here. The GNU printf does support "\xNN" format, but
according to the opengroup documentation, this is not part of POSIX. The
POSIX printf only defines "\NNN" where N is octal. Thus, for the sake of
compatibility, we use that.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
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The current code in ARMv8's lowlevel_init() skips the per-CPU GIC
initialization ifndef CONFIG_ARMV8_MULTIENTRY. However, the per-CPU init
should always occur; it's just the one-time init that should only happen
on the master.
Once this consideration is taken into account, the only difference between
the paths when CONFIG_ARMV8_MULTIENTRY is undefined/defined is the use of
branch_if_slave. Naively, any unified code would need to invoke this
conditionally upon ifdef CONFIG_ARMV8_MULTIENTRY. However, branch_if_slave
already checks CONFIG_ARMV8_MULTIENTRY and does nothing if it isn't
defined, so we don't even need that ifdef at the call site.
Reported-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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commit 62c5674ea136a ("omap: SPL boot devices cleanup and completion")
cleans up the boot device ids for amx3xx soc. But mistakenly updates wrong
device IDs for AM43xx USB. Fixing the same here.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
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dt binding docs
As per mmc device tree binding documentation card detect gpio has
to be active low signal. When a hardware is designed with active
high card detect, gpio polarity has to be changed with
cd-inverted dt property.
In DRA72x and AM57xx EVMs the card detect gpio is designed as
active low gpio. So correcting the dt card detect gpio
definition.
Also adding card-detect gpio for DRA74x EVM.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
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binding docs
As per mmc device tree binding documentation card detect gpio has
to be active low signal. When a hardware is designed with active
high card detect, gpio polarity has to be changed with
cd-inverted dt property.
In AM43xx the card detect gpio is designed as active low gpio.
So correcting the dt card detect gpio definition.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
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Move all the gpio definitions to driver file as
there is no use of them in other files.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Remove non driver model support as it moved
to driver model. Dont need non driver model
anymore.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Enable DM GPIO and ZYNQ GPIO using kconfig instead of the board
config file.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Support ZynqMP zc1751 with DC cards.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Add new board support.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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There are mini configurations which need to be fit to OCM that's why
these options shouldn't be enabled by default.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Add missing nand node for ep108.
Signed-off-by: Punnaiah Choudary Kalluri <punnaia@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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This patch adds the sata port phy OOB timing values in the sata
device-tree node.
Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Enable option to support more then 4GB memories in single size block.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Use the same binding as is used in mainline Linux kernel.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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For run time serdes adjustment.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Separate register space and put it on more lines.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Add some default properties to zynqmp.dtsi.
Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Reflect actual silicon addresses in DT node names.
Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Use right addresses for channel names
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Mainline kernel has no r1p12 compatible string that's why console stops
to work with the latest DTS files. Append generic compatible string.
Keep in your mind that using this generic compatible string not all uart
features will be available.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Modifying device tree node to support legacy interrupts.
Signed-off-by: Bharat Kumar Gogada <bharatku@xilinx.com>
Signed-off-by: Ravi Kiran Gummaluri <rgummal@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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GPIO driver supports an input interrupt that's why gpio node itself can
be labeled as interrupt controller.
Reported-by: John Linn <linnj@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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This patch adds ddrc memory controller node in dts.
size mentioned in dts is 0x30000, because we need to access DDR_QOS
INTR registers located at fd090208 from this driver.
Signed-off-by: Naga Sureshkumar Relli <nagasure@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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ZynqMP DMA's main clock and apb clock are added
in zynqmp DT.
Signed-off-by: VNSL Durga <vnsldurg@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Punnaiah Choudary Kalluri <punnaia@xilinx.com>
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Add CCI-400 node to DTSI.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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ZynqMP is not using global interrupt-parent setting that's why
it has to be listed in every node separately. PMU node missed it and
this patch is adding it.
Reported-by: John Linn <John.Linn@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Add power-domains to the DT and attach devices to them.
The power-domains are all logical domains as understood by firmware.
Each PD is identified by a unique identifier that the platform firmware
understands.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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This patch adds broken-tuning property to SD and
eMMC nodes.
Signed-off-by: P L Sai Krishna <lakshmis@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Remove jumbo properties which are handled in the driver directly
and use mainline compatible string which is already handled by the
driver.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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