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2019-04-12power: stpmu1: rename files to stpmic1Patrick Delaunay
Prepare file modification for kernel alignment and rename driver to stpmic1. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
2019-04-12stm32mp1: Replace OTP read by SHADOW readPatrick Delaunay
Replace STM32_BSEC_OTP() by STM32_BSEC_SHADOW() to increase read performance. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-04-12stm32mp1: bsec: shadow all the upper OTP (no secure) during bootPatrick Delaunay
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-04-12stm32mp1: bsec: use device tree new compatiblePatrick Delaunay
Update bsec driver to use the device tree provided by Kernel. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-04-12stm32mp1: basic boot: SPL enable access to GPIOZ bankPatrick Delaunay
SPL need to set GPIOZ_SECCFGR = 0 to enable access to GPIOZ bank (open security). Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-04-12stm32mp1: align serial number on bootromPatrick Delaunay
Always use upper case for serial number. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-04-12stm32mp1: add some syscon drivers for syscfg and etpzcPatrick Delaunay
Add SYSCON driver for syscfg and etpzc and reorder in alphabetics order Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-04-12stm32mp1: support forced boot modePatrick Delaunay
The boot mode can be forced by key press or by TAMP register, requested in kernel by syscon-reboot-mode tamp: tamp@5c00a000 { compatible = "simple-bus", "syscon", "simple-mfd"; reg = <0x5c00a000 0x400>; reboot-mode { compatible = "syscon-reboot-mode"; offset = <0x150>; /* reg20 */ mask = <0xff>; mode-normal = <0>; mode-fastboot = <0x1>; mode-recovery = <0x2>; mode-stm32cubeprogrammer = <0x3>; mode-ums_mmc0 = <0x10>; mode-ums_mmc1 = <0x11>; mode-ums_mmc2 = <0x12>; }; }; Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-04-12stm32mp1: spl: hang with trace when DDR init failedPatrick Delaunay
When DDR initialization failed, print error message and stop the SPL execution. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-04-12stm32mp1: cosmetic: add comment on psci_migrate_info_type return valuePatrick Delaunay
Add explaination for the return value of psci_migrate_info_type: 2 = Trusted OS. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-04-12stm32mp1: cosmetic cleanup KconfigPatrick Delaunay
Cosmetic cleanup in mach-stm32mp Kconfig - remove duplicated SPL_DRIVERS_MISC_SUPPORT - update help for TARGET_STM32MP1 - set value for NR_DRAM_BANKS - remove one comment as DEBUG_UART is deactivated by default - include board Kconfig at the end of the file Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-04-12stm32mp1: spl: add spl_display_printPatrick Delaunay
SPL displays the board model from device tree. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-04-12stm32mp1: update print_cpuinfo()Patrick Delaunay
Display CPU part number and package information. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-04-12stm32mp1: update boot mode managementPatrick Delaunay
- export the function get_bootmode() and reused it in spl code - manage uart instance by alias (prepare v4.19 binding) - solve issue on nand instance - restore console for uart boot Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-04-12stm32mp1: add runtime information in environmentPatrick Delaunay
Set board name with the first dts compatible found in DT code under CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG The result with DEVICE_TREE=stm32mp157c-ev1 is: STM32MP> env print board=stm32mp1 board_name=stm32mp157c-ev1 Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-04-12stm32mp1: display board informationPatrick Delaunay
Implement checkboard() function to display - the boot chain used: basic or trusted - the board compatible in device tree - the board identifier and revision, saved in OTP59 for ST boards Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-04-12stm32mp1: bsec: access with SMC for trusted bootPatrick Delaunay
As BSEC is secure aware, all register access need to be done by TF-A for TRUSTED boot chain, when U-Boot is executed in normal world. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-04-12stm32mp1: add trusted boot with TF-APatrick Delaunay
Add support of trusted boot, using TF-A as first stage bootloader, The boot sequence is BootRom >=> TF-A.stm32 (clock & DDR) >=> U-Boot.stm32 The TF-A monitor provides secure monitor with support of SMC - proprietary to manage secure devices (BSEC for example) - PSCI for power The same device tree is used for STMicroelectronics boards with basic boot and with trusted boot. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-04-09arm: at91: Add gardena-gateway-at91sam supportStefan Roese
The GARDENA smart Gateway boards are equipped with an Atmel / Microchip AT91SAM9G25 SoC and with 128 MiB of RAM and 256 MiB of NAND storage. This patch adds support for this board including SPL support. Therefore the AT91Boostrap is not needed on this platform any more. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Andreas Bießmann <andreas@biessmann.org> Cc: Eugen Hristev <eugen.hristev@microchip.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2019-04-09arm: at91: at91sam9x5.dtsi: Add watchdog handleStefan Roese
This makes it possible to reference the watchdog DT node via "&watchdog" from board dts files. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Andreas Bießmann <andreas@biessmann.org> Cc: Eugen Hristev <eugen.hristev@microchip.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2019-04-09arm: at91: arm926ejs/u-boot-spl.lds: Add _image_binary_end to SPL ldsStefan Roese
This patch adds _image_binary_end to the SPL linker script. This will be used be the upcoming GARDENA AT91SAM based platform, which uses DT in SPL and configures CONFIGURE_SPL_SEPARATE_BSS. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Andreas Bießmann <andreas@biessmann.org> Cc: Eugen Hristev <eugen.hristev@microchip.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2019-04-09arm: at91: Enable watchdog supportStefan Roese
This patch enables and starts the watchdog on the AT91 platform if configured. The WD timeout value is read in the AT91 WD device driver from the DT, using the "timeout-sec" DT property. If not provided in the DT, the default value of 2 seconds is used. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Andreas Bießmann <andreas@biessmann.org> Cc: Eugen Hristev <eugen.hristev@microchip.com>
2019-04-09arm: at91: spl_at91.c: Call spl_early_init() if OF_CONTROL is enabledStefan Roese
This patch adds a call to spl_early_init() to board_init_f() which is needed when CONFIG_SPL_OF_CONTROL is configured. This is necessary for the early SPL setup including the DTB setup for later usage. Please note that this call might also be needed for non SPL_OF_CONTROL board, like the smartweb target. But smartweb fails to build with this call because its binary grows too big. So I disabled it for these kind of targets for now. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Andreas Bießmann <andreas@biessmann.org> Cc: Eugen Hristev <eugen.hristev@microchip.com> Reviewed-by: Heiko Schocher <hs@denx.de> Tested on the taurus board: Tested-by: Heiko Schocher <hs@denx.de>
2019-04-09arm: at91: Makefile: Compile lowlevel_init only when really necessaryStefan Roese
Make sure that lowlevel_init is not compiled when CONFIG_SKIP_LOWLEVEL_INIT_ONLY is configured. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Andreas Bießmann <andreas@biessmann.org> Cc: Eugen Hristev <eugen.hristev@microchip.com> Reviewed-by: Heiko Schocher <hs@denx.de> Tested on the taurus board: Tested-by: Heiko Schocher <hs@denx.de>
2019-04-09board: pm9g45: Migrate to CONFIG_DMIlko Iliev
Migrate the following options to CONFIG_DM: CONFIG_DM_GPIO CONFIG_DM_MMC CONFIG_DM_ETH CONFIG_DM_SERIAL CONFIG_DM_USB Signed-off-by: Ilko Iliev <iliev@ronetix.at>
2019-04-09ARM: at91: sama5d2: Wrap cpu detection to fix macb driverAlexander Dahl
When introducing the SAMA5D27 SoCs, the SAMA5D2 series got an additional chip id. The check if the cpu is sama5d2 was changed from a preprocessor definition (inlining a call to 'get_chip_id()') to a C function, probably to not call get_chip_id twice? That however broke a check in the macb ethernet driver. That driver is more generic and also used for other platforms. I suppose this solution was implemented to use it in 'gem_is_gigabit_capable()', without having to stricly depend on the at91 platform: #ifndef cpu_is_sama5d2 #define cpu_is_sama5d2() 0 #endif That only works as long as cpu_is_sama5d2 is a preprocessor definition. (The same is still true for sama5d4 by the way.) So this is a straight forward fix for the workaround. The not working check on the SAMA5D2 CPU lead to an issue on a custom board with a LAN8720A ethernet phy connected to the SoC: => dhcp ethernet@f8008000: PHY present at 1 ethernet@f8008000: Starting autonegotiation... ethernet@f8008000: Autonegotiation complete ethernet@f8008000: link up, 1000Mbps full-duplex (lpa: 0xffff) BOOTP broadcast 1 BOOTP broadcast 2 BOOTP broadcast 3 BOOTP broadcast 4 BOOTP broadcast 5 BOOTP broadcast 6 BOOTP broadcast 7 BOOTP broadcast 8 BOOTP broadcast 9 BOOTP broadcast 10 BOOTP broadcast 11 BOOTP broadcast 12 BOOTP broadcast 13 BOOTP broadcast 14 BOOTP broadcast 15 BOOTP broadcast 16 BOOTP broadcast 17 Retry time exceeded; starting again Notice the wrong reported link speed, although both SoC and phy only support 100 MBit/s! The real issue on reliably detecting the features of that cadence ethernet mac IP block, is probably more complicated, though. Fixes: 245cbc583d ("ARM: at91: Get the Chip ID of SAMA5D2 SiP") Signed-off-by: Alexander Dahl <ada@thorsis.com>
2019-04-08arm: sunxi: Enable DM_MMC on required SoCsJagan Teki
Enabling DM_MMC is forcing CONFIG_BLK=y so if any board which uses SCSI must need to enable DM_SCSI otherwise SCSI reads on that particular target making invalid reading to the disk drive. Allwinner platform do support SCSI on A10, A20 and R40 SoC's out of these only A10 have DM_SCSI enabled. So enabling DM_MMC on A20, R40 would eventually end-up with scsi disk read failures like [1] So, enable DM_MMC in all places of respective SoC's instead of enabling them globally to Allwinner platform. Now, DM_MMC is enabled in Allwinner SoC's except A20 and R40. [1] https://lists.denx.de/pipermail/u-boot/2019-April/364057.html Reported-by: Pablo Sebastián Greco <pgreco@centosproject.org> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-04-08dts: imx8qxp-mek: Add PHY post reset delayAndrejs Cainikovs
PHY cannot be detected unless we wait about 150 ms. Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@netmodule.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Stefano Babic <sbabic@denx.de> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-04-05Merge tag 'u-boot-imx-20190405' of git://git.denx.de/u-boot-imxTom Rini
Fixes for 2019.04 - fix bashism for MX8 - fix ethernet for MX53 - fix docs for i.MX8
2019-04-02DTS: Fix ETH PHY reset on HSC|DDC boards (imx53)Lukasz Majewski
After the commit: "eth: dm: fec: Add gpio phy reset binding" SHA1: efd0b791069af93e9d439a70d1fe2ae8994dbbfa The FEC ETH driver switched to PHY GPIO reset performed with data defined in DTS. For the HSC|DDC boards the GPIO reset signal is active low and hence the wrong DTS description must be changed (otherwise the reset for ETH is not properly setup). Signed-off-by: Lukasz Majewski <lukma@denx.de>
2019-04-01Merge branch 'master' of git://git.denx.de/u-boot-shTom Rini
Minor fixes for the Alt board and PHY use on Gen2.
2019-03-30ARM: dts: rmobile: Activate I2C7 on AltMarek Vasut
Activate I2C7 on Alt to allow access to the PMIC. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-03-29Revert "rockchip: Drop call to rockchip_dnl_mode_check() for now"Philipp Tomsich
Due to a final resolution not coming up in time for 2019.04 and following the consensus on the discussion, we'll keep this around for 2019.04 after all. This reverts commit 0d968ceb1ff63b0d220a571f438f0d5fe6350e88.
2019-03-26Merge branch 'master' of git://git.denx.de/u-boot-shTom Rini
- Various fixes for bugs found by u-boot test.py
2019-03-25Convert CONFIG_ENV_SPI_* to KconfigPatrick Delaunay
This converts the following to Kconfig: CONFIG_ENV_SPI_BUS CONFIG_ENV_SPI_CS CONFIG_ENV_SPI_MAX_HZ CONFIG_ENV_SPI_MODE Most of time these value are not needed, CONFIG_SF_DEFAULT with same value is used, so I introduced CONFIG_USE_ENV_SPI_* to force the associated value for the environment. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-03-25exynos: replace CONFIG_ENV_SPI_BASE by CONFIG_SYS_SPI_BASEPatrick Delaunay
Replace CONFIG_ENV_SPI_BASE by the better CONFIG_SYS_SPI_BASE (it is not the location for environment but the location for U-Boot) and, as it is the only platform with use this define, remove it from whitelist. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-03-25ARM: dts: rmobile: Increase off-on delay on the SD Vcc regulatorMarek Vasut
An ADATA 16GB Industrial MLC card has so much capacitance on the Vcc pin that the usual toggling of regulator to power the card off and on is insufficient. When the card is calibrated into UHS SDR104 mode, it will remain in that mode across the power cycle and subsequent attempt to communicate with the card will fail. The test with this card is to insert it into an SDHI slot and perform "mmc dev 0 ; mmc dev 0", where the second "mmc dev 0" will fail. Fix this problem by increasing the off-on delay from 0 to 20 mS. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-03-22ARM: fix arch/arm/dts/MakefileMasahiro Yamada
Since commit 27cb7300ffda ("Ensure device tree DTS is compiled"), build succeeds irrespective of the correctness of Makefile. In fact, you can compile any defconfig without adding any entry in arch/*/dts/Makefile. As a result, a lot of wrong code have been merged unnoticed. I am going to revert that commit, and lots of hidden issues have come to light: [1] Typos armada-3720-uDPU.dts, sun8i-a83t-tbs-a711.dts use the extension ".dts" instead of ".dtb" [2] DTB is associated to undefined CONFIG option For example, mx6sllevk_defconfig defines CONFIG_MX6SLL, but associates its device tree to CONFIG_MX6SL, which is undefined. [3] Lots of entries are missing Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Chris Packham <judge.packham@gmail.com> [trini: add imx6ul pico dtbs] Signed-off-by: Tom Rini <trini@konsulko.com>
2019-03-22armv8: Disable exception vectors in SPL by defaultAlexander Graf
Commit 1416e2d2253 ("armv8: make SPL exception vectors optional") had a typo in it which effectively disabled exception handling in SPL code always. Since nobody complained, I guess we may as well disable exception handling in SPL always by default. So fix the bug to make the config option effective, but disable exception handling in SPL by default. This gets us to the same functionality as before by default, but with much less code included in the binary. Signed-off-by: Alexander Graf <agraf@suse.de> Reviewed-by: Matthias Brugger <mbrugger@suse.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
2019-03-22arm: lib: bootm: Push the Starting kernel print to the endKeerthy
Push the Starting kernel print to the end just before the dm_remove_devices call. Signed-off-by: Keerthy <j-keerthy@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2019-03-19Merge git://git.denx.de/u-boot-marvellTom Rini
- Enable network interface on clearfog_gt_8k (Baruch) - Fix dreamplug boot by adding an spi0 alias to the DT (Chris) - Fix / enhance Marvell ddr3 setup / parameters (Chris) - Change CONFIG_SYS_MALLOC_F_LEN to 0x2000 on db-88f6820-amc (Chris) - Enable SPL_FLASH_BAR on db-88f6820-amc (Chris) - Use correct pcie controller name in Armada-38x dts files (Chris) - Disable d-cache on Kirkwood platforms as currently needed (Chris) - Add a more descriptive comment to pci_mvebu.c (Stefan) - Update Marvell maintainers entry (Stefan)
2019-03-19Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini
2019-03-19ARM: kirkwood: disable dcache for Kirkwood boardsChris Packham
Prior to commit 93b283d49f93 ("ARM: CPU: arm926ejs: Consolidate cache routines to common file") the kirkwood boards didn't have and dcache support. The network and usb drivers rely on this. Set CONFIG_SYS_DCACHE_OFF in the Kirkwood specific config.h. Reported-by: Leigh Brown <leigh@solinno.co.uk> Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
2019-03-19ARM: mvebu: use correct name for pcie controllerChris Packham
When armada-385.dtsi was sync'd from Linux the name of the node describing the pcie controller was changed from pcie-controller to pcie. Some of the boards that include armada-385.dtsi were missed in the update retaining the old name. This updates the affected boards. Reported-by: Влад Мао <vlaomao@gmail.com> Signed-off-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
2019-03-19ARM: kirkwood: add spi0 alias for dreamplugChris Packham
The conversion to DM_SPI managed to break accessing the environment on dreamplug. This is because the environment code relies on being to able to select the SPI device based on the sequence number. Add an alias so that the spi0 bus gets sequence number 0. Reported-by: Leigh Brown <leigh@solinno.co.uk> Signed-off-by: Chris Packham <judge.packham@gmail.com> Tested-by: Leigh Brown <leigh@solinno.co.uk> Signed-off-by: Stefan Roese <sr@denx.de>
2019-03-16ARM: dts: socfpga: Add missing altr,sysmgr-syscon for EMACLey Foon Tan
Syscon register is required in dts to select correct PHY interface. Fix error below: Net: Failed to get syscon: -2 Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2019-03-15Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini
- DPAA2 fixes and DDR errata workaround for LS1021A
2019-03-15armv7: ls102xa: Add workaround for DDR erratum A-008850Alison Wang
Barrier transactions from CCI400 need to be disabled till the DDR is configured, otherwise it may lead to system hang. The patch adds workaround to fix the erratum. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com> Signed-off-by: Alison Wang <alison.wang@nxp.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-03-14Merge branch 'master' of git://git.denx.de/u-boot-samsungTom Rini
2019-03-13arm: dts: imx6qdl-u-boot: Enable spba-bus@2000000 simple busAdam Ford
spba-bus has a few nodes under it including the UART1 and some ESPI buses. In order to use them in SPL, the u-boot,dm-spl flag needs to be added to the spba-bus@2000000 container. Signed-off-by: Adam Ford <aford173@gmail.com>
generated by cgit (git 2.34.1) at 2025-02-16 02:46:02 +0000