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2020-01-20ARM: dts: omap3/omap35 Torpedo and SOM-LV: Unify and shrink SPL dtbAdam Ford
None of these boards boot, but the solution appears to be the same. All the boards have SPL that is too large. With a few defconfig options removed, these corresponding options can be removed from their respective SPL dtb files. This patch unifies the DM37/OMAP35 boards' -u-boot.dtsi files to remove gpio's, i2c, bandgap, thermal zones, unneeded uarts, and unneeded MMC nodes. Signed-off-by: Adam Ford <aford173@gmail.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-01-20arm: K3: Increase default SYSFW image size allocationAndrew F. Davis
The memory allocated to store the FIT image containing SYSFW and board configuration data is statically defined to the largest size expected. This was 276000 bytes but now needs to be grown to 277000 to make room for the slightly larger SYSFW image used on J721e High-Security devices. Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-01-20arm: K3: Disable ROM configured firewallsAndrew F. Davis
ROM configures certain firewalls based on its usage, which includes the one in front of boot peripherals. In specific case of boot peripherals, ROM does not open up the full address space corresponding to the peripherals. Like in OSPI, ROM only configures the firewall region for 32 bit address space and mark 64bit address space flash regions as in-accessible. When security-cfg is initialized by sysfw, all the non-configured firewalls are kept in bypass state using a global setting. Since ROM configured firewalls for certain peripherals, these will not be touched. So when bootloader touches any of the address space that ROM marked as in-accessible, system raises a firewall exception causing boot hang. It would have been ideal if sysfw cleans up the ROM configured boot peripheral firewalls. Given the memory overhead to store this information provided by ROM and the boot time increase in re configuring the firewalls, it is concluded to clean this up in bootloaders. So disable all the firewalls that ROM doesn't open up the full address space. Signed-off-by: Andrew F. Davis <afd@ti.com> Signed-off-by: Venkateswara Rao Mandela <venkat.mandela@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-01-20arm: K3: Fix header comment match AM6 specific file functionAndrew F. Davis
This file used to be the common location for K3 init when AM6 was the only device, but common code was moved to common.c and this file became AM6 specific, correct this header text. Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-01-20arm: dts: k3-am654-r5-base-board: Fix power-domains for wkup_vtm0Lokesh Vutla
wkup_vtm populates only 1 power-domain cell in it's node. But the power-domain cell are defined as 2. Due to this the following warning comes during build: arch/arm/dts/k3-am654-r5-base-board.dtb: Warning (power_domains_property): /interconnect@100000/interconnect@28380000/interconnect@42040000/ wkup_vtm@42050000:power-domains: property size (8) too small for cell size 2 Fix this by updating the power-domain cells. Fixes: cfa6bd549c ("arm: dts: k3-am654-r5-base-board: Add VTM node") Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-01-20arm: mach-k3: security: Clean image out of cache before authenticationAndrew F. Davis
On K3 systems U-Boot runs on both an R5 and a large ARM cores (usually A53 or A72). The large ARMs are coherent with the DMA controllers and the SYSFW that perform authentication. And previously the R5 core did not enable caches. Now that R5 does enable caching we need to be sure to clean out any of the image that may still only be in cache before we read it using external DMA for authentication. Although not expected to happen, it may be possible that the data was read back into cache after the flush but before the external operation, in this case we must invalidate our stale local cached version. Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-01-20arm: mach-k3: Warn when node to disable is not foundAndrew F. Davis
Not finding a node that we try to disable does not always need to be fatal to boot but should at least print out a warning. Return error from fdt_disable_node as it did fail to disable the node, but only warn in the case of disabling the TRNG as this will not prevent boot. Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-01-20arm64: dts: k3-j721e-common-proc-board: Fully enable wkup_i2c0 useAndreas Dannenberg
Make the wkup_i2c0 module usable across all stages of U-Boot by adding the needed definitions including the associated pinmux definitions. Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-01-20board: ti: j721e: Use EEPROM-based board detectionAndreas Dannenberg
The TI J721E EVM system on module (SOM), the common processor board, and the associated daughtercards have on-board I2C-based EEPROMs containing board config data. Use the board detection infrastructure to do the following: 1) Parse the J721E SOM EEPROM and populate items like board name, board HW and SW revision as well as board serial number into the TI common EEPROM data structure residing in SRAM scratch space 2) Check for presence of daughter card(s) by probing associated I2C addresses used for on-board EEPROMs containing daughter card-specific data. If such a card is found, parse the EEPROM data such as for additional Ethernet MAC addresses and populate those into U-Boot accordingly 3) Dynamically apply daughter card DTB overlays to the U-Boot (proper) DTB during SPL execution 4) Dynamically create an U-Boot ENV variable called name_overlays during U-Boot execution containing a list of daugherboard-specific DTB overlays based on daughercards found to be used during Kernel boot. This patch adds support for the J721E system on module boards containing the actual SoC ("J721EX-PM2-SOM", accessed via CONFIG_EEPROM_CHIP_ADDRESS), the common processor board ("J7X-BASE-CPB"), the Quad-Port Ethernet Expansion Board ("J7X-VSC8514-ETH"), the infotainment board ("J7X-INFOTAN-EXP") as well as for the gateway/Ethernet switch/industrial expansion board ("J7X-GESI-EXP"). Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-01-20board: ti: beagleboneai: add dts fileJason Kridner
BeagleBoard.org BeagleBone AI is an open source hardware single board computer based on the Texas Instruments AM5729 SoC featuring dual-core 1.5GHz Arm Cortex-A15 processor, dual-core C66 digital signal processor (DSP), quad-core embedded vision engine (EVE), Arm Cortex-M4 processors, dual programmable realtime unit industrial control subsystems and more. The board features 1GB DDR3L, USB3.0 Type-C, USB HS Type-A, microHDMI, 16GB eMMC flash, 1G Ethernet, 802.11ac 2/5GHz, Bluetooth, and BeagleBone expansion headers. For more information, refer to: https://beaglebone.ai The corresponding patch against the mainline linux kernel can be found at: https://patchwork.kernel.org/patch/11254903/ This patch introduces the BeagleBone AI device tree. Note that the device use the "ti,tpd12s016" component which is software compatible with "ti,tpd12s015". Thus we only use the latter driver. Signed-off-by: Jason Kridner <jdk@ti.com> Signed-off-by: Caleb Robey <c-robey@ti.com> Cc: Robert Nelson <robertcnelson@gmail.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-01-20board: ti: beagleboneai: add initial supportCaleb Robey
These are necessities for beaglebone ai boot. There is the addition of CONFIG_SUPPORT_EMMC_CONFIG to the Kconfig file. This is present upstream but not in 19.01 yet. Signed-off-by: Jason Kridner <jdk@ti.com> Signed-off-by: Caleb Robey <c-robey@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-01-20arm: dts: k3-j721e-common-proc-board: Add pinmux for SD cardFaiz Abbas
Add pinmux for sdhci1 node connected to the SD card. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-01-20arm: dts: k3-j721e-common-proc-board: Remove voltage-ranges from sdhci nodesFaiz Abbas
voltage-ranges properties are NOP. Remove them. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-01-20mmc: am654_sdhci: Get Xin clock by nameFaiz Abbas
Get clk_xin by name instead of by index to avoid having to put clocks in the same order in all devices. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-01-20ARM: dts: da850-lcdk: Update DTS files for SPL device tree supportAdam Ford
Currently, the da850-lcdk uses SPL_OF_PLATDATA and manually loads the necessary source code instead of using the auto-generated, because the drivers don't properly autogenerate the code. This patch simply enables the various device tree options to mimic the da850-evm which doesn't need or use OF_PLATDATA for device tree support. It does not disable OF_PLATDATA. Signed-off-by: Adam Ford <aford173@gmail.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-01-20arm: dts: k3-j721e: Add DT nodes for USBVignesh Raghavendra
J721e has two instances of Cadence USB3 controller. Add DT nodes for the same. USB0 is configured to device mode and USB1 is configured to host mode. For now only high speed mode is supported. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-01-17aes: add support of aes192 and aes256Philippe Reynes
Until now, we only support aes128. This commit add the support of aes192 and aes256. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-01-16Merge tag 'mmc-1-16-2020' of https://gitlab.denx.de/u-boot/custodians/u-boot-mmcTom Rini
- Cleanup of fsl_esdhc driver together with arch/defconfig change - Add quirk for APP_CMD retry
2020-01-16Merge tag 'xilinx-for-v2020.04' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze Xilinx/FPGA changes for v2020.04 ARM64: - Add INIT_SPL_RELATIVE dependency SPL: - FIT image fix - Enable customization of bl2_plat_get_bl31_params() Pytest: - Add test for octal/hex conversions Microblaze: - Fix manual relocation for one SPI instance Nand: - Convert zynq/zynqmp drivers to DM Xilinx: - Enable boot script location via Kconfig - Support OF_SEPARATE in board FDT selection - Remove low level uart setup it is done later by code - Add support for DEVICE_TREE variable passing for SPL Zynq: - Enable jtag boot mode via distro boot - Removing unused baseaddresses from hardware.h - DT fixups ZynqMP: - Fix emmc boot sequence - Simplify spl logic around bss and board_init_r() - Support psu_post_config_data() calling - Tune mini-nand DTS - Fix psu wiring for a2197 boards - Add runtime MMC device boot order filling in spl - Clear ATF handoff handling with custom bl2_plat_get_bl31_params() - Add support u-boot.its generation - Use single image configuration for all platforms - Enable PANIC_HANG via Kconfig - DT fixups - Firmware fixes - Add support for zcu208 and zcu1285 Versal: - Fix emmc boot sequence - Enable board_late_init() by default
2020-01-16arm: dts: mediatek: move u-boot properties to -u-boot.dtsi fileSam Shih
This patch move u-boot properties to -u-boot.dtsi file. Signed-off-by: Sam Shih <sam.shih@mediatek.com> Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
2020-01-16Add support for MT7622 reference boardSam Shih
This adds a general board file based on MT7622 SoCs from MediaTek. This commit is adding the basic boot support for the MT7622 rfb. Signed-off-by: Sam Shih <sam.shih@mediatek.com> Reviewed-by: Ryder Lee <ryder.lee@mediatek.com> Tested-by: Frank Wunderlich <frank-w@public-files.de>
2020-01-16ARM: MediaTek: Add support for MediaTek MT7622 SoCSam Shih
Add support for MediaTek MT7622 SoC. This include the file that will initialize the SoC after boot and its device tree. Signed-off-by: Sam Shih <sam.shih@mediatek.com> Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
2020-01-16ARM: MediaTek: add basic support for MT8512 boardsmingming lee
This adds a general board file based on MT8512 SoCs from MediaTek. Apart from the generic parts (cpu) we add some low level init codes and initialize the early clocks. This commit is adding the basic boot support for the MT8512 eMMC board. Signed-off-by: mingming lee <mingming.lee@mediatek.com>
2020-01-16ARM: MediaTek: Add support for MediaTek MT8512 SoCmingming lee
Add support for MediaTek MT8512 SoC. This include the file that will initialize the SoC after boot and its device tree. Signed-off-by: mingming lee <mingming.lee@mediatek.com>
2020-01-16Drop CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK usageYangbo Lu
The eSDHC reference clocks should be provided by speed.c in arch/. And we do not need CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK option to select which clock to use. Because we can make the driver to select the periperhal clock which is better (provides higher frequency) automatically if its value is provided by speed.c. This patch is to drop this option and make driver to select clock automatically. Also fix peripheral clock calculation issue in fsl_lsch2_speed.c/fsl_lsch3_speed.c. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2020-01-16Add global variable sdhc_per_clk for arm/powerpcYangbo Lu
The QorIQ eSDHC controller supports two reference clocks. They are platform clock and periperhal clock. The global variable sdhc_clk has already been used for platform clock. This patch is to add another global variable sdhc_per_clk for periperhal clock, which provides higher frequency and is required to be used for SD UHS and eMMC HS200/HS400 speed modes. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2020-01-15Merge tag 'u-boot-imx-20200115' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-imx ----------------------------------- - imx8: add capricorn giedi deneb boards - imx6: fixed fow wandboard - imx7: DM_ETHER for pico-imx7d - fsl_esdhc_imx: add broken-cd property - New SOC: IMXRT10xx Travis: https://travis-ci.org/sbabic/u-boot-imx/builds/637126531
2020-01-14imx: imxrt1050-evk: Add support for the NXP i.MXRT1050-EVKGiulio Benetti
This commit adds board support for i.MXRT1050-EVK from NXP. This board is an evaluation kit provided by NXP for i.MXRT105x processor family. More information about this board can be found here: https://www.nxp.com/design/development-boards/i.mx-evaluation-and-development-boards/i.mx-rt1050-evaluation-kit:MIMXRT1050-EVK The initial supported/tested devices include: - Debug serial - SD Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2020-01-14imx: Add basic support for the NXP IMXRT10xx SoC familyGiulio Benetti
Add i.IMXRT family basic support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2020-01-14ARM: dts: imxrt1050: add dtsi fileGiulio Benetti
Add dtsi file for i.MXRT1050. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2020-01-14armv7m: cache: add mmu_set_region_dcache_behaviour() stub for compatibilityGiulio Benetti
Since some driver requires this function add it as an empty stub when DCACHE is OFF. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2020-01-14imx: dts: imx8dx: add I2C IPG clock for bus 0 and 2Anatolij Gustschin
IPG clock description is missing for I2C0 and I2C2 busses, add it. Otherwise we see -ENODATA error when trying to get I2C clock for these busses. Signed-off-by: Anatolij Gustschin <agust@denx.de> Cc: Stefano Babic <sbabic@denx.de>
2020-01-14ARM: dts: imx6ul-14x14-evk: Pass the "broken-cd" propertyFabio Estevam
imx6ul-14x14-evk does not have a GPIO dedicated for reading the card detect pin on the eSDHC2 port. In such cases the "broken-cd" property must be passed, otherwise the card cannot be detected. Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Stefano Babic <sbabic@denx.de>
2020-01-14imx: add imx8x based deneb boardAnatolij Gustschin
Add support for Capricorn Deneb SoM variant. Signed-off-by: Anatolij Gustschin <agust@denx.de>
2020-01-14imx: add imx8x capricorn giedi boardAnatolij Gustschin
Add support for i.MX8X based Capricorn Giedi SoM. Supported interfaces: GPIO, ENET, eMMC, I2C, UART. Console output: U-Boot SPL 2020.01-00003-gfd1c98f (Jan 07 2020 - 15:51:25 +0100) Trying to boot from MMC1 Load image from MMC/SD 0x3e400 U-Boot 2020.01-00003-gfd1c98f (Jan 07 2020 - 15:51:25 +0100) ##v01.07 CPU: NXP i.MX8QXP RevB A35 at 1200 MHz at 30C Model: Siemens Giedi Board: Capricorn Boot: MMC0 DRAM: 1022 MiB MMC: FSL_SDHC: 0 Loading Environment from MMC... OK In: serial@5a080000 Out: serial@5a080000 Err: serial@5a080000 Net: eth1: ethernet@5b050000 [PRIME] Autobooting in 1 seconds, press "<Esc><Esc>" to stop Signed-off-by: Anatolij Gustschin <agust@denx.de>
2020-01-14tegra: fdt: Add tegra186-u-boot.dtsiStephen Warren
All Tegra chips except Tegra186 have a tegraNNN-u-boot.dtsi. Duplicate Tegra210's copy of this file for Tegra186. This ensures that a /binman node exists in U-Boot's control DT. Subsequent to 3c10dc95bdd0 ("binman: Add a library to access binman entries") this appears to be required. I haven't really investigated why all this is necessary or how it works, but simply observed the boot failure listed below, bisected it, noticed the inconsistency in DT files, and found that fixing it resolved the boot issue. U-Boot 2020.01-rc4-00256-g3c10dc95bdd0 (Jan 07 2020 - 10:25:00 -0700) SoC: tegra186 Model: NVIDIA P2771-0000-500 Board: NVIDIA P2771-0000 DRAM: 7.8 GiB initcall sequence 00000000fffb7858 failed at call 00000000800955a8 (err=-22) ### ERROR ### Please RESET the board ### Fixes: 3c10dc95bdd0 ("binman: Add a library to access binman entries") Fixes: f2faffecb016 ("binman: tegra: Convert to use binman") Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-01-14ARM: dts: zynq: enablement of coresight topologyZumeng Chen
This patch is to build the coresight topology structure of zynq-7000 series according to the docs of coresight and userguide of zynq-7000. Signed-off-by: Zumeng Chen <zumeng.chen@windriver.com> Signed-off-by: Quanyang Wang <quanyang.wang@windriver.com> Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14arm64: zynqmp: Sync gem clock nodes with mainline LinuxMichal Simek
Just fixing indentation and update year in Copyright. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14arm64: zynqmp: Sync gpio-controller name locationMichal Simek
Sync location with mainline kernel. Added by Linux kernel commit 75926f07baae ("arm64: dts: zynqmp: Add missing gpio-controller to ps gpio"). Fixes: 0b33e0b15600 ("arm64: zynqmp: Add missing gpio property to dtsi") Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14arm64: dts: zynqmp: replace gpio-key,wakeup with wakeup-source propertySudeep Holla
Most of the legacy "gpio-key,wakeup" boolean property is already replaced with "wakeup-source". However few occurrences of old property has popped up again, probably from the remnants in downstream trees. This patch replaces the legacy properties with the unified "wakeup-source" property introduced by: "Input: gpio_keys - switch to using generic device properties" (sha1: 700a38b27eefc582099fdf69effacfad0ad738a4) Cc: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14arm64: dts: zcu100-revC: Give wifi some time after power-onJan Kiszka
Somewhere along recent changes to power control of the wl1831, power-on became very unreliable on the Ultra96, failing like this: wl1271_sdio: probe of mmc2:0001:1 failed with error -16 wl1271_sdio: probe of mmc2:0001:2 failed with error -16 After playing with some dt parameters and comparing to other users of this chip, it turned out we need some power-on delay to make things stable again. In contrast to those other users which define 200 ms, Ultra96 is already happy with 10 ms. Fixes: 5869ba0653b9 ("arm64: zynqmp: Add support for Xilinx zcu100-revC") Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14arm64: dts: zynqmp: Fix node names which contain "_"Michal Simek
s/_/-/ for node names. It fixes warnings like this: ... Warning (node_name_chars_strict): /cpu_opp_table: Character '_' not recommended in node name ... Issues reported by make dtbs W=12 Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14arm64: dts: Remove inconsistent use of 'arm,armv8' compatible stringRob Herring
The 'arm,armv8' compatible string is only for software models. It adds little value otherwise and is inconsistently used as a fallback on some platforms. Remove it from those platforms. This fixes warnings generated by the DT schema. Reported-by: Michal Simek <michal.simek@xilinx.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Will Deacon <will.deacon@arm.com> Acked-by: Antoine Tenart <antoine.tenart@bootlin.com> Acked-by: Nishanth Menon <nm@ti.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Acked-by: Chanho Min <chanho.min@lge.com> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Gregory CLEMENT <gregory.clement@bootlin.com> Acked-by: Thierry Reding <treding@nvidia.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Tero Kristo <t-kristo@ti.com> Acked-by: Wei Xu <xuwei5@hisilicon.com> Acked-by: Liviu Dudau <liviu.dudau@arm.com> Acked-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Scott Branden <scott.branden@broadcom.com> Acked-by: Kevin Hilman <khilman@baylibre.com> Acked-by: Chunyan Zhang <zhang.lyra@gmail.com> Acked-by: Robert Richter <rrichter@cavium.com> Acked-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com> Acked-by: Dinh Nguyen <dinguyen@kernel.org> Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-01-14arm64: zynqmp: Remove incorrect phy from DT for zcu102-revB upMichal Simek
zcu102-revB/up are not removing phy from revA properly because of incorrect name. Fixes: 2975a42b42c5 ("arm64: zynqmp: Use ethernet-phy as node name for ethernet phys") Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14arm64: zynqmp: Add support for zcu1285 revA boardMichal Simek
zcu1285 is the same as zcu1275 but it is using Avnet FMC http://www.ultrazed.org/product/network-fmc-module Unfortunately not everything is connected now that's why this is only describing system which Xilinx is using. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14arm64: zynqmp: Switch zcu100 revC to use firmware clock driverMichal Simek
There is no issue with using firmware based driver instead of fixed clock one. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14zynqmp: dts: Cleanup no-1-8-v property from sdhci dt nodesT Karthik Reddy
Removed no-1-8-v property from zynqmp sdhci devicetree nodes to allow UHS-I capable SD cards to work in SD3.0 UHS modes. Boards that does not have level shifter for SD, does not support 1.8v. so no-1-8-v property to sdhci dt nodes should be present in zcu102 Rev-A,B, zcu104 Rev-A,C, zcu100, zcu1275 Rev-B boards. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14arm64: zynqmp: Add support for zcu208Michal Simek
The board is very similar to zcu216 with zu49dr device. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14ARM: zynq: Add missing nand/smcc nodesMichal Simek
Add missing nand/smcc description. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14arm64: zynqmp: Correct the type of eeprom for zcu216 boardsRaviteja Narayanam
Corrected the type of eeprom in device tree for zcu216 boards according to schematic. Signed-off-by: Raviteja Narayanam <raviteja.narayanam@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>