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2019-10-08i.MX7ULP: Workaround APLL PFD2 to 345.6MhzYe Li
The GPU uses APLL PFD2 as its clock parent (483.84Mhz) with divider set to 1. This frequecy is out of ULP A0 spec. The MAX rate for GPU is 350Mhz. So we simply configure the APLL PFD2 to 345.6Mhz (FRAC=28) to workaround the problem. The correct fix should let GPU handle the clock rate in kernel. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08i.MX7ULP: Fix SPLL/APLL clock rate calculation issueYe Li
The num/denom is a float value, but in the calculation it is convert to integer 0, and cause the result wrong. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08i.MX7ULP: Fix wrong i2c configuration nameYe Li
Wrong I2c driver configuration name is used in codes, so I2c driver is not built. Correct it. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08i.MX7ULP: Add CONFIG_MX7ULP to kconfigYe Li
Since many drivers need this CONFIG_MX7ULP to distiguish the settings for i.MX7ULP only. Add this entry to cpu's kconfig. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08i.MX7ULP: Fix PCC register bits mask and offset issueYe Li
The offset for FRAC and the mask for PCD are not correct. If we set FRAC, we can't get the right frequency. Fix them to correct value. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08i.MX7ULP: Correct the clock indexBai Ping
On i.MX7ULP, value zero is reserved in SCG1 RCCR register, so the val should be decreased by 1 to get the correct clock source index. Signed-off-by: Bai Ping <ping.bai@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08i.MX7ULP: Fix system reset after a7 rtc alarm expired.Bai Ping
The board will reboot if A7 core enter mem mode by rtc, then M4 core enter VLLS mode after the RTC alarm expired. Enable the dumb PMIC mode to fix this issue. Since i.MX7ULP B0 moves the SNVS LP into M4 domain, A core can't access it. So check the CPU rev and not apply the settings for B0. Signed-off-by: Bai Ping <ping.bai@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08imx: i.MX7ULP: add get_boot_devicePeng Fan
Add get_boot_device for i.MX7ULP Signed-off-by: Peng Fan <peng.fan@nxp.com> Tested-by: Fabio Estevam <festevam@gmail.com>
2019-10-08nitrogen6x: migrate to using device treeTroy Kisky
Migrate to using device tree required for further driver model integration. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
2019-10-08ARM: imx: Support larger SPL size on IMX6DQRobert Hancock
Previously the SPL size on all iMX6 platforms was restricted to 68KB because the OCRAM size on iMX6SL/DL parts is only 128KB. However, the other iMX6 variants have 256KB of OCRAM. Add an option CONFIG_MX6_OCRAM_256KB which allows using the full size on boards which don't need to support the SL/DL variants. This allows for an SPL size of 196KB, which makes it much easier to use configurations such as SPL with driver model and FDT control. Signed-off-by: Robert Hancock <hancock@sedsystems.ca> Tested-by: Adam Ford <aford173@gmail.com> #imx6q_logic
2019-10-08spl: imx: only use HAB if spl fit signature is not enabledRicardo Salveti
There is no need to use HAB for FIT signature validation when SPL_FIT_SIGNATURE is also enabled, as that will be validated via the normal U-Boot signed FIT image flow. This allows having SPL validated by HAB and the payloads to follow being validated with FIT signatures only. Signed-off-by: Ricardo Salveti <ricardo@foundries.io> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-10-08imx: apalis_imx6: select MX6Q via KconfigRicardo Salveti
Toradex Apalis iMX6 modules are available in the iMX6D and iMX6Q variants, which are quite similar and already managed via only one dtb in u-boot (imx6-apalis.dtb). Select MX6Q via Kconfig by default in order to automatically enable the HAS_CAAM and MX6_SMP features. Signed-off-by: Ricardo Salveti <ricardo@foundries.io> Reviewed-by: Peng Fan <peng.fan@nxp.com> Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
2019-10-08arm: dts: imx: fsl-imx8qm.dtsi: add gpio aliases to fix gpio commandPeng Fan
The gpio command currently uses equal bank names "GPIO0_" for all existing gpio banks, i. e.: U-Boot# gpio status -a Bank GPIO0_: GPIO0_0: input: 0 [ ] GPIO0_1: input: 0 [ ] ... Bank GPIO0_: GPIO0_0: input: 0 [ ] GPIO0_1: input: 0 [ ] ... So the command is broken, it is not possible to address a desired bank. Add gpio aliases to fix this. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Anatolij Gustschin <agust@denx.de>
2019-10-08spl: pass args to board_return_to_bootromPeng Fan
Pass spl_image and bootdev to board_return_bootrom. i.MX8MN needs the args to let ROM to load images Cc: Simon Glass <sjg@chromium.org> Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Cc: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-10-08imx: mx6ul_14x14_evk: convert to DM_VIDEOPeng Fan
To support DM_VIDEO, Add display node for lcdif Drop board iomuxc settings. Enable DM_VIDEO Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Anatolij Gustschin <agust@denx.de>
2019-10-08imx: add i.MX6ULZ boardPeng Fan
Add i.MX6ULZ board support. the i.MX6ULZ is SW compatible with i.MX6ULL. so most code of i.MX6ULL can be reused by i.MX6ULZ. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2019-10-08imx: add i.MX6ULZ cpu typePeng Fan
Add i.MX6ULZ cpu type and helper. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2019-10-08arm: dts: import dts for i.MX6ULZPeng Fan
Import kernel dts for i.MX6ULZ from commit <0a8ad0ffa4d8> ("Merge tag 'for-linus-5.3-ofs1' of git://git.kernel.org/pub/scm/linux/kernel/git/hubcap/linux") Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2019-10-08arm: dts: sync dts for i.MX6ULLPeng Fan
Sync kernel dts for i.MX6ULL from commit <0a8ad0ffa4d8> ("Merge tag 'for-linus-5.3-ofs1' of git://git.kernel.org/pub/scm/linux/kernel/git/hubcap/linux") Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2019-10-08arm: dts: sync dts for i.MX6ULPeng Fan
Sync kernel dts for i.MX6UL from commit <0a8ad0ffa4d8> ("Merge tag 'for-linus-5.3-ofs1' of git://git.kernel.org/pub/scm/linux/kernel/git/hubcap/linux") Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2019-10-08arm64: versal: Move common board dtb searchIbai Erkiaga
Move the exisiting function of getting board dtb from versal to a common Xilinx folder. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08arm64: zynqmp: Use mailbox driver for PMUFW config loadingMichal Simek
With new mailbox driver PMUFW configuration object can be loaded via the same interface and there is no need to have pmu_ipc.c completely. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Luca Ceresoli <luca@lucaceresoli.net>
2019-10-08arm64: zynqmp: probe firmware driverIbai Erkiaga
Probe ZynqMP firmware driver on the board initialization phase and ensure that firmware is in place to continue execution. The probing is done on board_init so it can be used for both SPL and U-Boot proper. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08arm64: zynqmp: remove old fw version functionIbai Erkiaga
Removes the old function to get the firmware version. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08firmware: zynqmp: create firmware headerIbai Erkiaga
New firmware header to place firmware specific macro and function declarations. The patch also moves the macros defining PM operations as well as some helper macros. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08arm64: zynqmp: Cleanup PM SMC macro compositionMichal Simek
Cleanup PM ID handling by using enum values. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08arm64: zynqmp: add firmware and mailbox node to DTIbai Erkiaga
The following patch adds a mailbox node and firmware node to following the mainline DT. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08firmware: zynqmp: Add zynqmp-power supportIbai Erkiaga
zynqmp-power driver for ZynqMP to handle the communication with the PMU firmware. Firmware driver just probes subnodes and power driver handles communication with PMU using the IPI mailbox driver. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08mailbox: zynqmp: ipi mailbox driverIbai Erkiaga
ZynqMP mailbox driver implementing IPI communication with PMU. This would allow U-Boot SPL to communicate with PMUFW to request privileged operations. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08arm64: zynqmp: Add a2197 memory board revAMichal Simek
Similar to processor board but i2c structure is completely different. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08arm64: zynqmp: Add System Controller for a2197-g/pMichal Simek
Similar SCs but different wiring. - dc_i2c is connected to X-PRC cards that's why label is required to have an option to hook up some devices. - Exactly identify i2c devices on x-prc boards. In case of missing i2c connection devices won't be accessible. - USB 0 should be device mode with super speed. - USB 1 should be host mode. - Fix i2c mux reset pin entry - commented, not verified. - Fix i2c1 eeprom compatible string - it is an ST 128Kbit device. Need to use atmel fallback. - Fix si570 I2C slave address and add corresponding part numbers. - Enable AMS for system monitoring. - phy reset property should be commented because it will throw a warning dump when called from context that can sleep. No support for phys property (zynqmp phy driver) with SGMII. Add is-internal-pcspma property required by uboot. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Harini Katakam <harini.katakam@xilinx.com>
2019-10-08arm64: zynqmp: Add generic a2197 system controller configMichal Simek
Add generic configuration for a2197-p/-m/-g boards. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08arm64: zynqmp: Switch spi-flash to jedec, spi-nor compatibleMichal Simek
Change has been done across the whole tree only zynqmp-mini-qspi hasn't been fixed. Origin changed done by commit ffd4c7c2ecb7 ("dts: switch spi-flash to jedec, spi-nor compatible") Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08ARM: zynq: dts: Added alias for usb nodeVipul Kumar
This patch added alias for usb node in dts file. Signed-off-by: Vipul Kumar <vipul.kumar@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08ARM: zynq: Align model name with DTMichal Simek
Use model property to distinguish different configurations. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08clk: versal: Add clock driver supportSiva Durga Prasad Paladugu
This patch adds clock driver support for Versal platform. The clock driver queries and performs clock operations using PLM firmware by communicating with it using SMC calls. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08arm64: zynqmp: Provide a Kconfig option to disable OCM and TCM MMU mappingMichal Simek
This patch provides an option to enable/disable OCM and TCM memory into MMU table with corresponding memory attributes. The same change was done for ZynqMP by commit 189bec47ab1f ("arm64: zynqmp: Provide a Kconfig option to define OCM and TCM in MMU") Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08arm64: versal: Enable memory mapping via DTMichal Simek
Code reads DT and setup MMU table based on memory node. This will ensure that only DT needs to be changed. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08arm64: zynqmp: Set initrd_high to as high as possibleT Karthik Reddy
This patch is setting up the initrd_high to as high as possible by leaving max stack size for u-boot so that bigger rootfs can also be loaded by u-boot for booting kernel. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08arm64: versal: Set initrd_high to as high as possibleSiva Durga Prasad Paladugu
This patch is setting up the initrd_high to as high as possible by leaving max stack size for u-boot so that bigger rootfs can also be loaded by u-boot for booting kernel. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08arm64: versal: Define board_late_init for versalSiva Durga Prasad Paladugu
Define board_late_init which performs bootmode detection and prepares corresponding distro boot commaand sequence. Also disable it for mini platforms because simply there is no need to have it enabled. But also disable it for virtual platform because Qemu is not modelling this register space that's why travis testing would fail. This configuration should be reverted when mainline Qemu is updated. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08arm64: zynqmp: Add u-boot,dm-pre-reloc to clk300 nodeMichal Simek
This node is used by qspi driver for supporting qspi boot mode in SPL. Similar changes have beeen done by commit a9022b017a90 ("ARM64: zynqmp: Add u-boot,dm-pre-reloc to clk nodes") Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08ARM: dts: at91: sam9x60ek: add onewire supportEugen Hristev
Add support for onewire memory. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2019-10-08ARM: dts: at91: sam9x60: add onewire nodeEugen Hristev
Add onewire node for w1 support. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2019-10-08ARM: dts: at91: sam9x60ek: Enable qspi nodeTudor Ambarus
The sam9x60 qspi controller uses 2 clocks, one for the peripheral register access, the other for the qspi core and phy. Both are mandatory. Enable the qspi node together with the SST26VF064B qspi nor flash memory. Booting from the QSPI NOR flash is now possible. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2019-10-08ARM: at91: Add SFR definitionsTudor Ambarus
sama5's SFR has at offset 0x04 the DDR Configuration Register, while sam9x60's SFR contains the EBI Chip Select Register. Add a union to reconcile both boards. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2019-10-08ARM: at91: Rename sama5_sfr.h to at91_sfr.hTudor Ambarus
The Special Function Registers (SFR) are present in sam9x5 and sam9x60 too, rename sama5_sfr to at91_sfr.h. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2019-10-08board: atmel: Add sam9x60ek boardSandeep Sheriker Mallikarjun
Add new board SAM9X60-EK using the ARM926 SAM9X60 SoC. Signed-off-by: Sandeep Sheriker Mallikarjun <sandeepsheriker.mallikarjun@microchip.com> [tudor.ambarus@microchip.com: - fix number of DRAM banks: One DDR2-SDRAM (W972GG6KB 2 Gbit = 16 Mbit x 16 x 8 banks] - drop SPL related macros - drop memtest macros - drop CONFIG_SPI_BOOT, CONFIG_SYS_USE_DATAFLASH related macros - drop inclusion of asm/arch/at91sam9_smc.h] Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2019-10-08ARM: dts: at91: sam9x60: Add macb0 Ethernet controllerNicolas Ferre
Add Ethernet controller to dtsi file and enable it on sam9x60ek platform connected with rmii. Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2019-10-08ARM: dts: Add dts files for sam9x60ekSandeep Sheriker Mallikarjun
add device tree files for sam9x60ek board with below changes. - Add initial device nodes (pmc, pinctrl, sdhc, dbgu & pit) - Add the reg property for the pinctrl node. - Add the "u-boot,dm-pre-reloc" property to determine which nodes are used by the board_init_f stage. Signed-off-by: Sandeep Sheriker Mallikarjun <sandeepsheriker.mallikarjun@microchip.com> [prasanthi.chellakumar@microchip.com: fix style/whitespace issues] Signed-off-by: Prasanthi Chellakumar <prasanthi.chellakumar@microchip.com> [nicolas.ferre@microchip.com: - fix gclk, - fix pio/pinctrl controller definition and allow to have more than only PIOA for this SoC, - removing pinctrl address] Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> [claudiu.beznea@microchip.com: - use SAM9X60's compatible for pinctrl - add drive strength and slew rate options for SDMMC0 pins.] Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> [tudor.ambarus@microchip.com: - u-boot,dm-pre-reloc property in dedicated file, - fix pit len, starts from 0xFFFFFE40 and it is of len 0x10] Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
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