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quartus project directories
The hps_isw_handoff and bsp/generated folders are typically not in the same
path.This patch adds support for specifying the different input directories for
the bsp and quartus projects.
Signed-off-by: Dalon Westergreen <dwesterg@gmail.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Chin Liang See <clsee@altera.com>
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Commit adc421e4cee8 "arm: move gd handling outside of C code" removed
the call to arch_setup_gd() on ARM and replaced it with assembly code
in crt0.S. However, AArch64 uses a different startup file, and the same
change was not made to it. This leaves gd uninitialized on AArch64, which
typically leads to hangs or crashes. This change fixes that.
Fixes: adc421e4cee8 ("arm: move gd handling outside of C code")
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Conflicts:
arch/arm/Kconfig
Signed-off-by: Tom Rini <trini@konsulko.com>
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This adds support for the MV78230 based DS414 NAS by Synology. The
relevant bits have been extracted from the 'synogpl-5004-armadaxp'
package Synology kindly published, garnished with a fair amount of
trial-and-error.
Sadly, support is far from perfect. The major parts I have failed in
are SATA and XHCI support. Details about these and some other things
follow:
Device Tree
-----------
The device tree file armada-xp-synology-ds414.dts has been copied from
Linux and enhanced by recent U-Boot specific changes to
armada-xp-gp.dts.
SATA Support
------------
There is a Marvell 88SX7042 controller attached to PCIe which is
supported by Linux's sata_mv driver but sadly not U-Boot's sata_mv.
I'm not sure if extending the latter to support PCI devices is worth the
effort at all. Porting sata_mv from Linux exceeded my brain's
capacities. :(
XHCI Support
------------
There is an EtronTech EJ168A XHCI controller attached to PCIe which
drives the two rear USB3 ports. After a bit of playing around I managed
to get it recognized by xhci-pci, but never was able to access any
devices attached to it. Enabling it in ds414 board config shows that it
does not respond to commands for whatever reason. The (somewhat) bright
side to it is that it is not even supported in Synology's customized
U-Boot, but that also means nowhere to steal the relevant bits from.
EHCI Support
------------
This seems functional after issuing 'usb start'. At least it detects USB
storage devices, and IIRC reading from them was OK. OTOH Linux fails to
register the controller if 'usb start' wasn't given before in U-Boot.
According to Synology sources, this board seems to support USB device
(gadget?) mode. Though I didn't play around with it.
PCIe Support
------------
This is fine, but trying to gate the clocks of unused lanes will hang
PCI enum. In addition to that, pci_mvebu seems not to support DM_PCI.
DDR3 Training
-------------
Marvell/Synology uses eight PUPs instead of four. Does not look like
this is meant to be customized in mainline U-Boot at all. OTOH I have
no idea what a "PUP" actually is.
PEX Init
--------
Synology uses different values than mainline U-Boot with this patch:
pex_max_unit_get returns 2, pex_max_if_get returns 7 and
max_serdes_lines is set to 7. Not changing this seems to not have an
impact, although I'm not entirely sure it does not cause issues I am not
aware of.
Static Environment
------------------
This allows to boot stock Synology firmware at least. In order to be a
little more flexible when it comes to booting custom kernels, do not
only load zImage partition, but also rd.gz into memory. This way it is
possible to use about 7MB for kernel with piggyback initramfs.
Signed-off-by: Phil Sutter <phil@nwl.cc>
Acked-by: Stefan Roese <sr@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
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This adds basic support for Marvell's MV78230 SoC which belongs to the
Armada XP series.
Signed-off-by: Phil Sutter <phil@nwl.cc>
Acked-by: Stefan Roese <sr@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
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This patch adds intermediate kconfig symbols which select their SoC
family. Boards then select them instead of the family symbol directly.
Signed-off-by: Phil Sutter <phil@nwl.cc>
Acked-by: Stefan Roese <sr@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
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Instead of calling board_sat_r_get() only for those boards providing the
satr11 value via I2C, call it for all boards and return static values
for those not using I2C.
In addition to that, make this a weak function to allow for board code
to override it.
Signed-off-by: Phil Sutter <phil@nwl.cc>
Acked-by: Stefan Roese <sr@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
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Armada XP has support for X4 lanes, boards specify this in their
serdes_cfg. During PEX init in high_speed_env_lib.c, the configuration
is stored in GEN_PURP_RES_2_REG.
When enumerating PEX, subsequent interfaces of an X4 lane must be
skipped. Otherwise the enumeration hangs up the board.
The way this is implemented here is not exactly beautiful, but it mimics
how Marvell's BSP does it. Alternatively we could get the information
using board_serdes_cfg_get(), but that won't lead to clean code, either.
Signed-off-by: Phil Sutter <phil@nwl.cc>
Acked-by: Stefan Roese <sr@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
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This patch adds runtime detection of the Marvell UART boot-mode (xmodem
protocol). If this boot-mode is detected, SPL will return to the
BootROM to continue the UART booting.
With this patch its now possible, to generate a U-Boot image that
can be booted either from the strapped boot-device (e.g. SPI NOR, MMC,
etc) or via the xmodem protocol from the UART. In the UART case,
the kwboot tool will dynamically insert the UART boot-device type
into the image. And also patch the load address in the header, so
that the mkimage header will be skipped (as its not expected by the
Marvell BootROM).
This simplifies the development for Armada XP / 38x based boards.
As no special images need to be generated by selecting the
MVEBU_BOOTROM_UARTBOOT Kconfig option.
Since the Kconfig option MVEBU_BOOTROM_UARTBOOT is not needed any
more, its now completely removed.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Cc: Dirk Eibach <dirk.eibach@gdsys.cc>
Cc: Phil Sutter <phil@nwl.cc>
Cc: Kevin Smith <kevin.smith@elecsyscorp.com>
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This patch adds runtime boot-device detection to SPL U-Boot.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Cc: Dirk Eibach <dirk.eibach@gdsys.cc>
Cc: Phil Sutter <phil@nwl.cc>
Cc: Kevin Smith <kevin.smith@elecsyscorp.com>
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As these structs are local only and const, declare them accordingly.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Cc: Dirk Eibach <dirk.eibach@gdsys.cc>
Cc: Phil Sutter <phil@nwl.cc>
Cc: Kevin Smith <kevin.smith@elecsyscorp.com>
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This is preparation for the runtime bootmode detection in spl.c.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Cc: Dirk Eibach <dirk.eibach@gdsys.cc>
Cc: Phil Sutter <phil@nwl.cc>
Cc: Kevin Smith <kevin.smith@elecsyscorp.com>
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This Makefile was not used since quite some time. I only missed to
remove it in the move to mach-mvebu. So lets remove it now so
that the mvebu-common directory is really removed completely.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
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Until now, the SoC selection for the ARCH_MVEBU platforms has been done
in the config header. Using CONFIG_ARMADA_XP in a non-clear way. As
it needed to get selected for AXP and A38x based boards. This patch
now changes this to move the SoC selection to Kconfig. And also
uses CONFIG_ARCH_MVEBU as a common define for both AXP and A38x.
This makes things a bit clearer - especially for new board additions.
Additionally the defines CONFIG_SYS_MVEBU_DDR_AXP and
CONFIG_SYS_MVEBU_DDR_A38X are replaced with the already available
CONFIG_ARMADA_38X and CONFIG_ARMADA_XP.
And CONFIG_DDR3 is removed, as its not referenced anywhere.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
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Merging all the board specific Kconfig options into the main Kconfig file
for mach-mvebu makes things easier to maintain.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
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With this patch, the CPU and the DDR frequencies will get printed in the
U-Boot startup messages. Resulting in such a log:
U-Boot 2016.01-rc2-00188-gb8eeaec-dirty (Dec 21 2015 - 12:32:35 +0100)
SoC: MV78460-B0 at 1600 MHz
I2C: ready
DRAM: 4 GiB (800 MHz, ECC not enabled)
...
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
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Change some of the PEX configuration output lines from always output to
only ouput upon specific debug enabling.
This changes the SPL output from:
U-Boot SPL 2016.01-rc2-00037-g9353a7f (Dec 10 2015 - 10:27:42)
High speed PHY - Version: 2.1.5 (COM-PHY-V20)
Update Device ID PEX0782611ab
Update Device ID PEX1782611ab
Update Device ID PEX2782611ab
Update Device ID PEX3782611ab
Update Device ID PEX8782611ab
Update PEX Device ID 0x78260
High speed PHY - Ended Successfully
DDR3 Training Sequence - Ver 5.7.4
DDR3 Training Sequence - Ended Successfully
to:
U-Boot SPL 2016.01-rc2-00037-g9353a7f-dirty (Dec 10 2015 - 10:32:04)
High speed PHY - Version: 2.1.5 (COM-PHY-V20)
High speed PHY - Ended Successfully
DDR3 Training Sequence - Ver 5.7.4
DDR3 Training Sequence - Ended Successfully
Resulting in a little faster bootup time.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
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This is not needed any more since the switch to DM / DTS network
initialization on MVEBU. Lets remove it, as it otherwise leads
to compilation warning when CONFIG_NET is not enabled.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
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This patch adds support for the dual core Armada XP variant, the
MV78260. It has some minor differences to the 4-core MV78460,
e.g. only 12 serdes lanes.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Cc: Phil Sutter <phil@nwl.cc>
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Using board ID 0 is reserved for the non-Marvell "custom" boards. So
move the board ID's to reflect this.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Cc: Phil Sutter <phil@nwl.cc>
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Use the clrbits() / setbits() functions instead of clrsetbits() when
bit are only cleared or set.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
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This patch leaces the cache configuration untouched for the AXP in the
setup done by the BootROM. Resulting in the cache still being enabled
at the startup of U-Boot. This leads to a slightly faster boot to the
U-Boot prompt (or Linux of course).
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
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This patch removes the call to arch_cpu_init() in the SPL U-Boot version.
As SPL does not need all the configuration done in this function. And
also does not need the reconfiguration of the internal register
address to 0xf1000000. This will be done by the main U-Boot later on.
This also fixes a problem with the timer not beeing initialized on AXP,
as needed for the mdelay in the setup_usb_phys(). This will now only
be called once in main U-Boot.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
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Add functionality to correctly disable the L2 cache on the Armada XP
and 38x platforms.
Without this, booting into Linux on ClearFog (A38x) results in a hangup
without any output on the serial console at all. Even with earlyprintk
enabled.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
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Until now, the L2 cache was never enabled again in U-Boot. To get
even better performance (bootup time), lets enable the L2 cache
in U-Boot. This code was taken from the Linux kernel.
A performance gain was measured on the DB-MV784MP-GP board by testing
with tftpboot and sata commands.
This patch also cleans up the L2 cache related code. And makes sure that
the L2 cache is only disabled once.
Please note that A38x still runs with L2 cache disabled. And needs
to be enabled for this SoC in a separate patch if needed or desired.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
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This patch adds basic support for the SolidRun ClearFog Armada 38x based
board to mainline U-Boot. Supported interfaces / devices are:
- DDR3
- UART
- MMC
- Ethernet port 0 (connected to dedicated PHY)
- I2C
The included DT source was taken from Russell King's ftp server:
http://www.home.arm.linux.org.uk/~rmk/clearfog/
With only minor modifications, like the addition of some aliases and the
"u-boot,dm-pre-reloc" property.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Rabeeh Khoury <rabeeh@solid-run.com>
Cc: Luka Perkov <luka.perkov@sartura.hr>
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This patch moves some config options to the mvebu common include file.
Making it easier to not forget these defines for new boards.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Cc: Dirk Eibach <dirk.eibach@gdsys.cc>
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Update this driver to support driver model. As all MVEBU boards using
this driver are converted with this patch, the non-driver-model code
can be removed completely. This is also the reason why this patch
is quite big and includes a) the driver change and b) the
platform change. As its not git-bisect save otherwise.
With this conversion, some parameters are now extracted from the
DT instread of using the config header defines. The supported
properties right now are:
PHY-mode ("phy-mode") and PHY-address ("reg").
The base addresses for the ethernet controllers can be removed from
the header files as well.
Please note that this patch also removes the E1000 network driver
from some MVEBU config headers. This is necessary, as with DM_ETH
configured and the e1000 driver enabled, the PCI driver also needs
to support DM. But the MVEBU PCI(e) driver still needs to get
ported to DM. When this is done, the E1000 driver can be enabled
again.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Cc: Dirk Eibach <dirk.eibach@gdsys.cc>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Simon Glass <sjg@chromium.org>
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Adding these aliases enables the update of the MAC addresses from
within U-Boot.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
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This is needed for the upcoming ethernet DM conversion of the maxbcm
board. The configuration of the PHY is then extracted from the DT
instead of using the defines from the config header.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
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This patch enables the DM support for the SPI driver and the
SPI NOR flash chips. Some MVEBU boards boot from SPI NOR, so
adding the aliases and enabling CONFIG_DM_SEQ_ALIAS is needed
here.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Cc: Dirk Eibach <dirk.eibach@gdsys.cc>
Cc: Simon Glass <sjg@chromium.org>
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This patch adds full DM support to the SPL on MVEBU. Currently
only serial is supported. Other drivers will follow.
This patch also adds the necessary config values for the DEBUG UART
to the MVEBU defconfig files. This came in handy while implementing
this DM support.
Additionally, the mvebu specific SPL linker script is removed and
this common one is used instead:
arch/arm/cpu/u-boot-spl.lds
This common linker script already handles all special cases. No need
to reinvent the wheel for MVEBU here.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Cc: Dirk Eibach <dirk.eibach@gdsys.cc>
Cc: Simon Glass <sjg@chromium.org>
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By using the common timer functions for mvebu/kirkwood we can get rid of quite
a lot of code.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Cc: Simon Guinot <simon.guinot@sequanux.org>
Cc: Valentin Longchamp <valentin.longchamp@keymile.com>
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For NXP LPC32xx boards the change enables SPL_DM option, this allows
to use any driver model UART driver in SPL images, hence a restriction
on HSUART in SPL image is removed and well as definitions for non-DM
NS16550 driver, its DM version is used instead.
Because SPL_DM requires malloc(), enable CONFIG_SPL_SYS_MALLOC_SIMPLE
for LPC32xx boards.
The change adds about 5KB to the resulting SPL image (for devkit3250
board SPL image is increased from 10672 to 15608 bytes).
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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On NXP LPC32xx platform for non-SPL builds the change adds
standard (NS16550) and high-speed UARTs to driver model.
Due to specific of DM NS16550 device description UART clock can not be
got in runtime and by default it is set to 13MHz, if board PERIPH_CLK
is different, this should be specified in board configuration file.
For SPL builds HSUARTs are disabled and non-DM NS16550 driver is
compiled, if needed.
The change also updates default configs of devkit3250 and work_92105
boards to reflect updates in platform files.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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As of gcc 5.2.1 for Thumb-1, it is not possible any
more to assign gd from C code, as gd is mapped to r9,
and r9 may now be saved in the prolog sequence, and
restored in the epilog sequence, of any C functions.
Therefore arch_setup_gd(), which is supposed to set
r9, may actually have no effect, causing U-Boot to
use a bad address to access GD.
Fix this by never calling arch_setup_gd() for ARM,
and instead setting r9 in arch/arm/lib/crt0.S, to
the value returned by board_init_f_alloc_reserve().
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Reviewed-by: Simon Glass <sjg@chromium.org>
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board_init_f_mem() alters the C runtime environment's
stack it is actually already using. This is not a valid
behaviour within a C runtime environment.
Split board_init_f_mem into C functions which do not alter
their own stack and always behave properly with respect to
their C runtime environment.
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Acked-by: Thomas Chou <thomas@wytron.com.tw>
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Add qspi memory map address to device tree.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jteki@openedev.com>
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In U-Boot most flashes uses "spi-flash" as compatible to bind the
device to flash driver, so adding "spi-flash" compatible to
m25p80 node.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
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In U-Boot most flashes uses "spi-flash" as compatible to bind the
device to flash driver, so adding "spi-flash" compatible to
m25p80 node.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
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In U-Boot most flashes uses "spi-flash" as compatible to bind the
device to flash driver, so adding "spi-flash" compatible to
m25p80 node.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
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Add qspi memory map and control module register maps to device tree.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jteki@openedev.com>
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add spi alias for qspi so that spi probes the device and driver
successfully.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jteki@openedev.com>
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Select SPL_DM_SEQ_ALIAS which is required for certain uclasses,
specifically SPI Flash.
Signed-off-by: Nathan Rossi <nathan@nathanrossi.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Stefan Roese <sr@denx.de>
Acked-by: Stefan Roese <sr@denx.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Rather than using a new debug UART implementation, use the standard one
provided by U-Boot.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Thomas Chou <thomas@wytron.com.tw>
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Adjust all Tegra boards to use driver model for Ethernet, now that the
required drivers are converted.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
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The ProXstream2/PH1-LD6b is integrated with a new IP for DDR PHY
which is not register-compatible with the former SoCs.
Add a new command to support the register dump of this IP.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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As mentioned in the log of commit 019df879a93e2 (ARM: uniphier: add
ProXstream2 and PH1-LD6b support), the DRAM init code was missing
for a long time. Finally, here it is. SPL works now.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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