summaryrefslogtreecommitdiff
path: root/arch/arm
AgeCommit message (Collapse)Author
2016-04-13ARM64: zynqmp: Add CCI-400 nodeMichal Simek
Add CCI-400 node to DTSI. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13ARM64: zynqmp: Add missing interrupt-parent to PMU nodeMichal Simek
ZynqMP is not using global interrupt-parent setting that's why it has to be listed in every node separately. PMU node missed it and this patch is adding it. Reported-by: John Linn <John.Linn@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13ARM64: zynqmp: DT: Add power domainsSoren Brinkmann
Add power-domains to the DT and attach devices to them. The power-domains are all logical domains as understood by firmware. Each PD is identified by a unique identifier that the platform firmware understands. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13ARM64: zynqmp: Added broken-tuning property to SD, eMMC nodesP L Sai Krishna
This patch adds broken-tuning property to SD and eMMC nodes. Signed-off-by: P L Sai Krishna <lakshmis@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13ARM64: zynqmp: Sync GEM nodes with LinuxMichal Simek
Remove jumbo properties which are handled in the driver directly and use mainline compatible string which is already handled by the driver. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13ARM64: zynqmp: Hook up the GEMs to the SMMUEdgar E. Iglesias
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13ARM64: zynqmp: Correct IRQ nr for the SMMUEdgar E. Iglesias
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13ARM64: zynqmp: Add 8-bit bus width property.P L Sai Krishna
This patch add 8-bit bus width property to eMMC node. Signed-off-by: P L Sai Krishna <lakshmis@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13ARM64: zynqmp: dt: Change qspi node compatible stringRanjit Waghmode
This patch makes compatible string as "m25p80" for qspi node in ep108 device tree file Signed-off-by: Ranjit Waghmode <ranjit.waghmode@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13ARM64: zynqmp: Add missing mmc aliasesMichal Simek
Add missing mmc aliases. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13ARM64: zynqmp: Use C pre-processor for includes in dtsAlistair Francis
Change the dtsi include code to use the C pre-processor #include instead of the device tree /include/. This brings all ZynqMP device trees inline with each other. Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Sören Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13ARM: zynq: Fix usb phy node for ZyboMichal Simek
Compatible property should be the first. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13ARM: zynq: Extend microzed board supportMichal Simek
Add missing DT nodes and enable USB. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Nathan Rossi <nathan@nathanrossi.com>
2016-04-13ARM: zynq: Add missing qspi for xm013Michal Simek
Add missing qspi node and make qspi as spi0. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13ARM: zynq: Create empty line below headersMichal Simek
Sync with others zynq DTS files. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13ARM: zynq: Align spi and qspi node locationsMichal Simek
Keep nodes alphabelitally sorted. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Nathan Rossi <nathan@nathanrossi.com>
2016-04-13ARM: zynq: zc706: Add adv7511 on i2c busChristian Kohn
Add missing adv7511 and configure to match Base TRD. Signed-off-by: Christian Kohn <christian.kohn@xilinx.com> Reviewed-by: Nathan Rossi <nathan@nathanrossi.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13ARM: zynq: zc702: Add adv7511 on i2c busChristian Kohn
Add bindings for adv7511. Signed-off-by: Christian Kohn <christian.kohn@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13ARM: zynq: DT: Add ethernet phy reset informationPunnaiah Choudary Kalluri
Added phy reset gpio information for gem0. Signed-off-by: Punnaiah Choudary Kalluri <punnaia@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13ARM: zynq: Fix bootargs in board dtsiMichal Simek
- Sync with Linux kernel - Remove rootfs - Remove earlyprintk Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13ARM: zynq: Align devcfg nodeMichal Simek
- Have compatible string as the first property - Sync with Linux kernel dtsi - Add missing interrupt properties Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13ARM: dts: Updated devicetree bindings for Zynq 7000 platformMoritz Fischer
Added addtional bindings required for FPGA Manager operation of the Xilinx Zynq Devc configuration interface. Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13ARM: dts: zynq: Add devicetree entry for Xilinx Zynq reset controller.Moritz Fischer
Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com> Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13ARM: zynq: Add interrupt-controller property to gpio nodesMichal Simek
GPIO driver supports an input interrupt that's why gpio node itself can be labeled as interrupt controller. Reported-by: John Linn <linnj@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-11arm: Replace v7_maint_dcache_all(ARMV7_DCACHE_INVAL_ALL) with asm codeHans de Goede
Lets be consistent and also replace v7_maint_dcache_all() with asm code for the invalidate case. Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-04-11arm: Replace v7_maint_dcache_all(ARMV7_DCACHE_CLEAN_INVAL_ALL) with asm codeHans de Goede
v7_maint_dcache_all() does not work reliable when build with gcc6, see: https://bugzilla.redhat.com/show_bug.cgi?id=1318788 While debugging this I learned that v7_maint_dcache_all() is unreliable when build with gcc5 too when it is marked as noinline. This commit fixes the reliability issues by replacing the C-code with the ready to use asm implementation from the kernel. Given that this code when written as C-code clearly is quite fragile (also see the existing comments about the C-code being the way it is to get optimal assembly) and that we have a proven asm alternative, I believe that this is the best solution. Note that we actually already had a copy of the kernel's v7_flush_dcache_all() before this commit in arch/arm/mach-uniphier/arm32/lowlevel_init.S. This commit moves that code arch/arm/cpu/armv7/cache_v7_asm.S, renames it to __v7_flush_dcache_all(), and adds a v7_flush_dcache_all() wrapper which saves / restores the clobbered registers for use from C-code. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-04-11am33xx changed BOOT_DEVICE_SPI to correct valueVogt, Christof
Changed BOOT_DEVICE Code for SPI on AM33xx. According AM335x reference manual page 4960 (SPRUH73L-October 2011-Revised February 2015) Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2016-04-11rpi: remove redundant board filesStephen Warren
Now that rpi_*defconfig and Kconfig (rather than the config header file) provide the identity of the build, we don't need to separate config headers and board directories for each RPi variant. Set CONFIG_SYS_BOARD and CONFIG_SYS_CONFIG_NAME so that we can get rid of the duplication. This requires a tiny number of extra ifdefs in the config header. The only disadvantage of this approach is that the $board/$board_name environment variables aren't as descriptive as they used to be. This isn't really an issue because those only exist to allow scripts to create DTB filenames at runtime. However, the RPi board code already sets $fdtfile to something more accurate based on FW-reported board ID anyway. While at it, unify some Kconfig select options, and add a MAINTAINERS entry for bcm283x too. Partially-suggested-by: Tom Rini <trini@konsulko.com> Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-04-11ARM: rpi: add some missing Kconfig help textStephen Warren
Add notes re: enabling the UART to the RPi 3 32-bit help text. Fully describe the RPi 3 64-bit board option. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-04-11ARM: add Raspberry Pi 3 64-bit configStephen Warren
On all Pis so far, the VC FW provides a short stub to set up the ARM CPU before entering the kernel (a/k/a U-Boot for us). This feature is not currently supported by the VC FW when booting in 64-bit mode. However, this feature will likely appear in the near future, and this U-Boot port assumes that such a feature is in place. Without that feature, or a temporary workaround described below, U-Boot will not boot. Once the VC FW does provide the ARM stub, u-boot.bin built for rpi_3 can be used drectly as kernel7.img, in the same way as any other RPi port. The following config.txt is required: # Fix mini UART input frequency, and setup/enable up the UART. # Without this option, U-Boot will not boot, even if you don't care # about the serial console. This option will always be required for # all RPi3 use-cases, unless the PL011 UART is used, which is not # yet supported by rpi_3* builds of U-Boot. enable_uart=1 # Boot in AArch64 (64-bit) mode. # It is possible that a future VC FW will remove the need for this # option, instead auto-setting 32-/64-bit mode based on the "kernel" # filename present on the SD card. arm_control=0x200 Prior to the VC FW providing the ARM boot stub, you can use the following steps to build an equivalent stub into the U-Boot binary: git clone https://github.com/swarren/rpi-3-aarch64-demo.git \ ../rpi-3-aarch64-demo (cd ../rpi-3-aarch64-demo && ./build.sh) Build U-Boot for rpi_3 in the usual way cat ../rpi-3-aarch64-demo/armstub64.bin u-boot.bin > u-boot.bin.stubbed Use u-boot.bin.stubbed as kernel7.img on the Pi SD card. In this case, the following additional entries are required in config.txt: # Tell the FW to load the kernel image at address 0, the reset vector. kernel_old=1 Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-04-11ARM: allow CONFIG_GICV* not to be definedStephen Warren
There are ARM SoCs (such as the BCM2837) do not contain an ARM GIC. Fix the ARMv8 CPU startup code to compile in this case. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-04-10Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini
2016-04-10arm: socfpga: Nuke useless includeMarek Vasut
The dwmmc.h include was forgotten during the migration of dwmmc probing to DM. Since the shiny DM is in place now, remove this relic of the past. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
2016-04-10arm: socfpga: Handle phy-mode OF property for GMACsMarek Vasut
Thus far, the socfpga init code had hard-coded the configuration of the ethernet PHY interface to RGMII in the ethernet registers in sysmgr space, so PHYs connected in another modes did not work. This patch fixes support for configurations where the ethernet PHYs are connected over MII/GMII/RMII interfaces by parsing the phy-mode OF property of the GMACs and configuring the ethernet registers in sysmgr space accordingly. Signed-off-by: Marek Vasut <marex@denx.de> Reported-by: Denis Bakhvalov <denis.bakhvalov@nokia.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
2016-04-10arm: add missing writes[bwql], reads[bwql].Purna Chandra Mandal
ARM defines __raw_writes[bwql], __raw_reads[bwql] in arch io.h but not the writes[bwql], reads[bwql] needed by some drivers. Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
2016-04-06Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriqTom Rini
2016-04-06armv8: LS2080A: Consolidate LS2080A and LS2085AYork Sun
LS2080A is the primary SoC, and LS2085A is a personality with AIOP and DPAA DDR. The RDB and QDS boards support both personality. By detecting the SVR at runtime, a single image per board can support both SoCs. It gives users flexibility to swtich SoC without the need to reprogram the board. Signed-off-by: York Sun <york.sun@nxp.com> CC: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2016-04-06arm: ls102xa: Fix order of CSU indexes in ns_access.hVincent Siles
This patch aims to fix the order of CSU slave index for the LS1021a board. Signed-off-by: Vincent Siles <vincent.siles@provenrun.com> Reviewed-by: Alison Wang <alison.wang@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2016-04-06armv8: LSCH2 early and final mmu needs matching NS attributeEd Swarthout
When switching between the early and final mmu tables, the stack will get corrupted if the Non-Secure attribute is different. For ls1043a, this issue is currently masked because flush_dcache_all is called before the switch when CONFIG_SYS_DPAA_FMAN is defined. Signed-off-by: Ed Swarthout <Ed.Swarthout@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2016-04-06spi: kirkwood_spi: Add support for multiple chip-selects on MVEBUStefan Roese
Currently only chip-select 0 is supported by the kirkwood SPI driver. The Armada XP / 38x SoCs also use this driver and support multiple chip selects. This patch adds support for multiple CS on MVEBU. The register definitions are restructured a bit with this patch. Grouping them to the corresponding registers. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Reviewed-by: Jagan Teki <jteki@openedev.com>
2016-04-04Merge branch 'master' of git://www.denx.de/git/u-boot-microblazeTom Rini
2016-04-04ARM64: zynqmp: Select SYS_CONFIG_NAME via KconfigMichal Simek
This option enable adding new platform suport just by adding defconfig and DTS file which will target generic configuration for SoC. Make no sense to extend Kconfig just create a pointer between DTS and configuration file. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-04net: gem: Allow to set the MAC from an EEPROMJoe Hershberger
Provide board specific option how to read MAC address from ROM. Do it in generic way to be reusable by differnet boards. If this is not enough board specific functions can be created. Signed-off-by: Joe Hershberger <joe.hershberger@gmail.com> # driver part Signed-off-by: Michal Simek <monstr@monstr.eu> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-04arm: mvebu: Don't enable d-cache on A375Stefan Roese
Armada 375 still has some problems with d-cache enabled in the ethernet driver (mvpp2). So lets keep the d-cache disabled until this is solved. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
2016-04-04arm: mvebu: Add basic support for Armada 375 eval board db-88f6720Stefan Roese
This patch adds basic support for the Marvell A375 eval board. Tested are the following interfaces: - I2C - SPI - SPI NOR - Ethernet (mvpp2), port 0 & 1 Currently the A375 SerDes and DDR3 init code is not intergrated. So the SPL U-Boot is not fully functional. Right now, this A375 mainline U-Boot can only be used by chainloading it via the original Marvell U-Boot. This can be done via this command: => tftpboot 00800000 a375/u-boot-dtb.bin;go 00800000 Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
2016-04-04arm: mvebu: Add basic support for the Marvell Armada 375 SoCStefan Roese
This patch adds basic support for the Armada 375. Please note that currently the SerDes and DDR3 init code for the A375 is not included / enabled. This will be done in a later, follow-up patch. Right now, this A375 mainline U-Boot can only be used by chainloading it via the original Marvell U-Boot. This can be done via this command: => tftpboot 00800000 a375/u-boot-dtb.bin;go 00800000 Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
2016-04-01board: Add Qualcomm Dragonboard 410C supportMateusz Kulikowski
This commit add support for 96Boards Dragonboard410C. It is board based on APQ8016 Qualcomm SoC, complying with 96boards specification. Features (present out of the box): - 4x Cortex A53 (ARMv8) - 2x USB Host port - 1x USB Device port - 4x LEDs - 1x HDMI connector - 1x uSD connector - 3x buttons (Power, Vol+, Vol-/Reset) - WIFI, Bluetooth with integrated antenna - 8GiB eMMC U-Boot boots chained with fastboot in 64-bit mode. For detailed build instructions see readme.txt in board directory. Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Tested-by: Simon Glass <sjg@chromium.org>
2016-04-01arm: Add support for Qualcomm Snapdragon familyMateusz Kulikowski
First supported chip is APQ8016 (that is compatible with MSM8916). Drivers in SoC code: - Reset controller (PSHOLD) - Clock controller (very simple clock configuration for MMC and UART) Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
2016-04-01sniper: Change vendor name from lge to lg, matching devicetree vendor prefixPaul Kocialkowski
This moves the sniper board from the lge to lg, in order to match the devicetree vendor prefix already defined in the kernel. Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
2016-04-01arm: spl: Align default board_init_f comment with codeAndreas Dannenberg
The default board_init_f() implementation performs a call to board_init_r() as the last step of the sequence. Fix the comment for this function to reflect the actual execution flow. Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
generated by cgit (git 2.34.1) at 2024-12-30 20:27:44 +0000