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2020-04-09mips: cmd: go: Flush cache before jumping to app/imageStefan Roese
It has been noticed on MT7628/88 platforms, that booting the RAM image does not work reliably. Sometimes it works and sometimes not. Debugging showed that this "might" be a cache related issue as very strange errors occurred (e.g. output corrupted etc). This patch adds a cache flush for the complete SDRAM area to the go cmd before jumping to the entry point for the MIPS architecture. The complete area is flushed as we don't know at this point, how big the area of the "application" really is. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Tested-by: Mauro Condarelli <mc5686@mclink.it> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Mauro Condarelli <mc5686@mclink.it> Cc: Weijie Gao <weijie.gao@mediatek.com>
2020-04-09mips: vcoreiii: Fix cache coherency issuesLars Povlsen
This patch fixes an stability issue seen on some vcoreiii targets, which was root caused to a cache inconsistency situation. The inconsistency was caused by having kuseg pointing to NOR area but used as a stack/gd/heap area during initialization, while only relatively late remapping the RAM area into kuseg position. The fix is to initialize the DDR right after the TLB setup, and then remapping it into position before gd/stack/heap usage. Reported-by: Ramin Seyed-Moussavi <ramin.moussavi@yacoub.de> Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Reviewed-by: Horatiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
2020-04-09MIPS: allow override of get_tbclk()Alex Nemirovsky
Allow SoC or board layers with reconfigurable cpu clocks capabilties to do implementation specific lookups and service get_tbclk() requests. Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
2020-04-09MIPS: allow override of flush_dcache_range()Alex Nemirovsky
Useful in custom HW designs which have a need to flush dcache range in a completely non standard way. Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
2020-04-03arch: Add explicit linker script for u-boot-elfMichal Simek
Commit f4dc714aaa2d ("arm64: Turn u-boot.bin back into an ELF file after relocate-rela") introduce REMAKE_ELF option to recreate u-boot.elf from u-boot -> u-boot.bin + DT -> u-boot.elf. The best is to ilustrate it from make V=1 output cat u-boot-nodtb.bin dts/dt.dtb > u-boot-dtb.bin cp u-boot-dtb.bin u-boot.bin aarch64-linux-gnu-objcopy -I binary -B aarch64 -O elf64-littleaarch64 u-boot.bin u-boot-elf.o aarch64-linux-gnu-ld.bfd u-boot-elf.o -o u-boot.elf --defsym="_start"=0x8000000 -Ttext=0x8000000 Last command has no explicit linker script passed that's why toolchain internal linker script is used. In Binutils 2.32 case it contains SIZEOF_HEADERS symbol which has changed behavior by commit https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=64029e93683a266c38d19789e780f3748bd6a188 which result in situation that program headers has changed from (xilinx_zynqmp_mini_defconfig) Program Headers: Type Offset VirtAddr PhysAddr FileSiz MemSiz Flags Align LOAD 0x0000000000010000 0x00000000fffc0000 0x00000000fffc0000 0x0000000000018918 0x0000000000018918 RW 0x10000 to Program Headers: Type Offset VirtAddr PhysAddr FileSiz MemSiz Flags Align LOAD 0x0000000000000000 0x00000000fffb0000 0x00000000fffb0000 0x0000000000028918 0x0000000000028918 RW 0x10000 Xilinx tools like XSDB or Bootgen are using program headers for loading ELF to the right location and by above binutils change ELF is loaded to incorrect location. The patch is explicitly use u-boot-elf.lds (just cat now) for u-boot.elf recreation which is called when REMAKE_ELF is setup. By purpose u-boot-elf.lds doesn't contain OUTPUT_FORMAT/OUTPUT_ARCH to be able to use by all archs. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Tested-By: Álvaro Fernández Rojas <noltari@gmail.com>
2020-02-20dma-mapping: add <asm/dma-mapping.h> for all architecturesMasahiro Yamada
To avoid "asm/dma-mapping.h: No such file or directory" error, we need something. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-02-05dm: core: Create a new header file for 'compat' featuresSimon Glass
At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-17common: Move hang() to the same header as panic()Simon Glass
At present panic() is in the vsprintf.h header file. That does not seem like an obvious choice for hang(), even though it relates to panic(). So let's put hang() in its own header. Signed-off-by: Simon Glass <sjg@chromium.org> [trini: Migrate a few more files] Signed-off-by: Tom Rini <trini@konsulko.com>
2020-01-17common: Move RAM-sizing functions to init.hSimon Glass
These functions relate to memory init so move them into the init header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-17common: Move get_tbclk() to time.hSimon Glass
This function related to timer and most of the timer functions are in time.h, so move this function there. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-17common: Move clock functions into a new fileSimon Glass
These three clock functions don't use driver model and should be migrated. In the meantime, create a new file to hold them. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-17common: Move relocate_code() to init.hSimon Glass
This is an init function so move it out of the common header. Avoid using the typedef so that we don't have to include the global_data header file. Also tidy up the function style in comments while we are here. Signed-off-by: Simon Glass <sjg@chromium.org>
2019-12-02Merge branch '2019-12-02-master-imports'Tom Rini
- A large series of clean-ups to reduce common.h contents
2019-12-02common: Move trap_init() out of common.hSimon Glass
Move this function into the init.h header file. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-12-02common: Move board_get_usable_ram_top() out of common.hSimon Glass
Move this function into init.h which seems to be designed for this sort of thing. Also update the header to declare struct global_data so that it can be included without global_data.h being needed. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02common: Move interrupt functions into a new headerSimon Glass
These functions do not use driver model but are fairly widely used in U-Boot. But it is not clear that they will use driver model anytime soon, so we don't want to label them as 'legacy'. Move them to a new irq_func.h header file. Avoid the name 'irq.h' since it is widely used in U-Boot already. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02common: Move ARM cache operations out of common.hSimon Glass
These functions are CPU-related and do not use driver model. Move them to cpu_func.h Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02common: Move some cache and MMU functions out of common.hSimon Glass
These functions belong in cpu_func.h. Another option would be cache.h but that code uses driver model and we have not moved these cache functions to use driver model. Since they are CPU-related it seems reasonable to put them here. Move them over. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02common: Move get_ticks() function out of common.hSimon Glass
This function belongs in time.h so move it over and add a comment. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-11-29MIPS: remove Micronas VCT boardsDaniel Schwierzeck
The deadline for migration to CONFIG_DM is v2020.01. The VCT baords would need an almost complete rewrite of all drivers to support driver model. Unless someone has access to the hardware and volunteers to do the migration, the board should be scheduled for removal. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Acked-by: Stefan Roese <sr@denx.de>
2019-10-25mips: mtmips: select essential drivers in KconfigWeijie Gao
Some drivers (clk, pinctrl, reset, ...) are necessary for reset of the system, they should be always selected. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-10-25dts: mtmips: add default pinctrl to eth nodes for all boardsWeijie Gao
This patch adds default eth pinctrl for all boards. There are two pinctrl nodes used for two scenarios: ephy_iot_mode - for IOT boards which have only one port (PHY0) ephy_router_mode - For routers which have more than one ports Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-10-25dts: mtmips: add default pinctrl for gardena-smart-gateway-mt7688Weijie Gao
This adds default pinctrl (dual SPI chip select) for gardena smart gateway Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-10-25dts: mtmips: add mmc related nodes for mt7628an.dtsiWeijie Gao
This patch adds mmc related nodes for mt7628an.dtsi Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-10-25dts: mtmips: enable eth port0 led and link poll functions for all boardsWeijie Gao
This patch adds default p0led status and phy0 link polling for all boards. Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-10-25dts: mtmips: update reset controller node for mt7628Weijie Gao
This patch updates reset controller node for mt7628 Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-10-25dts: mtmips: add default pinctrl for uart nodesWeijie Gao
This patch adds default pinctrl for uart nodes Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-10-25dts: mtmips: add pinctrl node for mt7628Weijie Gao
This patch adds pinctrl node with default pin state for mt7628an.dtsi. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-10-25dts: mtmips: add clock node for mt7628Weijie Gao
This patch adds clkctrl node for mt7628 and adds clocks property for some node. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-10-25dts: mtmips: enable high-speed UART support for mt7628Weijie Gao
All three UARTs of mt7628 are actually MediaTek's high-speed UARTs which support baudrate up to 921600. The high-speed UART is compatible with ns16550 when baudrate <= 115200. Add compatible string to dtsi file so u-boot can use it when serial_mtk driver is built in. Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-10-25dts: mtmips: move uart property clock-frequency into mt7628an.dtsiWeijie Gao
The UART of MT7628 has fixed 40MHz input clock so there is no need to put clock-frequency in every dts files. Just put it into the common dtsi file. Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-10-25mips: bmips: switch to board defines for dtbÁlvaro Fernández Rojas
Fixes commit 344db3f, which added missing bmips dtbs depending on their SoCs. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2019-10-25bmips: correct name charactersÁlvaro Fernández Rojas
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2019-10-25bmips: enable vr-3032u nand supportÁlvaro Fernández Rojas
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2019-10-25bmips: bcm63268: add support for brcmnandÁlvaro Fernández Rojas
BCM63268 uses 4.0 HW nand controller, which is currently supported by brcmnand driver. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2019-10-25bmips: bcm6362: add support for brcmnandÁlvaro Fernández Rojas
BCM6362 uses old 2.2 HW nand controller, which isn't currently supported by brcmnand driver. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2019-10-25bmips: bcm6328: add support for brcmnandÁlvaro Fernández Rojas
BCM6328 uses old 2.2 HW nand controller, which isn't currently supported by brcmnand driver. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2019-10-25bmips: bcm6368: add support for brcmnandÁlvaro Fernández Rojas
BCM6368 uses old 2.1 HW nand controller, which isn't currently supported by brcmnand driver. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2019-10-25MIPS: add compile time definition of L2 cache sizeRamon Fried
If configuration is set to skip low level init, automatic probe of L2 cache size is not performed and the size is set to 0. Flushing or invalidating the L2 cache will fail in this case. Add a static configuration (SYS_DCACHE_LINE_SIZE) with default set to 0. Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
2019-08-11env: Move env_init() to env.hSimon Glass
Move env_init() over to the new header file. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-07-05mips: mt76xx: Implement new d-cache fix in last_stage_init()Stefan Roese
With commit 06985289d452 ("watchdog: Implement generic watchdog_reset() version") the init sequence has changed in arch_misc_init(), resulting in a re-appearance of the d-cache issue on MT7688 boards (e.g. gardena). When this happens, the first (or sometimes later ones as well) TFTP command hangs and does not complete correctly. This leads to the assumption that the d-cache is not in a clean state once the ethernet driver is called (d-cache is used here for the buffers). The old work- around with the cache flush somehow does not work any more now with the new code change. Unfortunately adding CONFIG_SYS_MALLOC_CLEAR_ON_INIT also did not fix this issue. With v2019.07-rc3 it shows again. The time of accessing the data seems to be very important here. It needs to be "very late" in the boot process. Testing has shown, that copying a 64KiB area in DDR at a very late bootup time, directly before calling into the prompt, fixes this issue. Flushing of the complete d-cache does not seem to necessary, as this copy alone seems to fix this problem. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-05-24mips: mt76xx: Remove cache workaround and select SYS_MALLOC_CLEAR_ON_INITStefan Roese
With commit 06985289d452 ("watchdog: Implement generic watchdog_reset() version") the init sequence has changed in arch_misc_init(), resulting in a re-appearance of the d-cache issue on MT7688 boards (e.g. gardena). When this happens, the first (or sometimes later ones as well) TFTP command hangs and does not complete correctly. This leads to the assumption that the d-cache is not in a clean state once the ethernet driver is called (d-cache is used here for the buffers). The old work- around with the cache flush somehow does not work any more now with the new code change. To fix this issue, this patch now removes the old workaround and selects CONFIG_SYS_MALLOC_CLEAR_ON_INIT for ARCH_MTMIPS. With this option the complete malloc area is initialized with zeros (cache lines are touched). Testing has shown that this also fixes the issue on the MT7688 boards. Signed-off-by: Stefan Roese <sr@denx.de> Suggested-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-05-03net: mscc: ocelot: Update DTS for Luton pcb90Horatiu Vultur
Update device tree for luton to add support for luton pcb90. This pcb has 24 ports from which 12 ports are connected to SerDes6G. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
2019-05-03mips: rename mach-mt7620 to mach-mtmipsWeijie Gao
Currently mach-mt7620 contains only support for mt7628. To avoid confusion, rename mach-mt7620 to mach-mtmips, which means MediaTek MIPS platforms. MT7620 and MT7628 should be distinguished by SOC_MT7620 and SOC_MT7628 because they do not share the same lowlevel codes. Dependencies of four drivers are changed to SOC_MT7628 as these drivers are only used by MT7628. Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-05-03net: mscc: ocelot: Update DTS for Ocelot pcb120.Horatiu Vultur
Update device tree for ocelot to add support for ocelot pcb120. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
2019-05-03net: mscc: ocelot: Update network driver for pcb120Horatiu Vultur
Update Ocelot network driver to have support also for pcb120. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
2019-05-03arch: mips: Update initrd_start and initrd_endHoratiu Vultur
Microsemi SoC defines CONFIG_SYS_SDRAM_BASE to be 0x80000000, which represents the start of kseg0 and represents a virtual address. Meaning that the initrd_start and initrd_end point somewhere kseg0. When these parameters are passed to linux kernel through DT they are pointing somewhere in kseg0 which is a virtual address but linux kernel expects the addresses to be physical addresses(in kuseg) because it is converting the physical address to a virtual one. Therefore update the uboot to pass the physical address of initrd_start and initrd_end by converting them using the function virt_to_phys before setting up the DT. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-05-03MSCC: delete obsolete reference to MSCC_BITBANG_SPI_GPIORobert P. J. Day
Remove "select MSCC_BITBANG_SPI_GPIO" since Kbuild option was deleted back in commit ace9c103df2875d2b435dbd7b36618020edfd1c0: commit ace9c103df2875d2b435dbd7b36618020edfd1c0 Author: Lars Povlsen <lars.povlsen@microchip.com> Date: Tue Jan 8 10:38:35 2019 +0100 mips: gpio: mscc: Obsoleted gpio-mscc-bitbang-spi.c
2019-05-03net: mscc: serval: Add ethernet nodes for ServalHoratiu Vultur
Add ethernet nodes for Serval SoCs family. There are 2 pcb in this family: pcb105 and pcb106. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
2019-05-03mips: mscc: serval: Fix resetHoratiu Vultur
In case the ddr training was failing, it couldn't reset, it was just hanging. Therefore reimplement it, so when ddr training is failing it would call _machine_restart, which power downs the DDR and does a force reset. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
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