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path: root/arch/nds32/cpu/n1213/ag101/cpu.c
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2017-05-22nds32: Support AE3XX platform.rick
Support Andestech AE3xx platform: serial, timer device tree flow. Signed-off-by: rick <rick@andestech.com>
2013-07-24Add GPL-2.0+ SPDX-License-Identifier to source filesWolfgang Denk
Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
2012-07-20nds32: split common cache access from cpu into libMacpaul Lin
This commit does the following updates. 1. Split the common cache access from cpu.c into lib folder. 2. Rename the following cache api to adapt common.h - dcache_flush_rang -> flush_dcache_rang - icache_inval_range -> invalidate_icache_range 3. Add invalidate_dcache_range Signed-off-by: Macpaul Lin <macpaul@gmail.com>
2011-11-23nds32/ag101: clean up for SoC related codeMacpaul Lin
Remove unneccessary codes. 1. Clean up for cpu related code. 2. Clean up for timer related code. Signed-off-by: Macpaul Lin <macpaul@andestech.com>
2011-10-22nds32/ag101: cpu and init funcs of SoC ag101Macpaul Lin
SoC ag101 is the first chip using NDS32 N1213 cpu core. Add header file of device offset support for SoC ag101. Add main function of SoC ag101 based on NDS32 n1213 core. Add lowlevel_init.S and other periphal related code. This version of lowlevel_init.S also replace hardcode value by MARCO defines from the GPL version andesboot for better code quality. Signed-off-by: Macpaul Lin <macpaul@andestech.com>