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path: root/arch/powerpc/cpu/mpc85xx
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2010-08-19mpx85xx/fdt: Add cpu-release-addr for all coresMatthew McClintock
We currently do not add a cpu-release-addr for core 0, this is needed when we want to reset core 0 and later restart it from Linux Signed-off-by: Matthew McClintock <msm@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-08-19powerpc/85xx: Rename Security Engine Job Queue to Job Ring to match docsKumar Gala
Official docs call it the Job Ring not Job Queue for the p4080 security block. Match the docs to reduce confusion. Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-08-19powerpc/8xxx: share PIC defines among 85xx and 86xxKim Phillips
fixes breakeage introduced by commit a37c36f4e70bada297f281b0e542539ad43e50f6 "powerpc/8xxx: query feature reporting register for num cores on unknown cpus" Reported-by: Wolfgang Denk <wd@denx.de> Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-08-09net ppc: fix ethernet device names with spacesHeiko Schocher
since commit 1384f3bb8a4f9066805b70c1418eda78ecb73fdd ethernet names with spaces drop a Warning: eth device name has a space! message. This patch fix it for: - "FEC ETHERNET" devices found on mpc512x, mpc5xxx, mpc8xx and mpc8220 boards. renamed to "FEC". - "SCC ETHERNET" devices found on mpc8xx, mpc82xx based boards. Renamed to "SCC". - "HDLC ETHERNET" devices found on mpc8xx boards Renamed to "HDLC" - "FCC ETHERNET" devices found on mpc8260 and mpc85xx based boards. Renamed to "FCC" Tested on the kup4k board. Signed-off-by: Heiko Schocher <hs@denx.de> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2010-07-26powerpc/8xxx: Enabled address hashing for 85xxyork
For 85xx silicon which supports address hashing, it can be activated by hwconfig. Signed-off-by: York Sun <yorksun@freescale.com>
2010-07-26powerpc/p4080: Add workaround for erratum CPU22Kumar Gala
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-26powerpc/p4080: Add workaround for errata SERDES8Kumar Gala
Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com> Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-26powerpc/p4080: Add support for initializing SERDESKumar Gala
Add support for initializing the SERDES blocks on CoreNet style QoriQ devices and the p4080 specific SERDES tables to know which actual componetns are enabled. Additionally, split out the Frame Manger (FMAN) into its specific ethernet ports instead of gross level of the full FMAN. Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-26powerpc/85xx: Add support to initialize LIODN registers and portalsKumar Gala
On the new QorIQ/CoreNet based platforms we need to initialize the "portals" as access into the Data Path subystem as well as Logical IO Device Numbers (LIODN) that are used for the IOMMU (PAMU). Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-26powerpc/p4080: Add support for CPC(Corenet platform cache) on CoreNet platformsKumar Gala
The CoreNet style platforms can have a L3 cache that fronts the memory controllers. Enable that cache as well as add information into the device tree about it. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-26powerpc/85xx: Move INIT_RAM_ADDR physical address to 36-bit spaceyork
If 36-bit physical address is used, move the INIT_RAM_ADDR to higher address. This frees the low 4GB address space for better use. Signed-off-by: York Sun <yorksun@freescale.com>
2010-07-21powerpc/85xx: Rework P1022 SERDES is_serdes_configured supportKumar Gala
Move serdes init until after we are in ram so we can keep track of a global static protocal map for the particular serdes config we are in. This makes is_serdes_configured() much simplier and not constantly reading registers to determine if a given device is enabled based on the protocol. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-21powerpc/85xx: Rework MPC8536 SERDES is_serdes_configured supportKumar Gala
Move serdes init until after we are in ram so we can keep track of a global static protocal map for the particular serdes config we are in. This makes is_serdes_configured() much simplier and not constantly reading registers to determine if a given device is enabled based on the protocol. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-20powerpc/p3041: Add various p3041 related definesKumar Gala
There are various locations that we have chip specific info: * Makefile for which ddr code to build * Added p3041 to cpu_type_list and SVR list * Added number of LAWs for p3041 * Set CONFIG_MAX_CPUS to 4 for p3041 Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-20powerpc/p5020: Add various p5020 related defines (and p5010)Kumar Gala
There are various locations that we have chip specific info: * Makefile for which ddr code to build * Added p5020 & p5010 to cpu_type_list and SVR list * Added number of LAWs for p5020 * Set CONFIG_MAX_CPUS to 2 for p5020 Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-20powerpc/mpc85xx: Report FMAN # to match user manualEmil Medve
The user manual refers to FMAN1 and FMAN2 not 0 and 1. Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-20powerpc/p4080: Add setting of clock-frequency for clockgen nodeKumar Gala
On QorIQ CoreNet based devices we have a global clocking block. We want to keep track of SYSCLK frequency as it is what is used to derive all other frequencies in the SoC Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-20powerpc/85xx: Use fdt_node_offset_by_compat_reg for clock-frequency updatesKumar Gala
Move to using fdt_node_offset_by_compat_reg to find the node offsets we want to update instead of using aliases. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-16powerpc/85xx: Move p1022ds slot code into board fileKumar Gala
The code to map SERDES configs to slot names is board specific and not chip specific. Thus it should live in board/freescale/p1022ds/ and not in arch/powerpc/cpu/. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-16powerpc/85xx: Add command to report errata workaroundsKumar Gala
Add 'errata' command to report what errata we workaround. Report workaround for erratum SATA-A001 on P1022/P1013. Also sorted the CONFIG_CMD_* list. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-16powerpc: add support for the Freescale P1022DS reference boardTimur Tabi
Specifics: 1) 36-bit only 2) Booting from NOR flash only 3) Environment stored in NOR flash only 4) No SPI support 5) No DIU support Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-16powerpc/85xx: Add recognition of e5500 coreKumar Gala
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-16powerpc 83xx/85xx: Merge lbc upmconfig codeBecky Bruce
Each platform had its own version of the upmconfig, despite the init process being identical. Now that we have a spot for common lbc code, create a common upmconfig() there. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Acked-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-16mpc85xx: Add reginfo commandBecky Bruce
The new command dumps the TLBCAM, the LAWs, and the BR/OR regs. Add CONFIG_CMD_REGINFO to the config for all MPC85xx parts. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-16mpc85xx: Add print_tlbcam() functionBecky Bruce
This dumps out the contents of TLB1 on 85xx-based systems. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-16mpc85xx: tlb.c cleanupsBecky Bruce
Extract the operation to read a tlb into a function - we will need this later to print out the tlbs, and there's no point in duplicating the code. Create a TSIZE_TO_BYTES macro to deal with the conversion from the MAS field to an actual size instead of duplicating this in code. There are a few misc other minor cleanups. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-1683xx/85xx/86xx: LBC register cleanupBecky Bruce
Currently, 83xx, 86xx, and 85xx have a lot of duplicated code dedicated to defining and manipulating the LBC registers. Merge this into a single spot. To do this, we have to decide on a common name for the data structure that holds the lbc registers - it will now be known as fsl_lbc_t, and we adopt a common name for the immap layouts that include the lbc - this was previously known as either im_lbc or lbus; use the former. In addition, create accessors for the BR/OR regs that use in/out_be32 and use those instead of the mismash of access methods currently in play. I have done a successful ppc build all and tested a board or two from each processor family. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Acked-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-16powerpc/8xxx: Add is_core_disabled to remove disabled cores from dtbKumar Gala
If we explicitly disabled a core remove it from the dtb we pass on to the kernel. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-04Make sure that argv[] argument pointers are not modified.Wolfgang Denk
The hush shell dynamically allocates (and re-allocates) memory for the argument strings in the "char *argv[]" argument vector passed to commands. Any code that modifies these pointers will cause serious corruption of the malloc data structures and crash U-Boot, so make sure the compiler can check that no such modifications are being done by changing the code into "char * const argv[]". This modification is the result of debugging a strange crash caused after adding a new command, which used the following argument processing code which has been working perfectly fine in all Unix systems since version 6 - but not so in U-Boot: int main (int argc, char **argv) { while (--argc > 0 && **++argv == '-') { /* ====> */ while (*++*argv) { switch (**argv) { case 'd': debug++; break; ... default: usage (); } } } ... } The line marked "====>" will corrupt the malloc data structures and usually cause U-Boot to crash when the next command gets executed by the shell. With the modification, the compiler will prevent this with an error: increment of read-only location '*argv' N.B.: The code above can be trivially rewritten like this: while (--argc > 0 && **++argv == '-') { char *arg = *argv; while (*++arg) { switch (*arg) { ... Signed-off-by: Wolfgang Denk <wd@denx.de> Acked-by: Mike Frysinger <vapier@gentoo.org>
2010-05-1285xx/fsl-sata: Use is_serdes_configured() to determine if SATA is enabledKumar Gala
On the MPC85xx platform if we have SATA its connected on SERDES. Determing if SATA is enabled via sata_initialize should not be board specific and thus we move it out of the MPC8536DS board code. Additionally, now that we have is_serdes_configured() we can determine if the given SATA port is enabled and error out if its not in the driver. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-05-1285xx: Add is_serdes_configured() support to MPC8536 SERDESKumar Gala
Add the ability to determine if a given IP block connected on SERDES is configured. This is useful for things like PCIe and SRIO since they are only ever connected on SERDES. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-04-26mpc85xx: Add the ability to set LCRR[CLKDIV] to improve R/W speed of flashLan Chunhe
Signed-off-by: Lan Chunhe <b25806@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-04-2685xx: Fix compile warningKumar Gala
cpu.c: In function 'checkcpu': cpu.c:47: warning: unused variable 'gur' Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-04-2685xx: Convert cpu_init_f code to use out_be32 for LBC registersKumar Gala
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-04-26ppc/p4080: Fix synchronous frequency calculationsSrikanth Srinivasan
When DDR is in synchronous mode, the existing code assigns sysclk frequency to DDR frequency. It should be synchronous with the platform frequency. CPU frequency is based on platform frequency in synchronous mode. Also fix: * Fixes the bit mask for DDR_SYNC (RCWSR5[184]) * Corrects the detection of synchronous mode. Signed-off-by: Srikanth Srinivasan <srikanth.srinivasan@freescale.com> Signed-off-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-04-21Move arch/ppc to arch/powerpcStefan Roese
As discussed on the list, move "arch/ppc" to "arch/powerpc" to better match the Linux directory structure. Please note that this patch also changes the "ppc" target in MAKEALL to "powerpc" to match this new infrastructure. But "ppc" is kept as an alias for now, to not break compatibility with scripts using this name. Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Wolfgang Denk <wd@denx.de> Acked-by: Detlev Zundel <dzu@denx.de> Acked-by: Kim Phillips <kim.phillips@freescale.com> Cc: Peter Tyser <ptyser@xes-inc.com> Cc: Anatolij Gustschin <agust@denx.de>
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