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Offsets were overlaping, causing pamu access violations in
hypervised scenarios.
Signed-off-by: Cristian Sovaiala <cristian.sovaiala@freescale.com>
Signed-off-by: Laurentiu Tudor <Laurentiu.Tudor@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
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Not all portals might be managed and therefore visible.
Set the isdr register so that the corresponding isr register
won't be set. This is required when supporting power management.
Signed-off-by: Jeffrey Ladouceur <Jeffrey.Ladouceur@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
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Commit f29f804a93e87c17670607641d120f431a3b0633 generalized the TLB
mapping function, but made the DDR mapping leftover size to zero,
causing the message not printed.
Signed-off-by: York Sun <yorksun@freescale.com>
CC: Alexander Graf <agraf@suse.de>
CC: Scott Wood <scottwood@freescale.com>
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move usb device tree fixup code from "arch/powerpc/" to "drivers/usb/"
so that it works independent of architecture it is running on
Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
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Introduce a Makefile under arch/$ARCH/ and include it in the
top Makefile (similar to Linux kernel). This allows further
refactoringi like moving architecture-specific code out of global
makefiles, deprecating config variables (CPU, CPUDIR, SOC) or
deprecating arch/$ARCH/config.mk.
In contrary to Linux kernel, U-Boot defines the ARCH variable by
Kconfig, thus the arch Makefile can only included conditionally
after the top config.mk.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Acked-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
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This board sprinkles #ifdef(CONFIG_HERMES) over various global files
such as include/common.h, common/board_r.c, common/cmd_bdinfo.c.
Let's zap such an ill-behaved board.
It has not been converted to generic board yet and mpc8xx is old
enough.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Wolfgang Denk <wd@denx.de>
Acked-by: Wolfgang Denk <wd@denx.de>
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Newer qoriq socs have an updated dma ip block with a
different compatible. Let's make sure we use the proper
string so that the dmas get their liodn.
In order to have the means to specify the compatible
string, the liodn setting macros were updated to receive
a new parameter for it.
The following SoCs were changed to use the new compatible:
T1023/4, T1040, T2080/1, T4240, B4860.
Signed-off-by: Laurentiu Tudor <Laurentiu.Tudor@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
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Increase IO drive strength to fix FCS error on RGMII ports
on T1024QDS.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
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fm_standard_init() initializes each 10G port by FM_TGEC_INFO_INITIALIZER.
but it needs different implementation of FM_TGEC_INFO_INITIALIZER on different SoCs.
on SoCs earlier(e.g. T4240, T2080), the notation between 10GEC and MAC as below:
10GEC1->MAC9, 10GEC2->MAC10, 10GEC3->MAC1, 10GEC4->MAC2
on SoCs later(e.g. T1024, etc), the notation between 10GEC and MAC as below:
10GEC1->MAC1, 10GEC2->MAC2
so we introduce CONFIG_FSL_FM_10GEC_REGULAR_NOTATION to fit the new SoCs on
which 10GEC enumeration is consistent with MAC enumeration.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
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T1024RDB is a Freescale Reference Design Board that hosts the T1024 SoC.
T1024RDB board Overview
-----------------------
- T1024 SoC integrating two 64-bit e5500 cores up to 1.4GHz
- CoreNet fabric supporting coherent and noncoherent transactions with
prioritization and bandwidth allocation
- 32-/64-bit DDR3L SDRAM memory controller with ECC and interleaving support
- Accelerator: DPAA components consist of FMan, BMan, QMan, DCE and SEC
- Ethernet interfaces:
- Two 10M/100M/1G RGMII ports on-board
- one 10Gbps XFI interface
- PCIe: Three PCIe controllers: one PCIe Slot and two Mini-PCIe connectors.
- SerDes: 4 lanes up to 10.3125GHz
- IFC: 128MB NOR Flash, 512MB NAND Flash and CPLD
- eSPI: 64MB N25Q512 SPI flash.
- Deep Sleep power implementaion (wakeup from GPIO/Timer/Ethernet/USB)
- USB: Two Type-A USB2.0 ports with internal PHY
- eSDHC: Support SD, SDHC, SDXC and MMC/eMMC
- I2C: Four I2C controllers
- UART: Two UART serial ports
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
[York Sun: Fix ft_board_setup() type, fix MAINTAINERS for SECURE_BOOT
Fix Kconfig by adding SUPPORT_SPL]
Reviewed-by: York Sun <yorksun@freescale.com>
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T1024QDS is a high-performance computing evaluation, development and
test platform for T1024 QorIQ Power Architecture processor.
T1024QDS board Overview
-----------------------
- T1024 SoC integrating two 64-bit e5500 cores up to 1.4GHz
- CoreNet fabric supporting coherent and noncoherent transactions with
prioritization and bandwidth allocation
- 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and interleaving support
- Accelerator: DPAA components consist of FMan, BMan, QMan, DCE and SEC
- Ethernet interfaces:
- Two 10M/100M/1G RGMII ports on-board
- Three 1G/2.5Gbps SGMII ports
- Four 1Gbps QSGMII ports
- one 10Gbps XFI or 10Base-KR interface
- SerDes: 4 lanes up to 10.3125GHz Supporting SGMII/QSGMII, XFI, PCIe, SATA and Aurora
- PCIe: Three PCI Express controllers with five PCIe slots.
- IFC: 128MB NOR Flash, 2GB NAND Flash, PromJet debug port and Qixis FPGA
- Video: DIU supports video up to 1280x1024x32 bpp.
- Chrontel CH7201 for HDMI connection.
- TI DS90C387R for direct LCD connection.
- Raw (not encoded) video connector for testing or other encoders.
- QUICC Engine block
- 32-bit RISC controller for flexible support of the communications peripherals
- Serial DMA channel for receive and transmit on all serial channels
- Two universal communication controllers, supporting TDM, HDLC, and UART
- Deep Sleep power implementaion (wakeup from GPIO/Timer/Ethernet/USB)
- eSPI: Three SPI flash devices.
- SATA: one SATA 2.O.
- USB: Two USB2.0 ports with internal PHY (one Type-A + one micro Type mini-AB)
- eSDHC: Support SD, SDHC, SDXC and MMC/eMMC.
- I2C: Four I2C controllers.
- UART: Two UART on board.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
[York Sun: Fix ft_board_setup() type, fix MAINTAINERS for SECURE_BOOT
Fix Kconfig by adding SUPPORT_SPL]
Reviewed-by: York Sun <yorksun@freescale.com>
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Add support for Freescale T1024/T1023 SoC.
The T1024 SoC includes the following function and features:
- Two 64-bit Power architecture e5500 cores, up to 1.4GHz
- private 256KB L2 cache each core and shared 256KB CoreNet platform cache (CPC)
- 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and interleaving support
- Data Path Acceleration Architecture (DPAA) incorporating acceleration
- Four MAC for 1G/2.5G/10G network interfaces (RGMII, SGMII, QSGMII, XFI)
- High-speed peripheral interfaces
- Three PCI Express 2.0 controllers
- Additional peripheral interfaces
- One SATA 2.0 controller
- Two USB 2.0 controllers with integrated PHY
- Enhanced secure digital host controller (SD/eSDHC/eMMC)
- Enhanced serial peripheral interface (eSPI)
- Four I2C controllers
- Four 2-pin UARTs or two 4-pin UARTs
- Integrated Flash Controller supporting NAND and NOR flash
- Two 8-channel DMA engines
- Multicore programmable interrupt controller (PIC)
- LCD interface (DIU) with 12 bit dual data rate
- QUICC Engine block supporting TDM, HDLC, and UART
- Deep Sleep power implementaion (wakeup from GPIO/Timer/Ethernet/USB)
- Support for hardware virtualization and partitioning enforcement
- QorIQ Platform's Trust Architecture 2.0
Differences between T1024 and T1023:
Feature T1024 T1023
QUICC Engine: yes no
DIU: yes no
Deep Sleep: yes no
I2C controller: 4 3
DDR: 64-bit 32-bit
IFC: 32-bit 28-bit
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
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Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
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XFI does not work stable on current board, it's due to heat sink issue,
to make it work stable the board needs additional heat sink, enable two
XFI lanes only. Right now we do not have such an erratum for the issue,
so use a define CONFIG_SYS_FSL_B4860QDS_XFI_ERR to identify it.
The workaround will only be used in XFI protocols and only if the
hwconfig indicates that XFI is prefered.
A new VSC3308 config function is used instead of re-use the original
function, to avoid making the function complex and ugly.
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
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Addded Alternate options with LC VCO for following protocols:
0x02 --> 0x01
0x08 --> 0x07
0x18 --> 0x17
0x1E --> 0x1D
0x49 --> 0x48
0x6F --> 0x6E
0x9A --> 0x99
0x9E --> 0x9D
Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
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T2080 v1.0 has this errata while v1.1 has fixed
this errata by hardware, add a new function has_errata_a007186
to check the SVR_SOC_VER, SVR_MAJ and SVR_MIN first,
if the sil has errata a007186, then run the errata code,
if not, doesn't run the code.
Signed-off-by: Zhao Qiang <B45475@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
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Workaround of Errata A-008044 was implemented without errata number and it is
enabled by default. Errata A-008044 is only valid for T1040 Rev 1.0.
So put errata number and make it conditional.
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
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When device is configured to load RCW from NAND flash IFC_A[16:31] are driven
low after RCW loading. Hence Devices connected on IFC_CS[1:7] and using
IFC_A[16:31] lines are not accessible.
Workaround is already in-place.
Put the errata number to adhere errata handling framework.
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
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T2080 rev 1.1 changes MEM_RAT in RCW, which requires new parsing for ratio,
the same way as T4240 rev 2.0.
Signed-off-by: York Sun <yorksun@freescale.com>
CC: Shengzhou Liu <Shengzhou.Liu@freescale.com>
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Add serdes2 protocol 0x2e.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
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Conflicts:
drivers/mmc/fsl_esdhc.c
Signed-off-by: Tom Rini <trini@ti.com>
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Set TXFIFOTHRESH to adjust ddr pipeline delay for successful large
usb writes
Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
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U-Boot has never cared about the type when we get max/min of two
values, but Linux Kernel does. This commit gets min, max, min3, max3
macros synced with the kernel introducing type checks.
Many of references of those macros must be fixed to suppress warnings.
We have two options:
- Use min, max, min3, max3 only when the arguments have the same type
(or add casts to the arguments)
- Use min_t/max_t instead with the appropriate type for the first
argument
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Pavel Machek <pavel@denx.de>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Tested-by: Lukasz Majewski <l.majewski@samsung.com>
[trini: Fixup arch/blackfin/lib/string.c]
Signed-off-by: Tom Rini <trini@ti.com>
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Move USB Errata checking code from "arch/powerpc" to architecture independent
file "fsl_usb.h" so that errata(s) become independent of the architecture.
For each erratum checking function for PPC arch, define a nop function for
non PPC arch for successful compilation in either case
Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
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This function can fail if the device tree runs out of space. Rather than
silently booting with an incomplete device tree, allow the failure to be
detected.
Unfortunately this involves changing a lot of places in the code. I have
not changed behvaiour to return an error where one is not currently
returned, to avoid unexpected breakage.
Eventually it would be nice to allow boards to register functions to be
called to update the device tree. This would avoid all the many functions
to do this. However it's not clear yet if this should be done using driver
model or with a linker list. This work is left for later.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Anatolij Gustschin <agust@denx.de>
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U-Boot has imported various utility macros from Linux
scattering them to various places without consistency.
In include/common.h are min, max, min3, max3, ARRAY_SIZE, ALIGN,
container_of, DIV_ROUND_UP, etc.
In include/linux/compat.h are min_t, max_t, round_up, round_down,
etc.
We also have duplicated defines of min_t in some *.c files.
Moreover, we are suffering from too cluttered include/common.h.
This commit moves various macros that originate in
include/linux/kernel.h of Linux to their original position.
Note:
This commit simply moves the macros; the macros roundup,
min, max, min2, max3, ARRAY_SIZE are different
from those of Linux at this point.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
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As auto-negotiation is not supported for 2.5G SGMII, we need
to add a new type PHY_INTERFACE_MODE_SGMII_2500 to differentiate
SGMII-1G and SGMII-2.5G with different setting for auto-negotiation.
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
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When an MPC5200 based board is used with SPL support, the main
U-Boot needs to clear the GD (global data) struct again.
Otherwise the generic board init code in board_init_f (when
CONFIG_SYS_GENERIC_BOARD is defined) will not initialize all
GD variables correctly. Resulting in a hangup on the a4m2k
board.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
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The gdsys hrcon board is based on a Freescale MPC8308 SOC.
It boots from NOR-Flash, kernel and rootfs are stored on
SD-Card.
On board peripherals include:
- 1x GbE (optional)
- Lattice ECP3 FPGA connected via eLBC and PCIe
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
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The argument boot_flags of board_init_f() is not used at all in the
powerpc specific board.c init sequence. Now with the generic init
sequence, this boot_flags arg is used by board_init_f().
This patch sets the r3 register that is used to pass the boot_flags
argument from the start.S board_init_f() call to 0 prior to the function
call to avoid unknown content to end up in gd->flags.
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Reviewed-by: York Sun <yorksun@freescale.com>
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IFC registers can be of type Little Endian or big Endian depending upon
Freescale SoC. Here SoC defines the register type of IFC IP.
So use IFC acessor functions instead of in_be32().
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
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LIODN entry for B4860/B4420 mentions USB controller as "mph"
insread of "dr". This results in PAMU not permitting bus
transactions for USB DR controller on B4860 resulting in
USB function failure. Replacing "fsl-usb2-mph" with
"fsl-usb2-dr" allows USB DR controller bus transactions
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Reviewed-by: Sethi Varun-B16395 <Varun.Sethi@freescale.com>
Reviewed-by: Sun Yusong-R58495 <yorksun@freescale.com>
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NEG bit default is '1' for external MDIOs as per FMAN-v3 RM, but on some
platforms, e.g. T2080QDS, this bit is '0', which leads to MDIO failure
on XAUI PHY, so set this bit definitely to align with the RM.
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: York Sun <yorksun@freescale.com>
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1. use Payload length check disable when enable MAC;
2. add XGMII support for setting MAC interface mode;
3. only enable auto negotiation for Non-XGMII mode;
4. return 0xffff if clause 22 is used to read 10G phy_id;
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Acked-By: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: York Sun <yorksun@freescale.com>
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mcc200 and prs200 are old and have no maintainer. Remove the boards.
This also removes the mcc200 specific 1bpp BMP support from
common/lcd.c
Cc: Wolfgang Denk <wd@denx.de>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: York Sun <yorksun@freescale.com>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
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ppc4xx i2c master gets stuck on errors while repeated start is
active. Can be easily reproduced by "i2c md" on an unpopulated
i2c address. There is not stop condition given, scl remains
pulled low.
The only way out seems to be doing a stop manually and then a
soft reset.
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
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There are a number of places where U-Boot intentionally and legally
accesses physical address 0x0000, for example when installing
exception vectors on systems where these are located in low memory.
Add "cppcheck-suppress nullPointer" comments to silence cppcheck
where this is intentional and legal.
Signed-off-by: Wolfgang Denk <wd@denx.de>
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I realized that with v2014.10 u-boot is not starting up on
ppc4xx boards with CONFIG_SYS_GENERIC_BOARD set.
I bisected it down to this:
d54d7eb support blackfin board initialization in generic board_f
With
d29437a ppc: Make ppc4xx ready for CONFIG_SYS_GENERIC_BOARD
I set gd to a defined value for ppc4xx in cpu_init_f().
I did not realize that the gd struct has also to be memset()
to zero at this point.
But at least commit d54d7eb assumes it is:
@@ -516,11 +528,13 @@ static int reserve_malloc(void)
/* (permanently) allocate a Board Info struct */
static int reserve_board(void)
{
- gd->start_addr_sp -= sizeof(bd_t);
- gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
- memset(gd->bd, '\0', sizeof(bd_t));
- debug("Reserving %zu Bytes for Board Info at: %08lx\n",
- sizeof(bd_t), gd->start_addr_sp);
+ if (!gd->bd) {
+ gd->start_addr_sp -= sizeof(bd_t);
+ gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
+ memset(gd->bd, '\0', sizeof(bd_t));
+ debug("Reserving %zu Bytes for Board Info at: %08lx\n",
+ sizeof(bd_t), gd->start_addr_sp);
+ }
return 0;
}
#endif
This might also be an issue on other architectures, so maintainers should
check.
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
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Commit d58a9451e733 (ppc/arm: zap EMK boards) removed
TOP* boards support but missed to remove entries in Kconfig.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Wolfgang Denk <wd@denx.de>
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The following bard configurations have been without active maintenance
for a long time, and the board maintainer agrees to have them removed:
MPC5200: TOP5200, MINI5200, EVAL5200
MPC860: TOP860
at91sam9xeXXX: top9000eval_xe, top9000su_xe
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Reinhard Meyer <reinhard.meyer@emk-elektronik.de>
[trini: Add missing Kconfig removals]
Signed-off-by: Tom Rini <trini@ti.com>
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CONFIG_TPL should not be enabled for boards that do not have TPL.
CONFIG_SUPPORT_TPL introduced by this commit should be "select"ed
by boards with TPL support and CONFIG_TPL should depend on it.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
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CONFIG_SPL should not be enabled for boards that do not have SPL.
CONFIG_SUPPORT_SPL introduced by this commit should be "select"ed
by boards with SPL support and CONFIG_SPL should depend on it.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
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This board is old and is using CONFIG_I2C_X, which is wrong.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Heiko Schocher <hs@denx.de>
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This board is old and is using CONFIG_I2C_X, which is wrong.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Heiko Schocher <hs@denx.de>
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This board is old and is using CONFIG_I2C_X, which is wrong.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Heiko Schocher <hs@denx.de>
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