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2014-03-07powerpc/mpc85xx: Add SCFG_PIXCLKCR register support for T1040Priyanka Jain
T1040 SoC has SCFG (Supplement Configuration) Block which provides chip specific configuration and status support. The base address of SCFG block in T1040 is 0xfc000. SCFG contains SCFG_PIXCLKCR (DIU pixel clock control register) at offset 0x28. Add definition of -SCFG block -SCFG_PIXCLKCR register -Bits definition of SCFG_PIXCLK register Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2014-03-07bootstage: powerpc: support fdt stash and reportingMela Custodio
This implements stashing of bootstage timing data to FDT and automatic timing reporting. To enable define CONFIG_BOOTSTAGE_FDT and CONFIG_BOOTSTAGE_REPORT respectively. Signed-off-by: Rommel G Custodio <sessyargc+u-boot@gmail.com> Reviewed-by: York Sun <yorksun@freescale.com>
2014-03-07powerpc/usb: Workaround for erratum-A006261Suresh Gupta
USB spec says that the minimum disconnect threshold should be over 525 mV. However, internal USB PHY threshold value is below this specified value. Due to this some devices disconnect at run-time. Hence, phy settings are tweaked to increased disconnect threshold to be above 525mV by using this workaround. Signed-off-by: Suresh Gupta <suresh.gupta@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2014-03-07powerpc/b4860: Add workaround for errata A006384 and A006475Shaveta Leekha
SerDes PLLs may not lock reliably at 5 G VCO configuration(A006384) and at cold temperatures(A006475), workaround recalibrate the PLLs with some SerDes configuration Both these errata are only applicable for b4 rev1. So, make workaround for these errata conditional, depending upon soc version. Signed-off-by: Shaveta Leekha <shaveta@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2014-03-07B4860/B4420: Add PLL_NUM define for B4420/B4860 to use SerDes2 Refclks ↵Shaveta Leekha
re-configuration B4860 has two PLL per SerDes whereas B4420 has one PLL per SerDes, add their defines in arch/powerpc/include/asm/config_mpc85xx.h Signed-off-by: Shaveta Leekha <shaveta@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2014-03-0785xx/b4860: Alternate serdes protocols for B4860/B4420poonam aggrwal
On B4860 and B4420, some serdes protocols can be used with LC VCO as well as Ring VCO options. Addded Alternate options with LC VCO for such protocols. For example protocol 0x2a on srds 1 becomes 0x29 if it is LC VCO. The alternate option has the same functionality as the original option; the only difference being LC VCO rather than Ring VCO. Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2014-03-07board/b4860qds: Add support to make PCIe SATA work on B4860QDSShaveta Leekha
1) SerDes2 Refclks have been set properly to make PCIe SATA to work as it work on SerDes refclk of 100MHz 2) Mask the SerDes's device reset request before changing the Refclks for SerDes1 and SerDes2 for PLL locks to happen properly, device reset request bit unmasked after SerDes refclks configuration Signed-off-by: Shaveta Leekha <shaveta@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2014-03-07board/b4860qds: Add support to make Aurora work on B4860QDSShaveta Leekha
1) Add new SerDes1 protocols having Aurora in them 2) Add VSC cross point connections for Aurora to work with CPRI and SGMIIs 3) Configure VSC crossbar switch to connect SerDes1 lanes to aurora on board, by checking SerDes1 protocols 4) SerDes1 Refclks have been set properly to make Aurora, CPRI and SGMIIs to work together properly Signed-off-by: Shaveta Leekha <shaveta@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2014-03-04kbuild: fix CROSS_COMPILE settings in config.mkMasahiro Yamada
The syntax CROSS_COMIPLE ?= <cross_compiler_prefix> does not work because config.mk is parsed after exporting CROSS_COMPILE. Like Linux Kernel's arch/$(ARCH)/Makefile, we must write as follows: ifeq ($(CROSS_COMPILE),) CROSS_COMPILE := <cross_compiler_prefix> endif Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-02-25Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini
With this, fixup a trivial build error of get_effective_memsize needing to be updated in the new board/freescale/p1010rdb/spl.c Signed-off-by: Tom Rini <trini@ti.com>
2014-02-24powerpc/t208x: some update to support t2081Shengzhou Liu
- fix serdes definition for t2081. - fix clock speed for t2081. - update ids, as CONFIG_FSL_SATA_V2 is needed only for t2080, T2081 has no SATA. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2014-02-21common: Add get_effective_memsize() to memsize.cYork Sun
This function has been around for powerpc. It is used for systems with memory more than CONFIG_MAX_MEM_MAPPED. In case of non-contiguous memory, this feature can limit U-boot to one block without going over the limit. Signed-off-by: York Sun <yorksun@freescale.com> Acked-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
2014-02-19kbuild: use Linux Kernel build scriptsMasahiro Yamada
Now we are ready to switch over to real Kbuild. This commit disables temporary scripts: scripts/{Makefile.build.tmp, Makefile.host.tmp} and enables real Kbuild scripts: scripts/{Makefile.build,Makefile.host,Makefile.lib}. This switch is triggered by the line in scripts/Kbuild.include -build := -f $(if $(KBUILD_SRC),$(srctree)/)scripts/Makefile.build.tmp obj +build := -f $(if $(KBUILD_SRC),$(srctree)/)scripts/Makefile.build obj We need to adjust some build scripts for U-Boot. But smaller amount of modification is preferable. Additionally, we need to fix compiler flags which are locally added or removed. In Kbuild, it is not allowed to change CFLAGS locally. Instead, ccflags-y, asflags-y, cppflags-y, CFLAGS_$(basetarget).o, CFLAGS_REMOVE_$(basetarget).o are prepared for that purpose. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Tested-by: Gerhard Sittig <gsi@denx.de>
2014-02-19kbuild: change out-of-tree buildMasahiro Yamada
This commit changes the working directory where the build process occurs. Before this commit, build process occurred under the source tree for both in-tree and out-of-tree build. That's why we needed to add $(obj) prefix to all generated files in makefiles like follows: $(obj)u-boot.bin: $(obj)u-boot Here, $(obj) is empty for in-tree build, whereas it points to the output directory for out-of-tree build. And our old build system changes the current working directory with "make -C <sub-dir>" syntax when descending into the sub-directories. On the other hand, Kbuild uses a different idea to handle out-of-tree build and directory descending. The build process of Kbuild always occurs under the output tree. When "O=dir/to/store/output/files" is given, the build system changes the current working directory to that directory and restarts the make. Kbuild uses "make -f $(srctree)/scripts/Makefile.build obj=<sub-dir>" syntax for descending into sub-directories. (We can write it like "make $(obj)=<sub-dir>" with a shorthand.) This means the current working directory is always the top of the output directory. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Tested-by: Gerhard Sittig <gsi@denx.de>
2014-02-03driver/ifc:Change accessor function to take care of endiannessPrabhakar Kushwaha
IFC registers can be of type Little Endian or big Endian depending upon Freescale SoC. Here SoC defines the register type of IFC IP. So update acessor functions with common IFC acessor functions to take care both type of endianness. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Acked-by: York Sun <yorksun@freescale.com>
2014-02-03powerpc/usb: Enable dual phy for T1040Nikhil Badola
Define CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE macro for enabling dual phy in t1040 Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2014-02-03boards/t1040qds: Adds ethernet support for T1040Prabhakar Kushwaha
Enable entherent for T1040QDS. It enables FM1@DTSEC3, FM1@DTSEC4, FM1@DTSEC5 Define MDIO related configs Added eth.c file Update t1040.c to support RGMII and SGMII Update t1040qds.c to support ethernet Define the PHY address Signed-off-by: Arpit Goel <B44344@freescale.com> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com> Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> [York Sun: remove dash from commit message] Signed-off-by: York Sun <yorksun@freescale.com>
2014-02-03powerpc/mpc85xx: Update serdes protocols for T1040Prabhakar Kushwaha
T1040 has only one SerDes block. so update the code accordingly. Also, add support of SerDes Protocol 0x00, 0x06, 0x40, 0x69 0x85, 0xA7 and 0xAA Signed-off-by: Arpit Goel <B44344@freescale.com> Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2014-02-03powerpc/mpc85xx: Update LIODNs for T1040poonam aggrwal
Removed LIODNs for RMAN, RIO, 10G. T1040 has 10 QMAN portals so assigned LIODNs accordingly. Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2014-01-24powerpc: mpc5xxx: remove redundant CONFIG_MPC5xxx definitionMasahiro Yamada
We do not have to define CONFIG_MPC5xxx in board config headers (and start.S) because it is defined in arch/powerpc/cpu/mpc5xxx/config.mk. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-01-24powerpc: mpc86xx: move CONFIG_MPC86xx definition to CPU config.mkMasahiro Yamada
Define CONFIG_MPC86xx in arch/powerpc/cpu/mpc86xx/config.mk because all target boards with mpc86xx cpu define it. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-01-24powerpc: mpc85xx: move CONFIG_MPC85xx definition to CPU config.mkMasahiro Yamada
Define CONFIG_MPC85xx in arch/powerpc/cpu/mpc85xx/config.mk because all target boards with mpc85xx cpu define it. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-01-24powerpc: mpc5xx: remove redundant CONFIG_5xx definitionMasahiro Yamada
We do not have to define CONFIG_5xx in a source file because it is defined in arch/powerpc/cpu/mpc5xx/config.mk. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-01-24powerpc: mpc8xx: remove redundant CONFIG_8xx definitionMasahiro Yamada
We do not have to define CONFIG_8xx in source files because it is defined in arch/powerpc/cpu/mpc8xx/config.mk Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-01-24powerpc: delete unused header filesMasahiro Yamada
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-01-24Remove obsolete _LINUX_CONFIG_H macroMasahiro Yamada
Commit 643aae1406c93ddc64fcf8c136b47cdffd9c8ccd deleted include/linux/config.h but missed to delete _LINUX_CONFIG_H macro. It is no longer used at all. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-01-22eSDHC: Calculate envaddr accroding to the address formatHaijun.Zhang
On BSC9131, BSC9132, P1010 : For High Capacity SD Cards (> 2 GBytes), the 32-bit source address specifies the memory address in block address format. Block length is fixed to 512 bytes as per the SD High Capacity specification. So we need to convert the block address format to byte address format to calculate the envaddr. If there is no enough space for environment variables or envaddr is larger than 4GiB, we relocate the envaddr to 0x400. The address relocated is in the front of the first partition that is assigned for sdboot only. Signed-off-by: Haijun Zhang <haijun.zhang@freescale.com> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com> Reviewed-by: York Sun <yorksun@freescale.com>
2014-01-21powerpc:mpc85xx: Add ifc nand boot support for TPL/SPLPo Liu
Using the TPL method for nand boot by sram was already supported. Here add some code for mpc85xx ifc nand boot. - For ifc, elbc, esdhc, espi, all need the SPL without section .resetvec. - Use a clear function name for nand spl boot. - Add CONFIG_SPL_DRIVERS_MISC_SUPPORT to compile the fsl_ifc.c in spl/Makefile; Signed-off-by: Po Liu <Po.Liu@freescale.com> Acked-by: Scott Wood <scottwood@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2014-01-21powerpc/mpc85xx: Fix a typo in workaround message for DDR erratum A003474York Sun
Unfortunately a typo presents "DDR-A003473" instead of "DDR-A003474". Signed-off-by: York Sun <yorksun@freescale.com>
2014-01-21powerpc/85xx: update erratum a006379Shengzhou Liu
Enable Erratum A006379 for T2080, T2081, T4160, B4420. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2014-01-21powerpc/83xx: Add support for get_svr() for 83xx devicesRamneek Mehresh
Defines get_svr() for 83xx devices Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2014-01-02powerpc/t208x: fix macro CONFIG_SYS_FSL_NUM_USB_CTRLSShengzhou Liu
CONFIG_SYS_FSL_NUM_USB_CTRLS is no longer used, update it to new CONFIG_USB_MAX_CONTROLLER_COUNT. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
2014-01-02powerpc/mpc85xx: Add support for single source clockingPriyanka Jain
Single-source clocking is new feature introduced in T1040. In this mode, a single differential clock is supplied to the DIFF_SYSCLK_P/N inputs to the processor, which in turn is used to supply clocks to the sysclock, ddrclock and usbclock. So, both ddrclock and syclock are driven by same differential sysclock in single-source clocking mode whereas in normal clocking mode, generally separate DDRCLK and SYSCLK pins provides reference clock for sysclock and ddrclock DDR_REFCLK_SEL rcw bit is used to determine DDR clock source -If DDR_REFCLK_SEL rcw bit is 0, then DDR PLLs are driven in normal clocking mode by DDR_Reference clock -If DDR_REFCLK_SEL rcw bit is 1, then DDR PLLs are driven in single source clocking mode by DIFF_SYSCLK Add code to determine ddrclock based on DDR_REFCLK_SEL rcw bit. Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
2013-12-16Makefile: Select objects by CONFIG_ rather than $(ARCH) or $(CPU)Masahiro Yamada
Convert like follows: CPU mpc83xx -> CONFIG_MPC83xx CPU mpc85xx -> CONFIG_MPC85xx CPU mpc86xx -> CONFIG_MPC86xx CPU mpc5xxx -> CONFIG_MPC5xxx CPU mpc8xx -> CONFIG_8xx CPU mpc8260 -> CONFIG_8260 CPU ppc4xx -> CONFIG_4xx CPU x86 -> CONFIG_X86 ARCH x86 -> CONFIG_X86 ARCH powerpc -> CONFIG_PPC Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2013-12-16common/cmd_bootm: extend do_bootm_vxworks to support the new VxWorks boot ↵Miao Yan
interface. The next version VxWorks adopts device tree (for PowerPC and ARM) as its hardware description mechanism. For PowerPC, the boot interface conforms to the ePAPR standard, which is: void (*kernel_entry)(ulong fdt_addr, ulong r4 /* 0 */, ulong r5 /* 0 */, ulong r6 /* EPAPR_MAGIC */, ulong r7 /* IMA size */, ulong r8 /* 0 */, ulong r9 /* 0 */) For ARM, the boot interface is: void (*kernel_entry)(void *fdt_addr) Signed-off-by: Miao Yan <miao.yan@windriver.com> [trini: Fix build error when !CONFIG_OF_FDT is set, typo on PowerPC, missing extern ft_fixup_num_cores] Signed-off-by: Tom Rini <trini@ti.com>
2013-12-13PowerPC: merge commonly-defined flagsMasahiro Yamada
PLATFORM_RELFLAGS += -meabi PLATFORM_CPPFLAGS += -ffixed-r2 were defined in all arch/powerpc/${CPU}/config.mk. This commit moves them to arch/powerpc/config.mk. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2013-12-11powerpc/mpc85xx: Update CONFIG_SYS_FSL_TBCLK_DIV for T1040Prabhakar Kushwaha
The default value of CONFIG_SYS_FSL_TBCLK_DIV is 16. So, update its value as default. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Acked-by: York Sun <yorksun@freescale.com>
2013-12-11powerpc/t4240: Add a frequency setting case for fman1Shaohui Xie
A new valid setting case added for fman1, it uses platform frequency. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Acked-by: York Sun <yorksun@freescale.com>
2013-12-04powerpc/mpc8349: Use generic mpc85xx DDR driverYork Sun
MPC8349 has been using mpc85xx DDR driver through a symbolic link to mpc85xx_ddr_gen2.c. After consolidating the drivers to a single set under driver/ddr/fsl/, the link is replaced by referring driver directly. We now can simply enable the macro and use the driver. Other mpc83xx SoCs still use their own driver. Signed-off-by: York Sun <yorksun@freescale.com>
2013-12-04T4240: Address T4240/T4160 Rev2.0 DDR clock changeZang Roy-R61911
MEM_PLL_RAT on T4240/T4160 Rev2.0 uses a value which is half of Rev1.0. It's 12 in Rev1.0, for Rev2.0 it uses 6. Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Acked-by: York Sun <yorksun@freescale.com>
2013-12-04powerpc/corenet: CPC1 speculation disableDave Liu
In PBL RAMBOOT(SPI/SD/NAND boot) mode, CPC1 used as SRAM, should disable CPC1 speculation and keep it till relocation. Otherwise, speculation transactions will go to DDR controller, it will cause problem. Signed-off-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Acked-by: York Sun <yorksun@freescale.com>
2013-11-25powerpc/mpc85xx: Add T2080/T2081 SoC supportShengzhou Liu
Add support for Freescale T2080/T2081 SoC. T2080 includes the following functions and features: - Four dual-threads 64-bit Power architecture e6500 cores, up to 1.8GHz - 2MB L2 cache and 512KB CoreNet platform cache (CPC) - Hierarchical interconnect fabric - One 32-/64-bit DDR3/3L SDRAM memory controllers with ECC and interleaving - Data Path Acceleration Architecture (DPAA) incorporating acceleration - 16 SerDes lanes up to 10.3125 GHz - 8 mEMACs for network interfaces (four 1Gbps MACs and four 10Gbps/1Gbps MACs) - High-speed peripheral interfaces - Four PCI Express controllers (two PCIe 2.0 and two PCIe 3.0 with SR-IOV) - Two Serial RapidIO 2.0 controllers/ports running at up to 5 GHz - Additional peripheral interfaces - Two serial ATA (SATA 2.0) controllers - Two high-speed USB 2.0 controllers with integrated PHY - Enhanced secure digital host controller (SD/SDHC/SDXC/eMMC) - Enhanced serial peripheral interface (eSPI) - Four I2C controllers - Four 2-pin UARTs or two 4-pin UARTs - Integrated Flash Controller supporting NAND and NOR flash - Three eight-channel DMA engines - Support for hardware virtualization and partitioning enforcement - QorIQ Platform's Trust Architecture 2.0 Differences between T2080 and T2081: Feature T2080 T2081 1G Ethernet numbers: 8 6 10G Ethernet numbers: 4 2 SerDes lanes: 16 8 Serial RapidIO,RMan: 2 no SATA Controller: 2 no Aurora: yes no SoC Package: 896-pins 780-pins Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Acked-by: York Sun <yorksun@freescale.com>
2013-11-25net/fman: Add support for 10GEC3 and 10GEC4Shengzhou Liu
There are more than two 10GEC in single FMAN in some SoCs(e.g. T2080). This patch adds support for 10GEC3 and 10GEC4. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
2013-11-25Driver/IFC: Move Freescale IFC driver to a common driverYork Sun
Freescale IFC controller has been used for mpc8xxx. It will be used for ARM-based SoC as well. This patch moves the driver to driver/misc and fix the header file includes. Signed-off-by: York Sun <yorksun@freescale.com>
2013-11-25Driver/DDR: combine ccsr_ddr for 83xx, 85xx and 86xxYork Sun
Fix ccsr_ddr structure to avoid using typedef. Combine DDR2 and DDR3 structure for 83xx, 85xx and 86xx. Signed-off-by: York Sun <yorksun@freescale.com>
2013-11-25Driver/DDR: Moving Freescale DDR driver to a common driverYork Sun
Freescale DDR driver has been used for mpc83xx, mpc85xx, mpc86xx SoCs. The similar DDR controllers will be used for ARM-based SoCs. Signed-off-by: York Sun <yorksun@freescale.com>
2013-11-25mpc85xx: Fix the offset of register address errorTang Yuantian
The offset of register address within GPIO module is just CONFIG_SYS_MPC85xx_GPIO_ADDR. So, fix it. The following platforms are confirmed: MPC8572, P1023, P1020, P1022, P2020, P4080, P5020, P5040, T4240, B4860. Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
2013-11-17powerpc: mpc824x: Do not create a symbolic link to bedbug_603e.cMasahiro Yamada
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2013-11-17powerpc: mpc83xx: Do not create a symbolic link to ddr-gen2.cMasahiro Yamada
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2013-11-17powerpc: mpc83xx: delete unused rulesMasahiro Yamada
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
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