Age | Commit message (Collapse) | Author | |
---|---|---|---|
2018-10-03 | riscv: Make start.S available for all targets | Bin Meng | |
Currently start.S is inside arch/riscv/cpu/ax25/, but it can be common for all RISC-V targets. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> | |||
2018-10-03 | riscv: Add a helper routine to print CPU information | Bin Meng | |
This adds a helper routine to print CPU information. Currently it prints all the instruction set extensions that the processor core supports. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> |