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path: root/arch/x86/cpu/ivybridge/lpc.c
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2014-11-25x86: ivybridge: Add additional LPC initSimon Glass
Set up all the remaining pieces of the LPC (low-pin-count) peripheral in PCH (Peripheral Controller Hub). Signed-off-by: Simon Glass <sjg@chromium.org>
2014-11-21x86: ivybridge: Add early LPC init so that serial worksSimon Glass
The PCH (Platform Controller Hub) includes an LPC (Low Pin Count) device which provides a serial port. This is accessible on Chromebooks, so enable it early in the boot process. Signed-off-by: Simon Glass <sjg@chromium.org>