summaryrefslogtreecommitdiff
path: root/arch/x86/dts/microcode/m12306a8_00000010.dtsi
AgeCommit message (Collapse)Author
2016-01-13x86: ivybridge: Add microcode blobs for all the steppingsBin Meng
This adds microcode blobs created from Intel FSP package for the Chief River platform. They are for all the Ivy Bridge steppings: 306a2 (B0), 306a4 (C0), 306a5 (K0/M0), 306a8 (E0/L0), except the 306a9 which is already in the U-Boot tree. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>