summaryrefslogtreecommitdiff
path: root/arch/x86/dts
AgeCommit message (Expand)Author
2016-01-24x86: ivybridge: Set up the LPC device using driver modelSimon Glass
2016-01-24dm: x86: queensbay: Add an interrupt driverSimon Glass
2016-01-24dm: x86: quark: Add an interrupt driverSimon Glass
2016-01-24dm: x86: spi: Convert ICH SPI driver to driver model PCI APISimon Glass
2016-01-13x86: qemu: remove cpu node in device treeMiao Yan
2016-01-13x86: qemu: add a cpu uclass driver for qemu targetMiao Yan
2016-01-13x86: ivybridge: Add microcode blobs for all the steppingsBin Meng
2015-12-09x86: Fix PCI UART compatible string for crownbay and galileoBin Meng
2015-12-01x86: Convert to use driver model timerBin Meng
2015-11-20ns16550: unify serial_x86Thomas Chou
2015-11-19x86: qemu: Convert to use driver model keyboardBin Meng
2015-11-19x86: crownbay: Convert to use driver model keyboardBin Meng
2015-11-19x86: Add an i8042 device for boards that have itSimon Glass
2015-11-10Various Makefiles: Add SPDX-License-Identifier tagsTom Rini
2015-10-21x86: Add support for Advantech SOM-6896George McCollister
2015-10-21x86: galileo: Enable mrc cacheBin Meng
2015-10-21x86: Remove unused rw-mrc-cache properties in the link and panther dts filesBin Meng
2015-10-21x86: Enable mrc cache for bayleybay and minnowmaxBin Meng
2015-09-16x86: galileo: Add PCIe root port IRQ routingBin Meng
2015-09-09x86: Convert to use driver model pci on quark/galileoBin Meng
2015-09-09x86: panther: Add PCI and video configurationSimon Glass
2015-08-31exynos: x86: dts: Add tpm nodes to the device tree for Chrome OS devicesSimon Glass
2015-08-26x86: crownbay: Support Topcliff integrated pci uart devices with driver modelBin Meng
2015-08-26x86: crownbay: Enable on-board SMSC superio keyboard controllerBin Meng
2015-08-26x86: minnowmax: Correct pad-offset value for host_en1Simon Glass
2015-08-26x86: minnowmax: Add access to GPIOs E0, E1, E2Simon Glass
2015-08-26x86: baytrail: Support multiple microcode copiesBin Meng
2015-08-26x86: baytrail: Add microcode for BayTrail-I D0 steppingBin Meng
2015-08-14x86: minnowmax: Define and enable interrupt setupSimon Glass
2015-08-14x86: baytrail: Configure FSP UPD from device treeAndrew Bradford
2015-08-05x86: dts: Add a device tree file for EFISimon Glass
2015-08-05x86: bayleybay: Configure PCI IRQBin Meng
2015-08-05x86: Add Intel Bayley Bay board supportBin Meng
2015-08-05x86: Add microcode for BayTrail-I B0 steppingBin Meng
2015-08-05x86: qemu: Add MP initializationBin Meng
2015-07-28x86: qemu: Enable writing MP tableBin Meng
2015-07-28x86: Convert to use driver model pci on queensbay/crownbayBin Meng
2015-07-28x86: Enable DM RTC support for all x86 boardsBin Meng
2015-07-14dm: x86: minnowmax: Move PCI to use driver modelSimon Glass
2015-07-14x86: queensbay: Change PCIe root ports' interrupt routingBin Meng
2015-07-14x86: queensbay: Correct Topcliff device irqsBin Meng
2015-07-14x86: crownbay: Enable DM RTC supportBin Meng
2015-07-14x86: crownbay: Add MP initializationBin Meng
2015-06-04x86: gpio: add pinctrl support from the device treeGabriel Huau
2015-06-04x86: qemu: Implement PIRQ routingBin Meng
2015-06-04x86: coreboot: Control I/O port 0xb2 writing via device treeBin Meng
2015-06-04x86: qemu: Create separate i440fx and q35 device treesBin Meng
2015-06-04x86: quark: Implement PIRQ routingBin Meng
2015-06-04x86: Refactor PIRQ routing supportBin Meng
2015-06-04x86: Support QEMU x86 targetsBin Meng