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path: root/arch/x86/include/asm/mtrr.h
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2015-01-23x86: Test mtrr support flag before accessing mtrr msrBin Meng
On some x86 processors (like Intel Quark) the MTRR registers are not supported. This is reflected by the CPUID (EAX 01H) result EDX[12]. Accessing the MTRR registers on such processors will cause #GP so we must test the support flag before accessing MTRR MSRs. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
2015-01-13x86: Add support for MTRRsSimon Glass
Memory Type Range Registers are used to tell the CPU whether memory is cacheable and if so the cache write mode to use. Clean up the existing header file to follow style, and remove the unneeded code. These can speed up booting so should be supported. Add these to global_data so they can be requested while booting. We will apply the changes during relocation (in a later commit). Signed-off-by: Simon Glass <sjg@chromium.org>
2015-01-13x86: Drop RAMTOP KconfigSimon Glass
We don't need this in U-Boot since we calculate it based on available memory. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2014-11-21x86: chromebook_link: Implement CAR support (cache as RAM)Simon Glass
Add support for CAR so that we have memory to use prior to DRAM init. On link there is a total of 128KB of CAR available, although some is used for the memory reference code. Signed-off-by: Simon Glass <sjg@chromium.org>
2014-01-24x86: delete unused header filesMasahiro Yamada
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org>
2013-07-24Add GPL-2.0+ SPDX-License-Identifier to source filesWolfgang Denk
Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
2012-12-06x86: Import MSR/MTRR code from LinuxGraeme Russ
Imported from Linux 3.1 with a few modifications to suit U-Boot Signed-off-by: Simon Glass <sjg@chromium.org>