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path: root/arch/x86/lib/tpl.c
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2020-05-18common: Drop log.h from common headerSimon Glass
Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18common: Drop init.h from common headerSimon Glass
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18common: Drop image.h from common headerSimon Glass
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-17common: Move hang() to the same header as panic()Simon Glass
At present panic() is in the vsprintf.h header file. That does not seem like an obvious choice for hang(), even though it relates to panic(). So let's put hang() in its own header. Signed-off-by: Simon Glass <sjg@chromium.org> [trini: Migrate a few more files] Signed-off-by: Tom Rini <trini@konsulko.com>
2019-11-03x86: Quieten TPL's jump_to_image_no_args()Simon Glass
We already a message indicating that U-Boot is about to jump to SPL, so make this one a debug() to reduce code size. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-11-03x86: Don't print CPU info in TPLSimon Glass
We don't need to do this and it is done (in more detail) in U-Boot proper. Drop this to save code space. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-11-03x86: Move CPU init to before spl_init()Simon Glass
At present we call spl_init() before identifying the CPU. This is not a good idea - e.g. if bootstage is enabled then it will try to set up the timer which works better if the CPU is identified. Put explicit code at each entry pointer to identify the CPU. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-11-03x86: tpl: Add a fake PCI busSimon Glass
In TPL we try to minimise code size so do not include the PCI subsystem. We can use fixed BARs and drivers can directly program the devices that they need. However we do need to bind the devices on the PCI bus and without PCI this does not ordinarily happen. As a work-around, define a fake PCI bus which does this binding, but no other PCI operations. This is a convenient way to ensure that we can use the same device tree for TPL, SPL and U-Boot proper: TPL - CONFIG_TPL_PCI is not set (no auto-config, fake PCI bus) SPL - CONFIG_SPL_PCI is set (no auto-config but with real PCI bus) U-Boot - CONFIG_PCI is set (full auto-config after relocation) Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-11x86: Panic when SPL or TPL failSimon Glass
At present when these fail to boot there is no message, just a hang. Add a panic so it is obvious that something when wrong. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08x86: spl: Reduce priority of the basic SPL image loaderSimon Glass
This image loader works on systems where the flash is directly mapped to the last part of the 32-bit address space. On recent Intel systems (such as apollolake) this is not the case. Reduce the priority of this loader so that another one can override it. While we are here, rename the loader to BOOT_DEVICE_SPI_MMAP since BOOT_DEVICE_BOARD is not very descriptive. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08x86: spl: Use hang() instead of a while() loopSimon Glass
Use the standard hang() function when booting fails since this implements the defined U-Boot behaviour for this situation. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-05-08x86: Add a simple TPL implementationSimon Glass
Add the required CPU code so that TPL builds correctly. Also update the SPL code to deal with being booted from TPL. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>