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AgeCommit message (Expand)Author
2014-12-18x86: Convert microcode format to device-tree-onlySimon Glass
2014-12-18x86: Add basic support to queensbay platform and crownbay boardBin Meng
2014-12-18x86: Integrate Tunnel Creek processor microcodeBin Meng
2014-12-18x86: Correct problems in the microcode loadingSimon Glass
2014-12-18x86: ivybridge: Update the microcodeSimon Glass
2014-12-18x86: Move microcode updates into a separate directorySimon Glass
2014-12-15x86: move arch-specific asmlinkage to <asm/linkage.h>Masahiro Yamada
2014-12-13x86: Add a simple command to show FSP HOB informationBin Meng
2014-12-13x86: Support Intel FSP initialization path in start.SBin Meng
2014-12-13x86: Add post failure codes for bist and carBin Meng
2014-12-13x86: queensbay: Adapt FSP support codesBin Meng
2014-12-13x86: Initial import from Intel FSP release for Queensbay platformBin Meng
2014-12-13x86: Add a simple superio driver for SMSC LPC47MBin Meng
2014-12-13x86: Add Intel Crown Bay board dts fileBin Meng
2014-12-13x86: ich6-gpio: Move setup_pch_gpios() to board support codesBin Meng
2014-12-13x86: Clean up asm-offsetsBin Meng
2014-12-13x86: Make ROM_SIZE configurable in KconfigBin Meng
2014-12-08Replace <compiler.h> with <linux/compiler.h>Masahiro Yamada
2014-12-08Kbuild: introduce Makefile in arch/$ARCH/Daniel Schwierzeck
2014-11-25x86: dts: Add video information to the device treeSimon Glass
2014-11-25x86: Add initial video device init for Intel GMASimon Glass
2014-11-25x86: Add support for running option ROMs nativelySimon Glass
2014-11-25x86: Add vesa mode configuration optionsSimon Glass
2014-11-25x86: Add GDT descriptors for option ROMsSimon Glass
2014-11-25x86: ivybridge: Add northbridge init functionsSimon Glass
2014-11-25x86: Drop some msr functions that we don't supportSimon Glass
2014-11-25x86: Add init for model 206AX CPUSimon Glass
2014-11-25x86: Add LAPIC setup codeSimon Glass
2014-11-25x86: Drop old CONFIG_INTEL_CORE_ARCH codeSimon Glass
2014-11-25x86: Refactor interrupt_init()Bin Meng
2014-11-25x86: Remove cpu_init_r() for x86Bin Meng
2014-11-25x86: Call cpu_init_interrupts() from interrupt_init()Bin Meng
2014-11-25x86: Add Intel speedstep and turbo mode codeSimon Glass
2014-11-25x86: ivybridge: Set up XHCI USBSimon Glass
2014-11-25x86: ivybridge: Set up EHCI USBSimon Glass
2014-11-25x86: dts: Add SATA settings for linkSimon Glass
2014-11-25x86: ivybridge: Add SATA initSimon Glass
2014-11-25x86: dts: Add LPC settings for linkSimon Glass
2014-11-25x86: dts: Move PCI peripherals into a pci nodeSimon Glass
2014-11-25x86: ivybridge: Add additional LPC initSimon Glass
2014-11-25x86: ivybridge: Add PCH initSimon Glass
2014-11-25x86: Add a simple header file for ACPISimon Glass
2014-11-25x86: ivybridge: Add support for BD82x6x PCHSimon Glass
2014-11-25x86: Set up edge triggering on interrupt 9Simon Glass
2014-11-25x86: pci: Add handlers before and after a PCI hose scanSimon Glass
2014-11-25x86: Add ioapic.h headerSimon Glass
2014-11-25x86: Factor out common values in the link scriptSimon Glass
2014-11-25x86: Ensure that all relocation data is included in the imageSimon Glass
2014-11-25x86: Panic if there is no relocation dataSimon Glass
2014-11-25x86: Remove board_early_init_r()Simon Glass
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