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2012-12-06x86: Enable coreboot timestamp facility support in u-boot.Vadim Bendebury
This change turns on the code which allows u-boot to add timestamps to the timestamp table created by coreboot. Since u-boot does not use the tsc_t like structure to represent HW counter readings, this structure is being replaced by 64 bit integer. The timestamp_init() function is now initializing the base timer value used by u-boot to calculate the HW counter increments. Timestamp facility is initialized as soon as the timestamp table pointer is found in the coreboot table. The u-boot generated timer events' ID will start at 1000 to clearly separate u-boot events from coreboot events in the timer trace. Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-06x86: Add function to read time stamp counterVadim Bendebury
Put this function in the u-boot-x86.h header file. We could instead create timer.h perhaps. We support setting a base time, and reading the time relative to this base. Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-06x86: gpio: Add GPIO driver for Intel ICH6 and later.Bill Richardson
Implement <asm-generic/gpio.h> functions for Intel ICH6 and later. Only GPIOs 0-31 are handled by this code. Signed-off-by: Bill Richardson <wfrichar@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-30x86: Don't spam POST80 codes with slow IO functionsStefan Reinauer
This patch prevents u-boot from "spamming" random progress codes on a port 80 "post card". The previous version of this patch just removed the delays in the "slow" IO functions, as they do not need to be slow, however, this patch is less intrusive. It uses another unused port that is often used by BIOSes (and the Linux Kernel) for small delay timing purposes. Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-30x86: Fix typo in pcat_timer.cStefan Reinauer
Fix a small comment typo. Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-30x86: Include types.h explicitly in the i386 version of io.hGabe Black
The i386 version of io.h depends on the phys_addr_t type which is defined in types.h. It wasn't including that explicitly, and was working presumably because the other files including it had already included types.h themselves directly or indirectly. This change fixes that. Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-30x86: Add a dummy implementation for timer_get_usGabe Black
The microsecond timer is not currently implemented, but add a dummy implementation for now. Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-30x86: Add a default implementation for cleanup_before_linux()Gabe Black
This function provides an opportunity for some last minute cleanup and reconfiguration before control is handed over to Linux. It's possible this may need to do something in the future, but for now it's left empty. It's set up as a weak symbol so it can be overridden if necessary on a case by case basis. Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-30x86: Add an fdt pointer to the global data structureGabe Black
This change adds a pointer to the global data structure in x86 to point to the device tree. This mirrors an identical pointer in ARM. Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-30x86: Allow compiling out realmode/bios codeGabe Black
We don't want this for coreboot, so provide a way of compiling it out. Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-30x86: coreboot: Decode additional coreboot sysinfo tagsSimon Glass
Add support for decoding tags for GPIOs, compile/build info, cbmem and other features. Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-30x86: coreboot: Drop sysinfo.cStefan Reinauer
sysinfo.c only contains the lib_sysinfo data structure which is used/filled by tables.c. This split was introduced by importing code from libpayload originally, but to keep the code simple, add the single line of actual code to tables.c Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-28x86: coreboot: Implement recursively scanning PCI bussesGabe Black
A hook is installed to configure PCI bus bridges as they encountered by u-boot. The hook extracts the secondary bus number from the bridge's config space and then recursively scans that bus. On Coreboot, the PCI bus address space has identity mapping with the physical address space, so declare it as such to ensure that the "pci_map_bar" function used by some PCI drivers is behaving properly. This fixes the EHCI PCI driver initialization on Stumpy. This was tested as follows: Ran the PCI command on Alex, saw devices on bus 0, the OXPCIe 952 on bus 1, and empty busses 2 through 5. This matches the bridges reported on bus 0 and the PCI configuration output from coreboot. Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-28x86: coreboot: Tell u-boot about PCI bus 0 when initializingGabe Black
U-boot needs a host controller or "hose" to interact with the PCI busses behind them. This change installs a host controller during initialization of the coreboot "board" which implements some of X86's basic PCI semantics. This relies on some existing generic code, but also duplicates a little bit of code from the sc520 implementation. Ideally we'd eliminate that duplication at some point. It looks like in order to scan buses beyond bus 0, we'll need to tell u-boot's generic PCI configuration code what to do if it encounters a bridge, specifically to scan the bus on the other side of it. Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Graeme Russ <graeme.russ@gmail.com>
2012-11-28x86: coreboot: Move non-board specific files to coreboot arch directoryStefan Reinauer
coreboot.c and coreboot_pci.c don't contain board specific but only coreboot specific code. Hence move it to the coreboot directory in arch/x86/cpu (which should probably be moved out of cpu/ in another commit) Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-28x86: Add some missing includesGabe Black
I suspect these includes were usually available because something else included them earlier or because they were brought in transitively. Change-Id: I6aae2ac94dc792eac6febb4345e8125f69f70988 Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-28x86: Allow excluding reset vector code from u-bootGabe Black
When running from coreboot we don't want this code. This version works by ifdef-ing out all of the code that would go into those sections and all the code that refers to it. The sections are then empty, and the linker will either leave them empty for the loader to ignore or remove them entirely. Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-28x86: Add initial memory barrier macrosSimon Glass
These are available on other architectures, so add them on x86. Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-28x86: Add ilog2 to bitopsGraeme Russ
ilog2 is required by AHCI driver Signed-off-by: Graeme Russ <graeme.russ@gmail.com> Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-28x86: Remove duplicate PCI initGraeme Russ
Signed-off-by: Graeme Russ <graeme.russ@gmail.com> Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-28x86: Put global data on the stackGraeme Russ
Putting global data on the stack simplifies the init process (and makes it slightly quicker). During the 'flash' stage of the init sequence, global data is in the CAR stack. After SDRAM is initialised, global data is copied from CAR to the SDRAM stack Signed-off-by: Graeme Russ <graeme.russ@gmail.com> Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-28x86: Forward declare gd_tGraeme Russ
So it can be used as a type in struct global_data and remove an ugly typecast Signed-off-by: Graeme Russ <graeme.russ@gmail.com> Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Marek Vasut <marex@denx.de>
2012-10-22common: Discard the __u_boot_cmd sectionMarek Vasut
The command declaration now uses the new LG-array method to generate list of commands. Thus the __u_boot_cmd section is now superseded and redundant and therefore can be removed. Also, remove externed symbols associated with this section from include/command.h . Signed-off-by: Marek Vasut <marex@denx.de> Cc: Joe Hershberger <joe.hershberger@gmail.com> Cc: Mike Frysinger <vapier@gentoo.org>
2012-10-22common: Add .u_boot_list into all linker filesMarek Vasut
Add section for the linker-generated lists into all possible linker files, so that everyone can easily use these lists. This is mostly a mechanical adjustment. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Joe Hershberger <joe.hershberger@gmail.com> Cc: Mike Frysinger <vapier@gentoo.org>
2012-10-19x86: Change global data baudrate to intSimon Glass
This doesn't need to be a long, so change it. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@ti.com>
2012-10-15serial: Remove CONFIG_SERIAL_MULTI from remaining sourcesMarek Vasut
Remove the parts depending either on disabled CONFIG_SERIAL_MULTI or ifdefs around CONFIG_SERIAL_MULTI parts since CONFIG_SERIAL_MULTI is now enabled by default. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Marek Vasut <marek.vasut@gmail.com> Cc: Tom Rini <trini@ti.com> Cc: Anatolij Gustschin <agust@denx.de> Cc: Stefan Roese <sr@denx.de>
2012-08-09global_data: unify global flag definesMike Frysinger
All the global flag defines are the same across all arches. So unify them in one place, and add a simple way for arches to extend for their needs. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-05-15net: move bootfile init into eth_initializeMike Frysinger
All arches init this the same way, so move the logic into the core net code to avoid duplicating it everywhere else. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
2012-05-15net: punt bd->bi_ip_addrMike Frysinger
This field gets read in one place (by "bdinfo"), and we can replace that with getenv("ipaddr"). After all, the bi_ip_addr field is kept up-to-date implicitly with the value of the ipaddr env var. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
2012-03-06sc520: fix build warning about unused temp varMike Frysinger
Building the eNET_SRAM board fails for me: sc520_timer.c: In function 'sc520_udelay': sc520_timer.c:81:7: error: variable 'temp' set but not used [-Werror=unused-but-set-variable] cc1: all warnings being treated as errors make[1]: *** [sc520_timer.o] Error 1 Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-01-04x86: Convert board_init_f_r to a processing loopGraeme Russ
Create an init function array for board_init_f_r - This finalises the migration to a purely array based initialisation mechanism Also tweak a few comments while we are at it so everything is 'correct' -- Changes for v2: - Renamed to a more apt name - Fix bug in set_reloc_flag_r - Re-instate gd->flags = boot_flags; in board_init_f - Added commit message
2012-01-04x86: Split init functions out of board.cGraeme Russ
This patch moves towards reducing board.c to simply a set of init cores for the three initialisation phases (Flash, Flash/RAM, and RAM), a set of three init function arrays and a init function array processing function
2012-01-04x86: Move relocation code out of board.cGraeme Russ
2012-01-04x86: Move setup_pcat_compatibility() out of board.cGraeme Russ
This function simply does not belong in board.c -- Changes for v2: - Added commit message
2012-01-04x86: Move do_go_exec() out of board.cGraeme Russ
-- Changes for v2: - None
2012-01-04CHECKPATCH: arch/x86/lib/*Graeme Russ
2012-01-04x86: Tweak IDT and GDT for alignment and readabilityGraeme Russ
-- Changes for v2: - Renamed to better reflect nature of changes
2012-01-04x86: Allow cache before copy to RAMGraeme Russ
-- Changes for v2: - None
2012-01-04x86: Create weak init_cache() and default enable_caches() functionsGraeme Russ
-- Changes for v2: - Tweaked commit title
2012-01-04x86: Set GD_FLG_RELOC after entering in-RAM copy of U-BootGraeme Russ
-- Changes for v2: - None
2012-01-04x86: Use fs for global dataGraeme Russ
Use the base address of the 'F' segment as a pointer to the global data structure. By adding the linear address (i.e. the 'D' segment address) as the first word of the global data structure, the address of the global data relative to the 'D' segment can be found simply, for example, by: fs movl 0, %eax This makes the gd 'pointer' writable prior to relocation (by reloading the Global Desctriptor Table) which brings x86 into line with all other arches NOTE: Writing to the gd 'pointer' is expensive (but we only do it twice) but using it to access global data members (read and write) is still fairly cheap -- Changes for v2: - Rebased against changes made to patch #3 - Removed extra indent - Tweaked commit message
2012-01-04x86: Rework relocation calculationsGraeme Russ
This commit introduces no functional changes - It simply re-arranges the calculations so that adding to them in future commits will be cleaner -- Changes for v2: - Fixed typo in title - Added commit message
2012-01-04x86: Simplify Flash-to-RAM code execution transitionGraeme Russ
Move the relocation offset calculation out of assembler and into C. This also paves the way for the upcoming init sequence simplification by adding the board_init_f_r flash to RAM transitional function -- Changes for v2: - Added commit message - Minor adjustment to new stack address comment
2012-01-04x86: Rework Global Descriptor Table loadingGraeme Russ
The inline assembler is ugly and uses hard coded magic numbers. Make it more elegant to allow cleaner implementation of future GDT related patches. The compiler seems smart enough to generate the same code anyway -- Changes for v2: - Rebased against revised patch #3 - Use GDT size define instead of magic number - Added commit message
2012-01-04x86: Remove GDR related magic numbersGraeme Russ
-- Changes for v2: - Use an enum - Add defined for GDT size (previously added in patch 7) - Use X86_ namespace (as per Linux headers)
2012-01-04x86: Speed up copy-to-RAM and clear BSS operationsGraeme Russ
The implementations of memcpy and memset are now the optimised versions from glibc, so use them instead of simple copy loops -- Changes for v2: - Removed unneeded brackets
2012-01-02x86: Import glibc memcpy implementationGraeme Russ
Taken from glibc version 2.14.90 -- Changes for v2: - None
2011-12-19x86: Add support for specifying an initrd with the zboot commandGabe Black
This change finishes plumbing the initrd support built into the zboot mechanism out to the command interface. It also fixes a bug in the command declaration where the kernel size could be passed as an optional second parameter but not enough arguments were allowed. Signed-off-by: Gabe Black <gabeblack@chromium.org>
2011-12-19x86: Refactor the zboot innards so they can be reused with a vboot imageGabe Black
If vboot successfully verifies a kernel, it will leave it in place and basically ready to boot. The zeropage table which is part of the x86 boot protocol is at the end of the kernel, though, instead of the beginning, and because the image is already in place there's no need to copy it around. This change refactors the code which implements the zboot command so that the configuration of the zeropage table and loading the pieces of the kernel into memory are done separately. Also, because the command line goes before the zeropage table in vboot which is somewhat incompatible with the normal protocol, where to put the command line is a now a parameter instead of being hard coded. Signed-off-by: Gabe Black <gabeblack@chromium.org>
2011-12-19x86: Add infrastructure to extract an e820 table from the coreboot tablesGabe Black
Also approximate the size of RAM using the largest RAM address available in the tables. There may be areas which are marked as reserved which are actually at the end of RAM. Signed-off-by: Gabe Black <gabeblack@chromium.org>
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