summaryrefslogtreecommitdiff
path: root/arch/x86
AgeCommit message (Expand)Author
2016-05-23x86: acpi: Align FACS table to a 64 byte boundaryBin Meng
2016-05-23x86: acpi: Use u32 in table write routinesBin Meng
2016-05-23x86: acpi: Adjust order in acpi_table.cBin Meng
2016-05-23x86: acpi: Change fill_header()Bin Meng
2016-05-23x86: acpi: Remove acpi_create_ssdt_generator()Bin Meng
2016-05-23x86: acpi: Reorder code in acpi_table.hBin Meng
2016-05-23x86: acpi: Various changes to acpi_table.hBin Meng
2016-05-23x86: acpi: Remove unused codesBin Meng
2016-05-23x86: dts: Update to include ACTL register detailsBin Meng
2016-05-23x86: irq: Enable SCI on IRQ9Bin Meng
2016-05-23x86: irq: Reserve IRQ9 for ACPI in PIC modeBin Meng
2016-05-23x86: acpi: Fix compiler warnings in write_acpi_tables()Bin Meng
2016-05-23x86: Fix build warning in tables.c when CONFIG_SEABIOSBin Meng
2016-05-23x86: Drop asm/acpi.hBin Meng
2016-05-17dm: Rename disk uclass to ahciSimon Glass
2016-04-22x86: Correct typo of Miao Yan's email addressBin Meng
2016-04-22x86: qemu: Drop our own ACPI implementationBin Meng
2016-03-22arm: x86: Drop command-line code when CONFIG_CMDLINE is disabledSimon Glass
2016-03-17x86: Add congatec conga-QA3/E3845-4G (Bay Trail) supportStefan Roese
2016-03-17x86: Add support for the samus chromebookSimon Glass
2016-03-17x86: Support a chained-boot development flowSimon Glass
2016-03-17x86: dts: Drop memory SPD compatible stringSimon Glass
2016-03-17x86: ivybridge: Convert to use the common SDRAM codeSimon Glass
2016-03-17x86: Add common SDRAM-init codeSimon Glass
2016-03-17x86: Move common PCH code into a common placeSimon Glass
2016-03-17x86: Add a function to set the IOAPIC IDSimon Glass
2016-03-17x86: broadwell: Add support for high-speed I/O lane with MESimon Glass
2016-03-17x86: broadwell: Add support for SDRAM setupSimon Glass
2016-03-17x86: broadwell: Add power-control supportSimon Glass
2016-03-17x86: broadwell: Add reference code supportSimon Glass
2016-03-17x86: broadwell: Add an LPC driverSimon Glass
2016-03-17x86: broadwell: Add a northbridge driverSimon Glass
2016-03-17x86: broadwell: Add a SATA driverSimon Glass
2016-03-17x86: broadwell: Add a pinctrl driverSimon Glass
2016-03-17x86: broadwell: Add a PCH driverSimon Glass
2016-03-17x86: Add basic support for broadwellSimon Glass
2016-03-17x86: Add support for running Intel reference codeSimon Glass
2016-03-17x86: Drop all the old pin configuration codeSimon Glass
2016-03-17x86: Add an ICH6 pin configuration driverSimon Glass
2016-03-17x86: link: Add pin configuration to the device treeSimon Glass
2016-03-17x86: Update microcode for secondary CPUsSimon Glass
2016-03-17x86: ivybridge: Show microcode version for each coreSimon Glass
2016-03-17x86: Record the CPU details when starting each coreSimon Glass
2016-03-17x86: Move common MRC Kconfig options to the common fileSimon Glass
2016-03-17x86: Allow I/O functions to use pointersSimon Glass
2016-03-17x86: Add macros to clear and set I/O bitsSimon Glass
2016-03-17x86: ivybridge: Drop sandybridge_early_init()Simon Glass
2016-03-17x86: Move Intel Management Engine code to a common placeSimon Glass
2016-03-17x86: Rename PORT_RESET to IO_PORT_RESETSimon Glass
2016-03-17x86: Move common CPU code to its own placeSimon Glass
generated by cgit (git 2.34.1) at 2024-12-30 19:43:28 +0000