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2020-07-07arm: stm32mp: protect DBGMCU_IDC access with BSECPatrick Delaunay
As debugger must be totally closed on Sec closed chip, the DBGMCU_IDC register is no more accessible (self hosted debug is disabled with OTP). This patch adds a function bsec_dbgswenable() to check if the DBGMCU registers are available before to access them: BSEC_DENABLE.DBGSWENABLE = self hosted debug status. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-07-07arm: stm32mp: stm32prog: add "Device Name" in iproduct during DFU USB ↵Patrick Delaunay
enumeration Add "Device Name" in iproduct during DFU USB enumeration to have this information in STM32CubeProgrammer trace (this tools is compatible with @Name since v2.3) Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-07-07ARM: dts: stm32mp1: use OPP information for PLL1 settings in SPLPatrick Delaunay
This patch allows to switch the CPU frequency to 800MHz on the ST Microelectronics board (DK1/DK2 and EV1) or dh electronics SOM using the STM32MP15x SOC and when it is supported by the HW (for STM32MP15xD and STM32MP15xF). Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-07-07board: st: stpmic1: add function stpmic1_initPatrick Delaunay
Add a function stmpic_init to early initialize the PMIC STPMIC1 - keep vdd on during the reset cycle (to avoid issue when backup battery is absent) - Check if debug is enabled to program PMIC according to the bit This patch allows to remove the compilation of spl.c file from stm32mp1 board in dh_stm32mp1. CONFIG_SPL_BOARD_INIT is removed as the new function is called earlier in SPL, in the function board_early_init_f. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-07-07arm: stm32mp: add weak function to save vddcorePatrick Delaunay
Add a weak functions to save the vddcore voltage value provided in the OPP node when the clock tree is initialized. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-07-07ARM: dts: stm32: add cpufreq support on stm32mp15xPatrick Delaunay
This commit adds cpufreq support on stm32mp15x SOC. STM32 cpufreq uses operating points V2 bindings (no legacy). Nvmem cells have to be used to know the chip version and then which OPPs are available. Note that STM32 cpufreq driver is mainly based on "cpufreq-dt" driver. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-07-07arm: stm32mp: spl: add bsec driver in SPLPatrick Delaunay
Add the bsec driver in SPL, as it is needed by SOC part number detection to found the supported OPP. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-07-06Merge branch 'next'Tom Rini
Merge all outstanding changes from the current next branch in now that we have released.
2020-07-05Merge branch '2020-07-01-kconfig-etc-updates' into nextTom Rini
- Resync Kconfiglib with the v14.1.0 release. - Re-sync our <linux/compiler*h> files with v5.7-rc5 from upstream. - Fully resync checkpatch.pl with v5.7 release. To safely to all of the above, we have a few bugfixes about functions that need a 'static inline' but weren't. We also stop setting CROSS_COMPILE in arch/*/config.mk. Finally, with the above changes boards can now opt-in to optimizing inlining and we do this for the socfpga stratix10 platform for space savings.
2020-07-05sandbox, test: add test for GPIO_HOG functionHeiko Schocher
currently gpio hog function is not tested with "ut dm gpio" so add some basic tests for gpio hog functionality. For this enable GPIO_HOG in sandbox_defconfig, add in DTS some gpio hog entries, and add testcase in "ut dm gpio" command. Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-03riscv: use log functions in fdt_fixupHeinrich Schuchardt
Replace printf() and debug() by log_err() and log_debug(). "No reserved memory region found in source FDT\n" is not an error but a debug information. %s/can not/cannot/ - use the more common spelling. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-07-03riscv: sifive: fu540: enable all cache ways from U-Boot properPragnesh Patel
Add L2 cache node to enable all cache ways from U-Boot proper. Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-03riscv: Use optimized version of fdtdec_get_addr_size_no_parentAtish Patra
fdtdec_get_addr_size_no_parent is not an optimized version if parent node is already available with the caller. Use fdtdec_get_addr_size_auto_parent to read the "reg" property Signed-off-by: Atish Patra <atish.patra@wdc.com> Reviewed-by: Bin Meng <bin.meng@windriver.com>
2020-07-03riscv: Do not return error if reserved node already existsAtish Patra
Not all errors are fatal. If a reserved memory node already exists in the destination device tree, we can continue to boot without failing. Signed-off-by: Atish Patra <atish.patra@wdc.com> Reviewed-by: Bin Meng <bin.meng@windriver.com>
2020-07-03riscv: Do not build reset.c if SYSRESET is onBin Meng
SYSRESET uclass driver already provides all the reset APIs, hence exclude our own ad-hoc reset.c implementation. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Sagar Kadam <sagar.kadam@sifive.com> Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
2020-07-02riscv: Enable CONFIG_OF_BOARD_FIXUP by default for OF_SEPARATEBin Meng
Starting from OpenSBI v0.7, the SBI firmware inserts/fixes up the reserved memory node for PMP protected memory regions. All RISC-V boards need to copy the reserved memory node from the device tree provided by the firmware to the device tree used by U-Boot. Turn on CONFIG_OF_BOARD_FIXUP by default for OF_SEPARATE. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Atish Patra <atish.patra@wdc.com> Reviewed-by: Rick Chen <rick@andestech.com>
2020-07-02riscv: Expand the DT size before copy reserved memory nodeBin Meng
The FDT blob might not have sufficient space to hold a copy of reserved memory node. Expand it before the copy. Reported-by: Rick Chen <rick@andestech.com> Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Atish Patra <atish.patra@wdc.com> Reviewed-by: Rick Chen <rick@andestech.com>
2020-07-02riscv: Avoid the reserved memory fixup if src and dst point to the same placeBin Meng
The copy of reserved memory node from source dtb to destination dtb can be avoided if they point to the same place. This is useful when OF_PRIOR_STAGE is used. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Rick Chen <rick@andestech.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-07-02riscv: fu540: dts: Correct reg size of otp and dmc nodesBin Meng
Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
2020-07-02riscv: fu540: dts: Remove the unnecessary space in the cpu2_intc nodeBin Meng
Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
2020-07-01socfpga: Mark socfpga_fpga_add() as static inline in the non-FPGA caseTom Rini
Unless we mark the function as 'static inline' it may end up being non-inlined by the compiled and result in duplicate functions. Cc: Marek Vasut <marex@denx.de> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Ley Foon Tan <ley.foon.tan@intel.com> Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Marek Vasut <marex@denx.de>
2020-07-01x86: Convert from ACCESS_ONCE to READ/WRITE_ONCETom Rini
In order to update our <linux/compiler.h> to a newer version that no longer provides ACCESS_ONCE() but only READ_ONCE()/WRITE_ONCE() we need to convert arch/x86/include/asm/atomic.h to the other macros. Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-01tegra: Convert from ACCESS_ONCE to READ/WRITE_ONCETom Rini
In order to update our <linux/compiler.h> to a newer version that no longer provides ACCESS_ONCE() but only READ_ONCE()/WRITE_ONCE() we need to convert arch/arm/mach-tegra/ivc.c to the other macros. Cc: Tom Warren <twarren@nvidia.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2020-07-01Remove CROSS_COMPILE default from arch/*/config.mkTom Rini
In order to support the compiler providing information used within Kconfig itself we cannot have the compiler be determined by arch/*/config.mk as we will not be able to evaluate that yet. Given that most documentation tells people to specify CROSS_COMPILE, remove these references. Cc: Huan Wang <alison.wang@nxp.com> Cc: Angelo Dureghello <angelo@sysam.it> Cc: Michal Simek <monstr@monstr.eu> Cc: Rick Chen <rick@andestech.com> Cc: Thomas Chou <thomas@wytron.com.tw> Cc: Wolfgang Denk <wd@denx.de> Cc: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Michal Simek <michal.simek@xilinx.com>
2020-07-01riscv: dts: hifive-unleashed-a00: add cpu aliasesSagar Shrikant Kadam
Add cpu aliases to U-Boot specific dtsi for hifive-unleashed. Without aliases we see that the CPU device sequence numbers are set randomly and the cpu list/detail command will show it as follows: => cpu list 1: cpu@1 rv64imafdc 2: cpu@2 rv64imafdc 3: cpu@3 rv64imafdc 0: cpu@4 rv64imafdc Seems like CPU probing with dm-model also relies on aliases as observed in case spi. The fu540-c000-u-boot.dtsi has cpu nodes and so adding corresponding aliases we can ensure that cpu devices are assigned proper sequence as follows: => cpu list 1: cpu@1 rv64imafdc 2: cpu@2 rv64imafdc 3: cpu@3 rv64imafdc 4: cpu@4 rv64imafdc Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com> Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com> Reviewed-by: Bin Meng <bin.meng@windriver.com>
2020-07-01riscv: Add Sipeed Maix supportSean Anderson
The Sipeed Maix series is a collection of boards built around the RISC-V Kendryte K210 processor. This processor contains several peripherals to accelerate neural network processing and other "ai" tasks. This includes a "KPU" neural network processor, an audio processor supporting beamforming reception, and a digital video port supporting capture and output at VGA resolution. Other peripherals include 8M of sram (accessible with and without caching); remappable pins, including 40 GPIOs; AES, FFT, and SHA256 accelerators; a DMA controller; and I2C, I2S, and SPI controllers. Maix peripherals vary, but include spi flash; on-board usb-serial bridges; ports for cameras, displays, and sd cards; and ESP32 chips. Currently, only the Sipeed Maix Bit V2.0 (bitm) is supported, but the boards are fairly similar. Documentation for Maix boards is located at <http://dl.sipeed.com/MAIX/HDK/>. Documentation for the Kendryte K210 is located at <https://kendryte.com/downloads/>. However, hardware details are rather lacking, so most technical reference has been taken from the standalone sdk located at <https://github.com/kendryte/kendryte-standalone-sdk>. Signed-off-by: Sean Anderson <seanga2@gmail.com>
2020-07-01riscv: Add device tree for K210 and Sipeed Maix BitMSean Anderson
Where possible, I have tried to find compatible drivers based on the layout of registers. However, many devices remain untested. All untested devices have been left disabled, but some tentative properties (such as compatible strings, and clocks, interrupts, and resets properties) have been added. Signed-off-by: Sean Anderson <seanga2@gmail.com>
2020-07-01riscv: Allow use of reset driversSean Anderson
Currently, one cannot use a reset driver on RISC-V. Follow the MIPS example, and disable the default reset handler when the sysreset driver is enabled. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-01riscv: Add option to support RISC-V privileged spec 1.9Sean Anderson
Some older processors (notably the Kendryte K210) use an older version of the RISC-V privileged specification. The primary changes between the old and new are in virtual memory, and in the merging of three separate counter enable CSRs. Using the new CSR on an old processor causes an illegal instruction exception. This patch adds an option to use the old CSRs instead of the new one. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-01riscv: Clean up IPI initialization codeSean Anderson
The previous IPI code initialized the device whenever the first call was made to a riscv_*_ipi function. This made it difficult to determine when the IPI device was initialized. This patch introduces a new function riscv_init_ipi. It is called once during arch_cpu_init_dm. In SPL, it is called in spl_invoke_opensbi. Before this point, no riscv_*_ipi functions should be called. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com>
2020-07-01riscv: Clear pending interrupts before enabling IPIsSean Anderson
On some platforms (k210), the previous stage bootloader may have not cleared pending IPIs before transferring control to U-Boot. This can cause race conditions, as multiple harts all attempt to initialize the IPI controller at once. This patch clears IPIs before enabling them, ensuring that only one hart modifies shared memory at once. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com>
2020-07-01riscv: Add headers for asm/global_data.hSean Anderson
This header depended on bd_t and ulong, but did not include the appropriate headers. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-01reset: Add generic reset driverSean Anderson
This patch adds a generic reset driver. It is designed to be useful when one has a register in a regmap which contains bits that reset other devices. I thought this seemed like a very generic use, so here is a generic driver. The overall structure has been modeled on the syscon-reboot driver. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-01dm: Add support for simple-pm-busSean Anderson
This type of bus is used in Linux to designate buses which have power domains and/or clocks which need to be enabled before their child devices can be used. Because power domains are automatically enabled before probing in U-Boot, we just need to enable any clocks present. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-06-30Merge branch '2020-06-30-minor-TI-board-updates' into nextTom Rini
- Minor updates to some platforms I am the listed maintainer of. Notably this removes the ti814x_evm which stopped building with the PXA MMC migration series (oops) but hasn't been functional in some time.
2020-06-30ti814x: Remove platformTom Rini
The TI814x (DM814x) platform is rather old and in need of a lot of migration work. As much of that work is well past the deadline, remove this platform. Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-30Merge tag 'mips-pull-2020-06-29' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-mips into next - net: pcnet: cleanup and add DM support - Makefile: add rule to build an endian-swapped U-Boot image used by MIPS Malta EL variants - CI: add Qemu tests for MIPS Malta
2020-06-29spi: Move DM_SPI_FLASH and SPI_FLASH_DATAFLASH to Kconfig (for ls1021aXXX)Lukasz Majewski
This patch moves the CONFIG_DM_SPI_FLASH and CONFIG_SPI_FLASH_DATAFLASH to be defined in Kconfig, not in board specific header file (include/configs/<board>.h). Before this change the CONFIG_DM_SPI_FLASH was not set in .config (so it was not possible to use CONFIG_IS_ENABLED(DM_SPI_FLASH) in SPI DM/DTS converted drivers), but it was set in u-boot.cfg file. Signed-off-by: Lukasz Majewski <lukma@denx.de> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
2020-06-29spi: Move DM_SPI_FLASH to Kconfig (for NXP's ls1043a)Lukasz Majewski
This patch fixes issue with defining the DM_SPI_FLASH in the configs/include/<board.h> instead of enabling this option in Kconfig. The problem is that CONFIG_IS_ENABLED(DM_SPI_FLASH) shows false as there is no DM_SPI_FLASH=y in .config (but the define is set in u-boot.cfg). As a result conversion of DM_SPI_FLASH to using CONFIG_IS_ENABLED() is not working properly. Signed-off-by: Lukasz Majewski <lukma@denx.de> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
2020-06-29spi: Convert CONFIG_DM_SPI* to CONFIG_$(SPL_TPL_)DM_SPI*Lukasz Majewski
This change allows more fine tuning of driver model based SPI support in SPL and TPL. It is now possible to explicitly enable/disable the DM_SPI support in SPL and TPL via Kconfig option. Before this change it was necessary to use: /* SPI Flash Configs */ #if defined(CONFIG_SPL_BUILD) #undef CONFIG_DM_SPI #undef CONFIG_DM_SPI_FLASH #undef CONFIG_SPI_FLASH_MTD #endif in the ./include/configs/<board>.h, which is error prone and shall be avoided when we strive to switch to Kconfig. The goal of this patch: Provide distinction for DM_SPI support in both U-Boot proper and SPL (TPL). Valid use case is when U-Boot proper wants to use DM_SPI, but SPL must still support non DM driver. Another use case is the conversion of non DM/DTS SPI driver to support DM/DTS. When such driver needs to work in both SPL and U-Boot proper, the distinction is needed in Kconfig (also if SPL version of the driver supports OF_PLATDATA). In the end of the day one would have to support following use cases (in single driver file - e.g. mxs_spi.c): - U-Boot proper driver supporting DT/DTS - U-Boot proper driver without DT/DTS support (deprecated) - SPL driver without DT/DTS support - SPL (and TPL) driver with DT/DTS (when the SoC has enough resources to run full blown DT/DTS) - SPL driver with DT/DTS and SPL_OF_PLATDATA (when one have constrained environment with no fitImage and OF_LIBFDT support). Some boards do require SPI support (with DM) in SPL (TPL) and some only have DM_SPI{_FLASH} defined to allow compiling SPL. This patch converts #ifdef CONFIG_DM_SPI* to #if CONFIG_IS_ENABLED(DM_SPI) and provides corresponding defines in Kconfig. Signed-off-by: Lukasz Majewski <lukma@denx.de> Tested-by: Adam Ford <aford173@gmail.com> #da850-evm Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> [trini: Fixup a few platforms] Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-29x86: Don't build some unused objects in TPLTom Rini
In the future if we have separate symbols for DM_SPI_FLASH and SPL_DM_SPI_FLASH we will not always have function declarations available for some DM calls. This in turn leads to build warnings but not failures as the code isn't used and is discarded at link time. Restructure things to not build code we won't use for TPL anyways. Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-28Merge tag 'u-boot-rockchip-20200628' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip - rk3188 cpu init and APLL fix; - rk3399: Add BOOTENV_SF command; - rk3288 correct vop0 vop1 setting;
2020-06-27rockchip: rk3188: Fix back to BROM bootAlexander Kochetkov
Move the setting for noc remap out of SPL code. Changing noc remap inside SPL results in breaking back to BROM boot. Fixes commit c14fe2a8e192 ("rockchip: rk3188: Move SoC one time setting into arch_cpu_init()"). Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-06-26arm: imx: Finish migration of CONFIG_CSF_SIZE to KconfigTom Rini
While in most cases CSF_SIZE is handled via Kconfig we have some i.MX8M platforms that set the size based on the now-renamed CONFIG_SECURE_BOOT symbol. Update things so that CSF_SIZE itself depends on IMX_HAB being enabled and provide the default value for i.MX8M family of parts. Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: Ye Li <ye.li@nxp.com> Cc: NXP i.MX U-Boot Team <uboot-imx@nxp.com> Fixes: d714a75fd4dc ("imx: replace CONFIG_SECURE_BOOT with CONFIG_IMX_HAB") Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Ye Li <ye.li@nxp.com>
2020-06-26arm: imx: Finish migration from CONFIG_SECURE_BOOT to CONFIG_IMX_HABTom Rini
There are a few remaining places where we say CONFIG_SECURE_BOOT rather than CONFIG_IMX HAB. Update these instances. Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: NXP i.MX U-Boot Team <uboot-imx@nxp.com> Cc: Eddy Petrișor <eddy.petrisor@gmail.com> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Priyanka Jain <priyanka.jain@nxp.com> Fixes: d714a75fd4dc ("imx: replace CONFIG_SECURE_BOOT with CONFIG_IMX_HAB") Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Stefano Babic <sbabic@denx.de>
2020-06-26Convert CONFIG_AT91_GPIO to KconfigTom Rini
This converts the following to Kconfig: CONFIG_AT91_GPIO Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-26arm: socfpga: misc_s10: Fix EMAC register address calculationLey Foon Tan
Fix EMAC register address calculation, address need to multiply with sizeof(u32) or 4. This fixes write to invalid address. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2020-06-25bdinfo: x86: vesa: Update fb_base to the correct valueSimon Glass
Set this value in global_data so that it is reported correctly on x86 boards. In fact, U-Boot allocates space for the frame buffer even though it is not used. Then the FSP picks the address itself (e.g. 0xb0000000). So the value set by U-Boot (high in memory with everything else that is relocated), is not actually the correct value. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-25bdinfo: m68k: ppc: Move arch-specific code from bdinfoSimon Glass
We don't have an easy way to share these three lines of code with two architectures. We also want to make it clear that this code is actually arch-specific. So just duplicate it in each arch-specific file. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
2020-06-25bdinfo: m68k: Move m68k-specific info into its own fileSimon Glass
We don't really want to have m68k-specific code in a generic file. Create a new arch-specific function to hold it, and move it into that. Make the function weak so that any arch can implement it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Angelo Dureghello <angelo.dureghello@timesys.com> Tested-by: Angelo Dureghello <angelo.dureghello@timesys.com>
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