summaryrefslogtreecommitdiff
path: root/arch
AgeCommit message (Collapse)Author
2017-07-11rockchip: dts: rk3328: add fixed regulator node for xhciMeng Dongyang
The driver changes gpio to fixed regulator to control vbus, so add fixed regulator node in DTS for xhci driver. Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11rockchip: rk3036: sync os_reg2 define with other socKever Yang
Rockchip using the same bit definition for dram info and write to os_reg, the col and bw info is not correct and let's fix it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11rockchip: pwm: fix the register layout for the PWM controllereric.gao@rock-chips.com
According to rk3288 spec, the pwm register order is: PWM_PWM0_CNT, PWM_PWM0_PERIOD_HPR, PWM_PWM0_DUTY_LPR, PWM_PWM0_CTRL but the source code's order is: struct rk3288_pwm { u32 cnt; u32 duty_lpr; u32 period_hpr; u32 ctrl; }; So, correct it here. It is the same as RK3399. Signed-off-by: Eric Gao <eric.gao@rock-chips.com> Edited the commit message: Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11rockchip: firefly-rk3399: dts: enable sdmmc deviceKever Yang
Enable sdmmc device and add the spl boot device sequence. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11rockchip: rk3328: dtsi use max-frequency for mmc nodeKever Yang
Since the 'clock-freq-min-max' is deprecated, we use max-frequency. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11rockchip: rk3288: dtsi use max-frequency for mmc nodeKever Yang
Since the 'clock-freq-min-max' is deprecated, we use max-frequency. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11rockchip: rk3036: dtsi use max-frequency for mmc nodeKever Yang
Since the 'clock-freq-min-max' is deprecated, we use max-frequency. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11rockchip: add evb_rk3229 boardKever Yang
evb_rk3229 is a RK3229 based board, with: - 8GB eMMC; - 1GB DDR SDRAM; - 2 USB2.0 HOST port; - 1 MAC port; - 1 HDMI port; - IR; - WiFi; Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11rockchip: rk322x: add basic soc supportKever Yang
Enable soc support for SPL and U-boot skeleton. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11rockchip: rk322x: add dts fileKever Yang
The dts files are from kernel and with modify to adapt U-Boot. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11rockchip: rk322x: add pinctrl driverKever Yang
Add init pinctrl driver support for: - i2c; - spi; - uart; - pwm; - emmc/sdmmc; Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11rockchip: rk322x: add clock driverKever Yang
Add clock driver init support for: - cpu, bus clock init; - emmc, sdmmc clock; - ddr clock; Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Fixed format specified (%x -> %p) in clk_rk322x.c: Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11rockchip: correct the bank0 ram sizeKever Yang
The bank0 ram size should be the DRAM size minus reserved size, the DRAM size may be 1GB, 2GB, 4GB, we can not hard code it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Added DECLARE_GLOBAL_DATA_PTR for RK3328, RK3368 and RK3399: Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11rockchip: dts: rk3368: add dmc nodeKever Yang
Add dmc node to enable sdram driver. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11rockchip: dts: rk3328: add dmc nodeKever Yang
Add a dmc node for sdram driver. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11rockchip: rk3368: add sdram driver for U-BootKever Yang
Add sdram driver in U-Boot for get the correct sdram size from sys_reg, so that U-Boot can co-work with Rockchip loader or SPL to get different dram capability and then tell the kernel. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11rockchip: rk3328: add sdram driver in U-BootKever Yang
Add sdram driver in U-Boot for get the correct sdram size from sys_reg, so that U-Boot can co-work with Rockchip loader or SPL to get different dram capability and then tell the kernel. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11rockchip: use common sdram functionKever Yang
Replace the sdram_init() in board init and rockchip_sdram_size() in sdram driver for all the Rockchip SoCs which enable CONFIG_RAM. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Make dram_init() in rk3036-board.c conditional on CONFIG_RAM: Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11rockchip: add sdram_common for common functionsKever Yang
There are some functions like sdram_size_mb can be re-used for different rockchip SoCs, just put them into common file. Add board_get_usable_ram_top() for ram_top init base on SDRAM_MAX_SIZE. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Added SDRAM_MAX_SIZE definition for RK3036: Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> fixup: 3036 fix for sdram_common
2017-07-11rockchip: rk3328: correct mem_regionKever Yang
According to rk3328 TRM: 0~0xff000000 is ddr space; 0xff000000~0xffffffff is device space. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11rockchip: dm: convert fdt_get to dev_readPhilipp Tomsich
With the new dev_read functions available, we can convert the rockchip architecture-specific drivers and common drivers used by these devices over to the dev_read family of calls. This covers the DRAM controller initialisation for the RK3188, RK3288 and RK3399... all of these read some of the tuning/setup/timing parameters from the device-tree. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-07-10arm: mach-keystone: Modify secure image size before copyAndrew F. Davis
The size of the secure image does not include the size of the header, subtract this out before we move the image or we grab extra data after the image. Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2017-07-10ARM: dts: OMAP5+: Enable gpio in SPLLokesh Vutla
gpio2 is used to detect lcd based on which pin mux is done in SPL. gpio7 is used to enable vtt regulator. Enable these two gpio nodes in SPL. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2017-07-10arm: omap4+: Enable spl_early_init()Lokesh Vutla
Enable spl_early_init() so that spl can use DT very early during boot. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2017-07-10arm: omap: Detect boot mode very earlyLokesh Vutla
ROM stores the boot params information in a known location and passes it to SPL. This information needs to be copied very early during boot or else there is a chance of getting corrupted by SPL. So move this boot device detection very early during boot. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2017-07-10ARM64: poplar: hi3798cv200: u-boot support for Poplar 96BoardsJorge Ramirez-Ortiz
This port adds support for: 1) Serial 2) eMMC 3) USB It has been tested with ARM TRUSTED FIRMWARE running u-boot as the BL33 executable [see board's README] eMMC has been tested for reading and booting the loader and linux kernels as well as saving the u-boot environment. USB has been tested with ASIX networking adapter and SanDisk 7.4GB drive. PSCI has been tested via the reset call (PSCI executes from DDR) The firwmare upgrade process has been tested via TFTP and USB FAT filesystem containing the fastboot.bin image in one of the partitions. Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
2017-07-10ARM64: dts: hi3798cv200-poplar: add device tree bindingsJorge Ramirez-Ortiz
Pulled from Linux 4.12-rc3 Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-07-10ARM: dts: k2g: Add DT support for K2G Industrial Communication Engine evmCooper Jr., Franklin
Add basic DT support for K2G ICE evm. Only minimal peripherals are supported to allow console output and MMC boot. Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2017-07-10ARM: dts: k2g: Disable netcp by defaultCooper Jr., Franklin
Disable netcp by default like all other peripherals in the dtsi file. Enable the peripheral explicitly in the board specific dts file. Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2017-07-10ARM: dts: keystone-k2g-evm: Add unit address to memory nodeCooper Jr., Franklin
Upstream Linux has the unit address being added to the various 66AK2Gx boards dts. Therefore, update the dts to mimic this change. Also remove memory node from the base K2G dtsi file. Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2017-07-10ARM: dts: keystone-k2g: Remove skeleton.dtsiCooper Jr., Franklin
Adding the unit address to the memory node was causing the below error: Warning (reg_format): "reg" property in /memory has invalid length (8 bytes) (#address-cells == 2, #size-cells == 2) Further debugging showed that this was due to the memory node added by default to skeleton.dtsi which was being included in keystone-k2g.dtsi. Adding a missing node was all that was needed to remove this deprecated dtsi file from the SoC dtsi. With skeleton.dtsi removed the dtc compiler no longer complained about including the unit address for the memory node. Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2017-07-10ARM: k2g: Program DDRPHY_DATX8 registers via mask and value variablesCooper Jr., Franklin
Different K2G evms may need to program the various KS2_DDRPHY_DATX8_X_OFFSET registers in different ways. Therefore, use the mask and val registers for each KS2_DDRPHY_DATAX_X_OFFSET to properly program the register. Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2017-07-10ARM: k2g: Program DDR PHY MR2 register with the default valueCooper Jr., Franklin
K2G GP doesn't require the MR2 register to be programed since the default is good enough. However, newer K2G boards do need to change this register value. Therefore, instead of not writing this register if ran on a K2G board just program the value to be written to match the default/reset value. Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2017-07-10ARM: keystone2: Add additional fields used for DDR3 configurationCooper Jr., Franklin
Future boards will need to configure DDR3 registers in a slightly different manner. Support this by defining additional variables and defines that will be utilized later. Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2017-07-10ARM: keystone2: Allow to build with all image formatsCooper Jr., Franklin
u-boot.bin is a copy of: u-boot-fit-dtb.bin if CONFIG_FIT_EMBED is enabled, u-boot-dtb.bin if CONFIG_OF_SEPARATE is enabled, u-boot-nodtb.bin if DT is not enabled. So, use u-boot.bin to to generate keystone images instead of u-boot-dtb.bin Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2017-07-10arm: dts: Add new "generic" 66AK2Gx device tree file.Cooper Jr., Franklin
With U-boot runtime board detect for DTB selection a "default" dtb needs to be created. This will be used temporarily until the "proper" dtb is selected. Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2017-07-10ARM: dts: k2g: Introduce U-boot specific dtsi fileCooper Jr., Franklin
Introduce K2G evm specific dtsi file for U-boot specific configurations. This will help seperate U-boot only configurations thus making it easier to keep device tree files synced between U-boot and Linux. For now only add nodes to allow i2c drivers to be probed early during the boot process. Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2017-07-10ARM: dts: keystone-k2e-evm: Add U-boot specific dtsi fileCooper Jr., Franklin
With Davinci I2C switching to device model, K2E requires U-boot specific device tree entries. This is only required for I2C 1 which is needed extremely early during the boot process. Fixes: 1743d040b1df ("ARM: keystone: Enable DM_I2C by default") Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
2017-07-08powerpc, 8xx: Add support for MCR3000 board from CSSIChristophe Leroy
CS Systemes d'Information (CSSI) manufactures two boards, named MCR3000 and CMPC885 which are respectively based on MPC866 and MPC885 processors. This patch adds support for the first board. Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2017-07-08powerpc, 8xx: move Serial driver to drivers/serial/Christophe Leroy
At the same time, move to Kconfig Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2017-07-08powerpc, 8xx: move SPI driver to drivers/spi/Christophe Leroy
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2017-07-08powerpc, 8xx: move FEC Ethernet driver in drivers/netChristophe Leroy
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2017-07-08powerpc, 8xx: Migrate to KconfigChristophe Leroy
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Reviewed-by: Heiko Schocher <hs@denx.de>
2017-07-08powerpc, 8xx: Properly set CPM frequency in the device treeChristophe Leroy
For processors whose core runs at twice the bus frequency, the fallback frequency calculation in Linux provides a wrong result. Therefore, U-boot needs to pass the correct value. Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Reviewed-by: Heiko Schocher <hs@denx.de>
2017-07-08powerpc, 8xx: Handle checkpatch errors and some of the warnings/checksChristophe Leroy
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Reviewed-by: Heiko Schocher <hs@denx.de>
2017-07-08powerpc, 8xx: Implement GLL2 ERRATAChristophe Leroy
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Acked-by: Wolfgang Denk <wd@denx.de> Reviewed-by: Heiko Schocher <hs@denx.de>
2017-07-08powerpc, 8xx: Use IO accessors to access IO memoryChristophe Leroy
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Reviewed-by: Heiko Schocher <hs@denx.de>
2017-07-08powerpc, 8xx: move specific reginfoChristophe Leroy
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Reviewed-by: Heiko Schocher <hs@denx.de>
2017-07-08powerpc, 8xx: move immap.c in arch/powerpc/cpu/mpc8xx/Christophe Leroy
immap.c used to be common to several CPUs. It is now only linked to the 8xx, so this patch moves it into arch/powerpc/cpu/mpc8xx/ Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Reviewed-by: Heiko Schocher <hs@denx.de>
2017-07-08powerpc: Partialy restore core of mpc8xxChristophe Leroy
CS Systemes d'Information (CSSI) manufactures 8xx boards for critical communication systems. Those boards have been running U-Boot since 2010 and will have to be maintained until at least 2027. commit 5b8e76c35ec312a3f73126bd1a2d2c0965b98a9f ("powerpc, 8xx: remove support for 8xx") orphaned those boards by removing support for the mpc8xx CPU. This commit partially restores support for the 8xx, with the following limitations: - Restores support for MPC866 and MPC885 only - Does not restore IDE, PCMCIA, I2C, USB - Does not restore examples - Does not restore POST - Does not restore Ethernet on SCC - Does not restore console on SCC - Does not restore bedbug and kgdb support As the 866 and 885 do not support the following features, they are not restored either: - VIDEO / LCD - RTC clock The CPM uCODE patch is not restored either, because: - 866 and 885 already have support for I2C and SPI relocation without a uCODE patch - relocation of SMC, I2C or SPI is only needed for using SCCs for Ethernet or QMC The dynamic setup/calculation of clocks is removed, we expect the target being use with the clock and PLPRCR register defined in the configuration. All the clock settings for 8xx prior to 866 is removed as well as we now only support 866 and 885. This code is mature and addresses mature boards. Therefore all code enclosed in '#if 0/#endif' and '#if XX_DEBUG/#endif' is unneeded. The following files are not restored by this patch: - arch/powerpc/cpu/mpc8xx/bedbug_860.c - arch/powerpc/cpu/mpc8xx/fec.h - arch/powerpc/cpu/mpc8xx/kgdb.S - arch/powerpc/cpu/mpc8xx/plprcr_write.S - arch/powerpc/cpu/mpc8xx/scc.c - arch/powerpc/cpu/mpc8xx/upatch.c - arch/powerpc/cpu/mpc8xx/video.c - arch/powerpc/include/asm/status_led.h - arch/powerpc/lib/ide.c - arch/powerpc/lib/ide.h - doc/README.MPC866 - drivers/pcmcia/mpc8xx_pcmcia.c - drivers/rtc/mpc8xx.c - drivers/usb/gadget/mpc8xx_udc.c - drivers/video/mpc8xx_lcd.c - examples/standalone/test_burst.c - examples/standalone/test_burst.h - examples/standalone/test_burst_lib.S - examples/standalone/timer.c - include/mpc823_lcd.h - include/usb/mpc8xx_udc.h - post/cpu/mpc8xx/Makefile - post/cpu/mpc8xx/cache.c - post/cpu/mpc8xx/cache_8xx.S - post/cpu/mpc8xx/ether.c - post/cpu/mpc8xx/spr.c - post/cpu/mpc8xx/uart.c - post/cpu/mpc8xx/usb.c - post/cpu/mpc8xx/watchdog.c Some of the restored files are not located in a proper location. In order to keep traceability of the changes, they will be moved to their correct location and moved to Kconfig in a followup patch. This patch also declares CSSI as point of contact for the update of the 8xx platform, as those boards are the only ones still being maintained on the 8xx area. A later patch will add those boards to the tree. Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>